AP2161D/AP2171D
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AP2161D/AP2171D
1A SINGLE CHANNEL CURRENT-LIMITED
POWER SWITCH WITH OUTPUT DISC HA RGE
Description
The AP2161D and AP2171D a re integrated high-side power switches
optimized for Universal Serial Bus (USB) and other hot-swap
applications. The family of devices complies with USB 2.0 and is
available with both polarities of Enable input. They offer current and
thermal limiting and short circuit protection as well as controlled rise
time and under-voltage lockout functionality. A 7ms deglitch capability
on the open-drain Flag output prevents false over-current reporting
and does not require any external components.
All devices are available in SOT25, SO-8, MSOP-8, MSOP-8EP, and
U-DFN2018-6 packages.
Features
Single USB Port Power Switches with Output Discharge
Over-Current and Thermal Protection
1.5A Accurate Current Limiting
Fast Transient Response
Reverse Current Blocking
90m On-Resistance
Input Voltage Range: 2.7V – 5.5V
0.6ms Typical Rise Time
Very Low Shutdown Current: 1µA (max)
Fault Report (FLG) with Blanking Time (7ms typ)
ESD Protection: 4kV HBM, 300V MM
Active High (AP2171D) or Active Low (AP2161D) Enable
Ambient Temperature Range -40°C to +85°C
SOT25, SO-8, MSOP-8, MSOP-8EP (Exposed Pad), and
U-DFN2018-6: Available in “Green” Molding Compound
(No Br, Sb)
Lead-Free Finish; RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
UL Recognized, File Number E322375
IEC60950-1 CB Scheme Certified
Applications
Consumer electronics – LCD TV & Monitor, Game Machines
Communications – Set-Top-Box, GPS, Smartphone
Computing – Laptop, Desktop, Servers, Printers, Docking
Station, HUB
Pin Assignments
SO-8
( Top View )
1
2
3
4
8
7
6
5
NC
OUT
FLG
OUT
GND
EN
IN
IN
1
2
3
4
8
7
6
5
NC
OUT
FLG
OUT
GND
EN
IN
IN
( Top View )
MSOP-8 / MSOP-8EP
Note: Latter with Exposed Pad
(
Dotted
L
ine
)
EN
OUT
GND
IN
FLG
1
2
3
5
4
SOT25
( Top View )
FLGEN
GND
OUT
OUT
IN
1
3
2
4
5
6
U-DFN2018-6
( Top V iew )
Notes: 1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. All applicable RoHS exemptions applied.
2. See http://www.diodes.com/quality/lead_free.html for more informat ion about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as tho se which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
Green
AP2161D/AP2171D
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AP2161D/AP2171D
Typical Applications Circuit
0.1uF
IN
GND
EN
OUT
ON
120uF
Power Supply
2.7V to 5.5V
0.1uF
OFF
FLG
Load
10k 10uF
AP2171D Enable Active High
Available Options
Part Number Channel Enable Pin
(EN) Current Limit
(Typical) Recommended Maximum
Continuous Load Current
AP2161D 1 Active Low 1.5A 1A
AP2171D 1 Active High 1.5A 1A
Pin Descriptions
Pin
Name
Pin Number Functions
SO-8
MSOP-8 MSOP-8EP SOT25 U-DFN2018-6
GND 1 1 2 1 Ground
IN 2, 3 2, 3 5 2 Voltage input pin ( all IN pins must b e tied together ext ernally)
EN 4 4 4 3 Enable inpu t, acti ve low (AP21 61D) or act ive high ( AP2171D)
FLG 5 5 3 4
Over-current and over-temperature fault report; open- drain flag is a ctive low w hen
triggered
OUT 6, 7 6, 7 1 5, 6 Voltage output pin (all OUT p ins must be t ied together externally )
NC 8 8 N/A N/A No internal connection; recommend tie to OUT pins
Exposed tab - Exposed tab - Exposed tab
Exposed pad.
It should be connected to GND and thermal mass for enhanced thermal
impedance.
It should not be used as electrical ground condu ction path.
AP2161D/AP2171D
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AP2161D/AP2171D
Functional Block Diagram
Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)
Symbol Parameter Ratings Unit
ESD HBM Human Body Model ESD Protection 4 kV
ESD MM Machine Model ESD Protection 300 V
VIN Input Voltage 6.5 V
VOUT Output Voltage VIN +0.3 V
VEN , VFLG Enable Voltage 6.5 V
ILOAD Maximum Continuous Load Current Internal Limited A
TJMAX Maximum Junction Temperature 150 °C
TST Storage Temperature Range (Note 4) -65 to +150 °C
Note: 4. UL Recognized Rating from -30°C to +70°C (Diodes qualified TST from -65°C to +150°C).
Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Symbol Parameter Min Max Unit
VIN Input Voltage 2.7 5.5 V
IOUT Output Current 0 1.0 A
VIL EN Input Logic Low Voltage 0 0.8 V
VIH EN Input Logic High Voltage 2 VIN V
TA Operating Ambient Temperature -40 +85 °C
Thermal
Sense
FLG
OUT
GND
IN
EN
UVLO
Current
Limit
Current
Sense
Deglitch
Discharge
Control
Driver
AP2161D/AP2171D
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AP2161D/AP2171D
Electrical Characteristics (@TA = +25°C, VIN = +5.0V, unless otherwise specified.)
Symbol Parameter Test Conditions Min Typ Max Unit
VUVLO Input UVLO 1.6 1.9 2.5 V
ISHDN Input Shutdown Current Disabled, IOUT = 0 0.5 1 µA
IQ Input Quiescent Current Enabled, IOUT = 0 45 70 µA
ILEAK Input Leakage Current Disabled, OUT grounded 0.1 1 µA
IREV Reverse Leakage Current Disabled, VIN = 0V, VOUT = 5V, IREV at VIN 0.1 1 µA
RDS(ON) Switch On-Resistance VIN = 5V,
IOUT= 1A TA = +25°C SOT25, MSOP-8,
MSOP-8EP, SO-8 95 115
m
U-DFN2018-6 90 110
-40°C TA +85°C 140
VIN = 3.3V, IOUT=
1A TA = +25°C 120 140
-40°C TA +85°C 170
ISHORT Short-Circuit Current Limit Enabled into short circuit, CL = 22µF 1.2 A
ILIMIT Over-Load Current Limit VIN = 5V, VOUT = 4.0V, CL = 120µF, -40°C TA +85°C 1.1 1.5 1.9 A
ITrig Current Limiting Trigger Threshold Output Current Slew rate (<100A/s) , CL = 22µF 2.0 A
VIL EN Input Logic Low Voltage VIN = 2.7V to 5.5V 0.8 V
VIH EN Input Logic High Voltage VIN = 2.7V to 5.5V 2 V
ISINK EN Input Leakage VEN = 5V 1 µA
TD(ON) Output Turn-On Delay Time CL = 1µF, RLOAD = 10 0.05 ms
TR Output Turn-On Rise Time CL = 1µF, RLOAD = 10 0.6 1.5 ms
TD(OFF) Output Turn-Off Delay Time CL = 1µF, RLOAD = 10 0.05 ms
TF Output Turn-Off Fall Time CL = 1µF, RLOAD = 10 0.05 0.1 ms
RFLG FLG Output FET On-Resistance IFLG = 10mA 20 40
TBlank FLG Blanking Time CIN = 10µF, CL = 22µF 4 7 15 ms
RDIS Discharge Resistance (Note 5) VIN = 5V, disabled, IOUT = 1mA 100
TDIS Discharge Time CL = 1µF, VIN = 5V, disabled to VOUT < 0.5V 0.6 ms
TSHDN Thermal Shutdown Threshold Enabled, RLOAD = 1k 140 °C
THYS Thermal Shutdown Hysteresis 25 °C
JA Thermal Resistance Junction-to-
Ambient
SOT25 (Note 6) 170
°C/W
SO-8 (Note 6) 127
MSOP-8 (Note 6) 118
MSOP-8EP (Note 7) 67
U-DFN2018-6 (Note 7) 70
Notes: 5. The discharge function is active when the device is disabled (when enable is de-asserted). The discharge func tion offers a resistive discharge path
for the external storage capacitor.
6. Device mounted on FR-4 4 substrate PCB, 2oz copper, with minimum recommended pad layout.
7. Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top layer and thermal vias to bottom layer ground
plane.
AP2161D/AP2171D
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AP2161D/AP2171D
Typical Performance Characteristics
VEN
90%
VOUT
TD(ON)
10%
TD(OFF)
50% 50%
TR
10%
90%
TF
VEN
90%
VOUT
TD(ON)
10%
TD(OFF)
50% 50%
TR
10%
90%
TF
Figure 1 Voltage Waveforms: AP2161D (left), AP2171D (right)
All Enable Plots are for AP2171D Active High
Turn-On Delay and Rise Time
100µs/div
Turn-Off Delay and Fall Time
100µs/div
Turn-On Delay and Rise Time
500µs/div
Turn-Off Delay and Fall Time
500µs/div
VOUT
2V/div
VEN
5V/div
CL = 1µF
TA = +25°C
RL = 10
VOUT
2V/div
VEN
5V/div
CL =1µF
TA = +25°C
RL = 10
VOUT
2V/div
VEN
5V/div
CL = 120µF
TA = +25°C
RL = 10
VOUT
2V/div
VEN
5V/div
CL = 120µF
TA = +25°C
RL =10
AP2161D/AP2171D
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AP2161D/AP2171D
Typical Performance Characteristics (cont.)
Short Circuit Current,
Device Enabled Into Short
100µs/div
Short Circuit with Blanking Time and Recovery
20ms/div
1 Load Connected to Enabled Device
1ms/div
2 Load Connected to Enabled Device
1ms/div
IOUT
500mA/d
VEN
5V/div
VIN = 5V
TA = +25°C
C
L
= 22
µ
F
IOUT
1A/div
VFLAG
2V/div VIN = 5V
TA = +25°C
CL = 22µF
IOUT
1A/div
VFLAG
2V/div VIN = 5V
TA = +25°C
CL = 22µF
IOUT
1A/div
VOUT
5V/div
VIN = 5V
TA = +25°C
CL = 22µF
VFLAG
2V/div
AP2161D/AP2171D
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AP2161D/AP2171D
Typical Performance Characteristics (cont.)
Power On
2ms/div
Power Off
20ms/div
UVLO Increasing
2ms/div
UVLO Decreasing
20ms/div
Discharge Time
No Load Resistance
100ms/div
Inrush Current
1ms/div
IOUT
500mA/d
VIN
2V/div
VIN
2V/div
IOUT
500mA/div
TA = +25°C
CL = 22µF
RL = 10 TA = +25°C
CL = 22µF
RL = 10
VOUT
2V/div
VEN
2V/div
IIN
400mA/d
VEN
5V/div
VIN = 5V
TA = +25°C
RL = 10
CL=680µF
CL=220µF
CL=100µF
CL=22µF
CL = 470µF
CL = 120µF
TA = +25°C
VIN = 5V
No Load
VOUT
5V/div
VFLAG
5V/div
TA = +25°C
CL = 120µF
RL = 10
IOUT
500mA/d
VEN
5V/div
VOUT 5V/div
VFLAG
5V/div
IOUT
500mA/d
VEN 5V/div
TA = +25°C
CL = 120µF
RL = 10
AP2161D/AP2171D
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AP2161D/AP2171D
Typical Performance Characteristics (cont.)
Turn- O n Time vs I nput Vol t a ge
0
100
200
300
400
500
600
700
800
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V )
Turn-On Time (us)
Turn- Off Ti m e vs I np ut Vol t age
28
28
29
29
30
30
31
31
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V)
Turn-Off Time (us)
Rise Time vs Input Vol tage
0
100
200
300
400
500
600
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V )
Rise Time (us)
Fal l Time vs I nput Vol tage
19
20
21
22
23
24
25
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V)
Fall Ti me (us)
Supply Curr ent , Out put Enabled vs A m bient Tem pe ra t ur e
30
35
40
45
50
55
60
65
-60 -40 -20 0 20 40 60 80 100
Ambient Temperatur e (°C )
Supply Current, Output Ena b l e d (u A)
Supply Current, O ut put Di sabl ed vs Am bi ent Temper atur e
0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
1.60
-45 -25 -5 15 35 55 75 95
Ambi ent Temperature (°C)
Supply Current, Output Disabled (uA)
CL = 1µF
RL = 10
TA = +25°C
CL = 1µF
RL = 10
T
A
=+
°
VIN = 2.7V
VIN = 5.0V
VIN = 3.3V
VIN = 5.5V
V
IN
= 5.0V
VIN = 5.5V
V
IN
=3.3V
VIN = 2.7V
CL = 1µF
RL = 10
TA = 25°C
CL = 1µF
RL = 10
TA = +25°C
AP2161D/AP2171D
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AP2161D/AP2171D
Typical Performance Characteristics (cont.)
Stati c Drai n- Source O n-Stat e Resi stance vs A m bi ent
Temperature
100
110
120
130
140
150
160
170
180
190
200
-60 -40 -20 0 20 40 60 80 100
Ambient Temperature (°C)
Static Drain-Source On-State
Resistance (m)
Shor t -Cir cuit O utput Current vs A mbie nt Te m pe r ature
630
640
650
660
670
680
690
700
710
-60 -40 -20 0 20 40 60 80 100
Ambi ent Tempera tu re (°C)
Short-Circuit Output Current (mA)
Undervolt age Lockout vs Ambi ent Tem per atur e
1.95
1.96
1.97
1.98
1.99
2.00
2.01
2.02
2.03
2.04
2.05
-60 -40 -20 0 20 40 60 80 100
Ambient Temperature (°C)
Undervoltage Lockout (V)
Threshol d Tr i p Cur re nt vs I nput Vol t age
1.10
1.11
1.12
1.13
1.14
1.15
2.83.33.84.34.85.3
Input Voltage (V)
Threshold Trip Current (A)
UVLO Falling
UVLO Rising
TA = +25°C
CL = 22µF
V
IN
=
2.7V
VIN = 3.3V
V
IN
=
5
V
VIN =2.7V VIN = 3.3V VIN = 5.0V
VIN = 5.5V
AP2161D/AP2171D
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AP2161D/AP2171D
Application Note
The AP2161D and AP2171D are integrated high-side power switches optimized for Universal Serial Bus (USB) that require protection functions.
The power switches are equipped with a driver that controls the gate voltage and incorporates slew-rate limitation. This, along with the various
protection features and special functions, makes these power switches ideal for hot-swap or hot-plug applications.
Protection Features:
Under-voltage Lockout (UVLO)
Under-voltage lockout function (UVLO) guarantees that the intern al power switch is initially off during start-up. The UVLO functions only when the
switch is enabled. Even if the switch is enabled, the switch is not turned ON until the power suppl y has reached at least 1.9V. Whenever the input
voltage falls below approximately 1.9V, the power switch is turned off. This facilitates the design of hot-insertion systems where it is not possible to
turn off the power switch before input power is removed.
Over-current and Short Circuit Protection
An internal sensing FET is employed to check for over-current conditions. Unlike current-sense resistors, sense FETs do not increase the series
resistance of the current path. When an over-current condition is detected, the device maintains a constant output current and reduc es the output
voltage accordingly. Complete shutdown occurs only if the fault stays long enough to activate thermal limiting.
The different overload conditions and the corresponding response of the AP2161D/2171D are outlined below:
S.NO Con diti ons Explanation Behavior of the AP2161D/2171D
1 Short circuit condition at
start-up
Output is shorted before input
voltage is applied or before the
part is enabled
The IC senses the short circuit and immediately clamps output
current to a certain safe level namely ILIMIT.
2 Short-circuit or over-current
condition
Short-Circuit or Overload
condition that occurs when the
part is enabled.
At the instance the overload occurs, higher current may flow
for a very short period of time before the current limit function
can react.
After the current limit function has tripped (reached the over-
current trip threshold), the device switches into current limiting
mode and the current is clamped at ILIMIT.
3 Gradual increase from
nominal operating current to
ILIMIT
Load increases gradually until
the current-limit threshold.(ITRIG)
The current rises until ITRIG or thermal limit. Once the threshold
has been reached, the device switches into its current limiting
mode and is set at ILIMIT.
Note that when the output has been shorted to GND at extremely low temperature (< -30°C), a minimum 120-F electrolytic capacitor on the
output pin is recommended. A correct capacitor type with capacitor voltage rating and temperature characteristics must be properly chosen so
that capacitance value does not drop too low at the extremely low temperature operation. A recommended capacitor should have temperature
characteristics of less than 10% variation of capacitance change when operated at extremely low temp. Our recommended aluminum electrolytic
capacitor type is Panasonic FC series.
Thermal Protection
Thermal protection prevents the IC from damage when the die temperature exceeds safe margins. This mainly occurs when heavy-overload or
short-circuit faults are present for extended periods of time. The AP2161D/AP2171D implements thermal sensing to monitor the operating junction
temperature of the power distribution switch. Once the die temperature rises to approximately +140°C, the Thermal protection feature gets
activated as follows: The internal thermal sense circuitry turns the power switch off and the FLG output is asserted thus preventing the power
switch from damage. Hysteresis in the thermal sense circuit allows the device to cool down to approximately +25°C before the output is turned
back on. The built-in thermal hysteresis feature avoids undesirable oscillations of the thermal protection circuit. The switch continues to c ycle in
this manner until the load fault is removed, resulting in a pulsed output. The FLG open-drain output is asserted when an over-current occurs with
7-ms deglitch.
Reverse Current Pro t ectio n
In a normal MOSFET switch, current can flow in reverse direction (from the output side to the input side) when the output side voltage is higher
than the input side, even when the switch is turned off. A reverse-current blocking feature is implemented in the AP21x1 series to prevent such
back currents. This circuit is activated by the difference between the output voltage and the input voltage. When the switch is disabled, this feature
blocks reverse current flow from the output back to the input.
AP2161D/AP2171D
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AP2161D/AP2171D
Application Note (cont.)
Special Functions:
Discharge Function
When enable is de-asserted, the discharge func tion is active. The output capacitor is discharged through an internal NMOS t hat has a discharge
resistance of 100. Hence, the output voltage drops down to zero. The time taken for discharge is dependent on the RC time constant of the
resistance and the output capacitor.
FLG Response
The FLG open-drain output goes active low for any of the two conditions: Over-Current or Over-Temperature. The time from when a fault condition
is encountered to when the FLG output goes low is 7-ms (TYP). The FLG output remains low until both over-current and over-temperature
conditions are removed. Connecting a heavy capacitive load to the output of the device can cause a momentary Over-current condition, which
does not trigger the FLG due to the 7-ms deglitch timeout. The 7- ms timeout is also applicable for Over-current recovery and Thermal recovery.
The AP2161D/AP2171D are designed to eliminate erroneous Over-current reporting without the need for external components, such as an RC
delay network.
Applications Information:
Power Supply Considerations
A 0.01-F to 0.1-F X7R or X5R ceramic bypass capacitor between IN and GND, close to the device, is recommended. This limits the input
voltage drop during line transients. Placing a high-value electrolytic capacitor on the input (10-F minimum) and output pin(s) is recommended
when the output load is heavy. This precaution also reduces power-supply transients that may cause ringing on the input. Additionally, bypassing
the output with a 0.01-F to 0.1-F ceramic capacitor improves the immunity of the device to short-circuit transients. This capacitor also prevents
output from going negative during turn-off due to inductive parasitics.
Power Dissipation and Junction Temperature
The low on-resistance of the internal MOSFET allows the small surface-mount packages to pass large current. Using the maximum operating
ambient temperature (TA) and RDS(ON), the power dissipation can be calculated by:
PD = RDS(ON)× I2
The junction temperature can be calculated by:
TJ = PD x RJA + TA
Where:
TA = Ambient Temperature °C
RJA = Thermal Resistance
PD = Total Power Dissipation
Generic Hot-Plug Applications
In many applications it may be necessary to remove modules or PC boards while the main unit is still operating. These are considered hot-plug
applications. Such implementations require the control of current su rges as seen b y the main power s uppl y and the card being inserted . The most
effective way to control these surges is to limit and slowly r amp up the current and voltage being applied to the card, similar to the way in which a
power supply normally turns on. D ue to the cont rolled rise and fall times of the AP2161D/AP2171D, these devices can be used to pro vide a softer
start-up to devices being hot-plugged into a powered system. The UVLO feature of the AP2161D/AP2171D also ensures that the switch is off after
the card has been removed, and that the switch is off during the next insertion.
By placing the AP2161D/AP2171D between the VCC input and the rest of the circuitry, the input power reaches these devices first after insertion.
The typical rise time of the switch is approximatel y 1ms, providing a slow voltage ramp at the output of the device. This implementation controls
the system surge current and provides a hot-plugging mechanism for any device.
AP2161D/AP2171D
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AP2161D/AP2171D
Ordering Information
AP 21 X 1 D XX G - X
6 : A c tiv e L o w
7 : Ac tiv e Hig h G : Green 7/13 : Tape & R eel
1 : 1 Channel
Channel Green
PackageEnable Packing
S : SO -8
M 8 : MS O P-8
MP : MSOP-8EP
W : SOT 2 5
FM : U-DFN2018-6
Part Number Package Code Packaging 7”/13” Tape and Reel
Quantity Part Number Suffix
AP21X1DSG-13 S SO-8 2500/Tape & Reel -13
AP21X1DM8G-13 M8 MSOP-8 2500/Tape & Reel -13
AP21X1DMPG-13 MP MSOP-8EP 2500/Tape & Reel -13
AP21X1DWG-7 W SOT25 3000/Tape & Reel -7
AP21X1DFMG-7 FM U-DFN2018-6 3000/Tape & Reel -7
Marking Information
(1) SO-8
AP21X X D
( Top View )
YY WW X X
Part Number
Logo
WW : Week : 01~52; 52
YY : Year : 08, 09,10~
G : Green
X : Internal Code
8765
1234
6 : Active Low
7 : Active High
1 : 1 Channel
represents 52 and 53 week
(2) MSOP-8
AP23 X 1
( Top view )
Y W X
Part Number
Logo Y : Year : 0~9
A~Z : Green
8765
1234
0 : Active Low
1 : Active High 1 : 1 Channel
a~z : 27~52 week; z represents
W : Week : A~Z : 1~26 week;
52 and 53 week
X: In te rn a l C o d e
Y: Ye a r : 0 ~9
W: Week : A~Z : 1~26 week;
a~z: 27~52 week; z represents
52 and 53 week
1 : 1 Channel
AP21 X 1 D
Logo
Part Number
6 : Active Low
7 : Active High
AP2161D/AP2171D
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AP2161D/AP2171D
Marking Information (cont.)
(3) MSOP-8EP
(4) SOT25
1 2 3
5
7
4
XX YW X
XX : Identification code
W : Week : A~Z : 1~26 week;
X : A~Z : Green
( Top View )
Y : Year 0~9
a~z : 27~52 week; z represents
52 and 53 week
(5) U-DFN2018-6
AP23 X 1
( Top view )
Y W X E
Part Number
Logo Y : Year : 0~9
A~Z : Green
8765
1234
0 : Active Low
1 : Active High 1 : 1 Channel
a~z : 27~52 week; z represents
W : Week : A~Z : 1~26 week;
52 and 53 week
MSOP-8-EP
X: In te r n a l C o d e
MSOP-8EP
Y: Ye ar : 0~9
W: Week : A~ Z : 1~26 week ;
a~z: 27~52 week; z represents
52 and 53 week
1 : 1 Channel
Logo
Part Number
6: Acti ve Low
7: Active High
AP21 X 1 D
Device Package Type Identification Code
AP2161DW SOT25 JC
AP2171DW SOT25 JD
Device Package Type Identification Code
AP2161DFM U-DFN2018-6 JC
AP2171DFM U-DFN2018-6 JD
AP2161D/AP2171D
Document number: DS32250 Rev. 5 - 2 14 of 19
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AP2161D/AP2171D
Package Outline Dimensions (All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.
(1) SO-8
(2) MSOP-8
(3) MSOP-8EP
SO-8
Dim Min Max
A - 1.75
A1 0.10 0.20
A2 1.30 1.50
A3 0.15 0.25
b 0.3 0.5
D 4.85 4.95
E 5.90 6.10
E1 3.85 3.95
e 1.27 Typ
h - 0.35
L 0.62 0.82
 0 8
All Dimensions in mm
MSOP-8
Dim Min Max Typ
A - 1.10 -
A1 0.05 0.15 0.10
A2 0.75 0.95 0.86
A3 0.29 0.49 0.39
b 0.22 0.38 0.30
c 0.08 0.23 0.15
D 2.90 3.10 3.00
E 4.70 5.10 4.90
E1 2.90 3.10 3.00
E3 2.85 3.05 2.95
e - - 0.65
L 0.40 0.80 0.60
a 8° 4°
x - - 0.750
y - - 0.750
All Dimensions in mm
MSOP-8EP
Dim Min Max Typ
A - 1.10 -
A1 0.05 0.15 0.10
A2 0.75 0.95 0.86
A3 0.29 0.49 0.39
b 0.22 0.38 0.30
c 0.08 0.23 0.15
D 2.90 3.10 3.00
D1 1.60 2.00 1.80
E 4.70 5.10 4.90
E1 2.90 3.10 3.00
E2 1.30 1.70 1.50
E3 2.85 3.05 2.95
e - - 0.65
L 0.40 0.80 0.60
a 8° 4°
x - - 0.750
y - - 0.750
All Dimensions in mm
Gauge Plane
Seating Plane
Det ail ‘A
Det ail ‘A
E
E1
h
L
D
eb
A2
A1
A
45
°
7
°~
9
°
A3
0.254
A
A1
A2
e
Seating Pl ane
Gauge Plane
L
See Detail C
Detail C
c
a
E1
E3
A3
1
E
y
x
D
b
0.25
4x10°
4x10°
1
D
A
A1
A2
E
e
y
x
Seating Plane
Gauge Plane
L
D
8Xb
See Detail C
Deta il C
c
a
E1
E3
A3
E2
4X10°
4X10°
0.25
D1
AP2161D/AP2171D
Document number: DS32250 Rev. 5 - 2 15 of 19
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AP2161D/AP2171D
Package Outline Dimensions (cont.) (All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.
(4) SOT25
(5) U-DFN2018-6
SOT25
Dim Min Max Typ
A 0.35 0.50 0.38
B 1.50 1.70 1.60
C 2.70 3.00 2.80
D   0.95
H 2.90 3.10 3.00
J 0.013 0.10 0.05
K 1.00 1.30 1.10
L 0.35 0.55 0.40
M 0.10 0.20 0.15
N 0.70 0.80 0.75
 0° 8°

All Dimensions in mm
U-DFN2018-6
Dim Min Max Typ
A 0.545 0.605 0.575
A1 0 0.05 0.02
A3   0.13
b 0.15 0.25 0.20
D 1.750 1.875 1.80
D2 1.30 1.50 1.40
e   0.50
E 1.95 2.075 2.00
E2 0.90 1.10 1.00
L 0.20 0.30 0.25
z 0.30
All Dimensions in mm
A
M
JL
D
B C
H
KN
SEATING PLAN E
EE2
L
A
D
D2
A3
A1
eb
Pin#1 ID
z
AP2161D/AP2171D
Document number: DS32250 Rev. 5 - 2 16 of 19
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AP2161D/AP2171D
Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(1) SO-8
(2) MSOP-8
(3) MSOP-8-EP
Dimensions Value (in mm)
X 0.60
Y 1.55
C1 5.4
C2 1.27
Dimensions Value (in mm)
C 0.650
X 0.450
Y 1.350
Y1 5.300
Dimensions Value
(in mm)
C 0.650
G 0.450
X 0.450
X1 2.000
Y 1.350
Y1 1.700
Y2 5.300
X
C1
C2
Y
X C
Y
Y1
G
X C
Y
Y2 Y1
X1
AP2161D/AP2171D
Document number: DS32250 Rev. 5 - 2 17 of 19
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© Diodes Incorporated
AP2161D/AP2171D
Suggested Pad Layout (cont.)
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(4) SOT25
(5) U-DFN2018-6
Dimensions Value (in mm)
Z 3.20
G 1.60
X 0.55
Y 0.80
C1 2.40
C2 0.95
Dimensions Value (in mm)
C 0.50
G 0.20
X 0.25
X1 1.60
Y 0.35
Y1 1.20
X
Z
Y
C1
C2C2
G
Y
XC
X1
G
Y1
AP2161D/AP2171D
Document number: DS32250 Rev. 5 - 2 18 of 19
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AP2161D/AP2171D
Taping Orientation (Note 8)
For U-DFN2018-6
Note: 8. The taping orientation of the other package type can be found on our website at http://www.diodes.com/datasheets/ap02007.pdf
AP2161D/AP2171D
Document number: DS32250 Rev. 5 - 2 19 of 19
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AP2161D/AP2171D
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