Description
The A4970 motor driver drives both windings of a bipolar stepper
motor or bidirectionally controls two DC motors. Both bridges
are capable of sustaining 45 V and include internal pulse-width
modulation (PWM) control of the output current to 750 mA.
For PWM current control, the maximum output current is
determined by user selection of a reference voltage and sensing
resistor. Two logic-level inputs select output current limits of
0%, 33%, 67%, or 100% of the maximum level. A PHASE input
to each bridge determines load current direction.
Intrinsic diodes in the MOSFET output structure protect
against inductive transients. Internally generated delays prevent
crossover currents when switching current direction. Special
power-up sequencing is not required. Thermal protection
circuitry disables the outputs if the chip temperature exceeds
safe operating limits.
The device is supplied in a 24-pin surface-mount wide SOIC with
two pairs of batwing leads (LB). The webbed-pin construction
provides for maximum package power dissipation in the smallest
possible construction. The package is lead (Pb) free, with 100%
matte tin leadframe plating.
A4970CDS, Rev. 1
Features and Benefits
▪ 750 mA continuous output current
▪ 45 V output sustaining voltage
▪ Internal clamp diodes
▪ Internal PWM current control
▪ Low output saturation voltage
▪ Internal thermal shutdown circuitry
▪ Pin compatible with UDx2916
▪ DMOS outputs
Dual Full-Bridge PWM Motor Driver
Not to scale
A4970
PWM Current-Control Circuitry
VREF
VBB
M
SENSE ONE
Divide by
1, 1.5, or 3
SHOT
SOURCE
DISABLE
RC
–
+
I0
I1
w10
E
OUTAOUTB
Channel 1
pin numbers
shown.
RC
RSRT
CC
CT
24
16
15
9
13
12
10
14
17
Package: 24-pin batwing wide SOIC
(package LB)
Dual Full-Bridge Motor Driver
A4970
2
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Selection Guide
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
Motor Supply Voltage VBB 45 V
Logic Supply Voltage VCC 6.0 V
Input Voltage VIN I0x, I1x, PHASEx pins –0.3 to 6.0 V
Reference Input Voltage VREF VREF pin –0.3 to 8.0 V
Output Emitter Voltage VE750 mV
Sense Voltage VSENSE 750 mV
Output Current* IOUT
Peak Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or TJ(max)
1.0 A
Continuous 750 mA
Package Power Dissipation PDSee graph — W
Operating Ambient Temperature TA
Range G –40 to 105 ºC
Range S –20 to 85 ºC
Maximum Junction Temperature TJ(max) 150 ºC
Storage Temperature Tstg –55 to 150 ºC
Part Number Package Packing Ambient Temperature
(°C)
A4970GLBTR-T 24-pin batwing SOICW 1000 per reel –40 to 105
A4970SLBTR-T 24-pin batwing SOICW 1000 per reel –20 to 85
Dual Full-Bridge Motor Driver
A4970
3
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
50 75 100 125
150
5
1
0
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
TEMPERATURE IN °C
4
3
2
25
R = 6.0°C/W
R = 55°C/W*
JT
JA
*Measured on a single-layer board, with 1 sq. in. of 2 oz copper area.
For additional information, refer to the Allegro Web site.
Pin-out Diagram
Power Dissipation
V
BB
24
23
22
21
20
17
16
15
14
13
GROUND
GROUND
2B
OUT
SENSE
2
2
E
2A
OUT
1A
OUT
1
E
SENSE
1
1B
OUT
01
I
LOAD SUPPLY
1
2
3
4
5
8
9
12
11
10
9
GROUND
GROUND
02
I
12
I
PHASE
2
V
REF 2
2
RC
V
CC
1
RC
V
REF 1
PHASE
1
11
I
LOGIC SUPPLY
PWM 2
PWM 1
θ
1
θ
2
6
7
19
18
Dual Full-Bridge Motor Driver
A4970
4
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS Valid at TA = 25°C, TJ ≤ 150°C, VBB = 45 V, VCC = 4.75 to 5.25 V, VREF = 5.0 V,
unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
Output Drivers (OUTA or OUTB)
Motor Supply Range VBB 7.45 – 45 V
Output Leakage Current ICEX
I0 = I1 = 2.4 V, VOUT = 45.0 V – < 1.0 50 μA
VOUT = 0.0 V – < –1.0 –50 μA
Output MOSFET On Resistance RDS(on)
Sink Driver, IOUT = 750 mA – 0.3 0.75 Ω
Source Driver, IOUT = –750 mA – 1.0 1.85 Ω
Clamp Diode Leakage Current IRVR = 45 V – < 1.0 50 μA
Clamp Diode Forward Voltage VFIF = 750 mA – 0.95 2 V
Driver Supply Current IBB(ON) Both bridges on, I0 = I1 = 0.8 V, no load – 5 10 mA
IBB(OFF) Both bridges off, I0 = I1 = 2.4 V, no load – 3 7.5 mA
Control Logic
Input Voltage VIN(1) All inputs 2.4 – – V
VIN(0) All inputs – – 0.8 V
Input Current IIN(1) VIN = 2.4 V – <1.0 20 μA
VIN = 0.8 V – – 3.0 –200 μA
Reference Voltage Range VREF Operating 1.5 – 7.5 V
Reference Input Current IREF VREF = 7.5 V – – 150 μA
Current Limit Threshold VREF/
VSENSE
I0 = I1 = 0.8 V 9.5 10 10.5 –
I0 = 2.4 V, I1 = 0.8 V 13.5 15 16.5 –
I0 = 0.8 V, I1 = 2.4 V 25.5 30 34.5 –
Thermal Shutdown Temperature TJ– 170 – °C
Total Logic Supply Current ICC(ON) I0 = I1 = 0.8 V, no load – 3.0 7.5 mA
ICC(OFF) I0 = I1 = 2.4 V, no load – 3.5 7.5 mA
Fixed Off-Time toff RT = 56 kΩ, CT = 820 pF 42 46 50 μs
VCC Undervoltage Lockout (UVLO)
Threshold VCCUVLO VCC rising – 4 – V
VCC Undervoltage Lockout (UVLO)
Threshold VCCUVLOHYS – 200 – mV
Dual Full-Bridge Motor Driver
A4970
5
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
APPLICATIONS INFORMATION
PWM CURRENT CONTROL
The A4970 dual bridges drive both windings of a bipolar stepper
motor. Output current is sensed and controlled independently
in each bridge by an external sense resistor, RS , internal
comparator, and monostable multivibrator.
When the bridge is turned on, current increases in the motor
winding and it is sensed by the external sense resistor until the
sense voltage, VSENSE , reaches the level set at the comparator
input:
ITRIP = VREF/10 RS
The comparator then triggers the monostable, which turns off
the source driver of the bridge.
The actual load current peak will be slightly higher than the
trip point (especially for low-inductance loads) because of the
internal logic and switching delays. This delay, td , is typically 2
μs. After turn-off, the motor current decays, circulating through
the ground-clamp diode and sink transistor. The source driver
off-time (and therefore the magnitude of the current decrease)
is determined by the external RC timing components of the
monostable:
toff = RTCT
where:
RT = 20 to 100 kΩ, and
CT = 100 to 1000 pF.
The fi xed off-time should be short enough to keep the current
chopping above the audible range (< 46 μs) and long enough to
properly regulate the current. Because only slow-decay current
control is available, short off times (< 10 μs) require additional
efforts to ensure proper current regulation. Factors that can
negatively affect the ability to properly regulate the current when
using short off times include: higher motor-supply voltage, light
load, and longer than necessary blank time.
When the source driver is re-enabled, the winding current (the
sense voltage) is again allowed to rise to the comparator’s
threshold. This cycle repeats itself, maintaining the average
motor winding current at the desired level.
Loads with high distributed capacitances may result in high turn-
on current peaks. This peak (appearing across RS) will attempt
to trip the comparator, resulting in erroneous current control or
high-frequency oscillations. An external RCCC time delay should
be used to further delay the action of the comparator.
The time constant for the delay to produce suitable blank time can
be estimated using:
RCCC = 0.0114 × RTCT
This equation assumes that the current control loop duty cycle
is greater than 5% and the voltage on the SENSE pin will reach
99% of the target value set for VSENSE. These assumptions will
apply to the majority of applications and can be regarded as a
starting value for further optimization by calculation or waveform
measurement.
Depending on load type, many applications will not require these
external components (SENSE connected to E).
PWM OUTPUT CURRENT WAVE FORM
LOAD CURRENT PATHS
+
–
0
Dwg. WM-003-1A
VPHASE
IOUT
tdtoff
I
TRIP
RS
BB
V
Bridge On
Source Off, Slow Decay
All Off, Fast Decay
Dual Full-Bridge Motor Driver
A4970
6
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
LOGIC CONTROL OF OUTPUT CURRENT
Two logic level inputs (I0 and I1) allow digital selection of the motor
winding current at 100%, 67%, 33%, or 0% of the maximum level per the
table. The 0% output current condition turns off all drivers in the bridge and
can be used as an OUTPUT ENABLE function.
CURRENT-CONTROL TRUTH TABLE
l
0 I
1 Output Current
L L VREF/10 RS = ITRIP
H L VREF/15 RS = 2/3 ITRIP
L H VREF/30 RS = 1/3 ITRIP
H H 0
These logic level inputs greatly enhance the implementation of microprocessor
controlled drive formats.
During half-step operations, the I0 and I1 allow the microprocessor to
control the motor at a constant torque between all positions in an eight-step se-
TYPICAL APPLICATION
quence. This is accomplished by digitally selecting
100% drive current when only one phase is on and
67% drive current when two phases are on. Logic
highs on both I0 and I1 turn-off all drivers to allow
rapid current decay when switching phases. This
helps to ensure proper motor operation at high step
rates.
The logic control inputs can also be used to
select a reduced current level (and reduced power
dissipation) for "hold" conditions and/or increased
current (and available torque) for start-up condi-
tions.
GENERAL
The PHASE input to each bridge determines
the direction motor winding current fl ows. An in-
ternally generated dead time (approximately 2 μs)
prevents crossover currents that can occur when
switching the PHASE input.
All four drivers in the bridge output can be
turned-off between steps (I0 = I1 ≥ 2.4 V), result-
ing in a fast current decay through the internal
output clamp and fl yback diodes. The fast current
decay is desirable in half-step and high-speed ap-
plications. The PHASE, I0,and I1 inputs fl oat high.
Varying the reference voltage, VREF , pro-
vides continuous control of the peak load current
for micro-stepping applications.
Thermal protection circuitry turns-off all
drivers when the junction temperature reaches
+170°C. It is only intended to protect the device
from failures due to excessive junction tempera-
ture and should not imply that output short circuits
are permitted. The output drivers are re-enabled
when the junction temperature cools to +145°C.
The A4970 output drivers are optimized for
500 mA operating current. Under normal operat-
ing conditions, when combined with the excellent
thermal properties of the package designs, this
allows continuous operation of both bridges simul-
taneously at 500 mA.
FROM
μP
FROM
μP
VREF
VREF
+5 V
STEPPER
MOTOR
RS
RC
CC
RS
RC
CC
VBB
+
CT
820 pF
56 k7
RT
CT
820 pF
56 k7
RT
VBB
24
23
22
21
20
17
16
15
14
13
1
2
3
4
5
8
9
12
11
10
9
VCC
PWM 2
PWM 1
θ
1
θ 2
19
18
6
7
6
7
19
18
TRUTH TABLE
PHASE OUTA OUTB
H H L
L L H
Dual Full-Bridge Motor Driver
A4970
7
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Current Sensing
To minimize current sensing inaccuracies caused by ground trace
IR drops, each current-sensing resistor should have a separate
return to the ground terminal of the device. For low-value sense
resistors, the IR drops in the PCB can be signifi cant and should
be taken into account. The use of sockets should be avoided as
their contact resistance can cause variations in the effective value
of RS.
Generally, larger values of RS reduce the aforementioned effects
but can result in excessive heating and power loss in the sense
resistor. The selected value of RS should not cause the maximum
operating voltage of 0.75 V (VREF(max)/10), for the VE terminal,
to be exceeded. The recommended value of RS is in the range of:
RS = 0.50 / ITRIP(max) .
If desired, the reference input voltage can be fi ltered by placing
a capacitor from VREF to ground. The ground return for this
capacitor as well as the bottom of any resistor divider used
should be independent of the high-current power-ground trace to
avoid changes in VREF due to IR drops.
Thermal Considerations
For normal operation it is recommended that the maximum
operating junction temperature be 145°C, which is below the
operating range of the TSD system. The junction temperature can
be measured best by attaching a thermocouple to the batwing of
the device, and measuring the pin temperature, TPIN. The junction
temperature can then be approximated by using the formula:
TJ = TPIN + (2 × ILOAD × VF × RθJT) ,
where VF can be chosen from the electrical specifi cation table
for the given level of ILOAD. The value for RθJT is approximately
6°C/W.
The power dissipation of the batwing package can be improved
20% to 30% by adding a section of printed circuit board copper
(typically 6 to 18 square centimeters) connected to the batwing
terminals of the device.
The thermal performance in applications that run at high load
currents, high duty cycles, or both, can be improved by adding
external diodes from each output to ground in parallel with the
internal diodes. Fast-recovery (≤200 ns) diodes should be used to
minimize switching losses.
Load Supply Terminal
The load supply terminal, VBB, should be decoupled with an
electrolytic capacitor (≥47 μF is recommended), placed as close
to the device as is physically practical. To minimize the effect of
system ground IR drops on the logic and reference input signals,
the system ground should have a low-resistance return to the load
supply voltage.
Fixed Off-Time Selection
With increasing values of tOFF, switching losses decrease, low-
level load current regulation improves, EMI reduces, PWM
frequency decreases, and ripple current increases. The value of
tOFF can be chosen for optimization of these parameters. For
applications where audible noise is a concern, typical values of
tOFF should be chosen in the range of 15 to 35 μs.
APPLICATION NOTES
Dual Full-Bridge Motor Driver
A4970
8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package LB, 24-pin SOICW
External batwings, Pins 6, 7, 18, and 19 are fused internally
1.27
BReference pad layout (reference IPC SOIC127P1030X265-24M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
B
0.20 ±0.10
0.41 ±0.10
2.20
0.65
9.60
1.27
21
24
A
15.40±0.20
2.65 MAX
10.30±0.33
7.50±0.10
C
SEATING
PLANE
C0.10
24X
For Reference Only
Pins 6, 7, 18, and 19 are fused internally
(Reference JEDEC MS-013 AD)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
ATerminal #1 mark area
0.25
GAUGE PLANE
SEATING PLANE PCB Layout Reference View
4° ±4
0.27 +0.07
–0.06
0.84 +0.44
–0.43
21
24
Dual Full-Bridge Motor Driver
A4970
9
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Copyright ©2009-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to
permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, LLC assumes no re spon si bil i ty for its
use; nor for any in fringe ment of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Revision History
Revision Revision Date Description of Revision
Rev. 1 December 19, 2011 Add G temperature range
