TRI-STATE Outputs General Description The ACQ/ACTQ544 is an inverting octal transceiver con- taining two sets of D-type registers for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to per- mit independent input and output control in either direction of data flow. The 544 inverts data in both directions. The ACQ/?ACTQ utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance. (AV vational Semiconductor 74ACQ544 54ACTQ/74ACTQ544 Quiet Series Octal Registered Transceiver with March 1993 Features m@ Guaranteed simultaneous switching noise level and dynamic threshold performance @ Guaranteed pin-to-pin skew AC performance B 8-bit inverting octal latched transceiver m Separate controls for data flow in each direction @ Back-to-back registers for storage @ Outputs source/sink 24 mA @ 4 kV minimum ESD immunity B 300 mil slim PDIP/SOIC @ Standard Military Drawing 5962-9219301 Logic Symbols Connection Diagrams | | Pin Assignment for Pin Assignment rn 1. DIP, SOIC and Flatpak for LCC Qeeeeeeeee 7 an _ WwW Ag Ag Ag NC Ag Ag Ay } ora CEA 24 Vee HO SIG eG! Oj ore OFBA 2 23 | CEBA - O} cae Ags 22 f= By _ Ay ll O ceva ~ - CEAB OF LEaB Aa 217 GND O} LBA Aa 20 By _NC As-16 19 Bs OEAE 05) Bg.-.----+- By ee tae LEAB [7] 4 4 5 TI ne as-18 17-65 : TL/F/10685-1 Agq9 16 By Ay110 15 FB, CEAB 11 147 LEAB TL/F/10685-3 IEEE/IEC oND412 13 - OFAB CEAB 21 LEAB OEAB CEBA LEBA OEBA TL/F/10685-4 FAST and TRI-STATE are registered trademarks of National Semiconductor Corporation. FACT, FACT Quiet Series and GTOT are trademarks of National Semiconductor Corporation. TL/F/10685-2 1995 National Semiconductor Corporation TL/F/10685 RRD-B30M75/Printed in U, S.A. PYSOLOVPL/OLOVIPS PYSODVPL $1NdjNO ALVLS-IHL UM JaAleosUes] poie}siHay 2390 Sales }aINHPin Names Description OEAB A-to-B Output Enable Input (Active LOW) OEBA B-to-A Output Enable Input (Active LOW) CEAB A-to-B Enable Input (Active LOW) CEBA B-to-A Enable Input (Active LOW) LEAB A-to-B Latch Enable Input (Active LOW) LEBA B-to-A Latch Enable Input (Active LOW) Ao-A7 A-to-B Data Inputs or B-to-A TRI-STATE Outputs Bo-B7 B-to-A Data Inputs or A-to-B TRI-STATE Outputs Functional Description The ACQ/ACTQ544 contains two sets of eight D-type latches, with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B En- able (CEAB) input must be LOW in order to enter data from Ao-A7 or take data from Bo-By, as indicated in the Data |/ O Control Table. With CEAB LOW, a LOW signal on the A- to-B Latch Enable (CEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both LOW, the TRI-STATE B output buffers are active and reflect the data present at the output of the A latches. Control of data flow from B to A is similar, but using the CEBA, LEBA and OEBA inputs. Data I/O Control Table Inputs Latch Status Output Buffers X Latched X Latched xX Transparent H L -xKxCxXx LT xx ctx High Z High Z Driving HIGH Voltage Level LOW Voltage Level X = Immaterial A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA and OEBALogic Diagram OEBA LEBA DETAIL Ax7 - B, - B; -B, B;, H Be - B; CEBA CEAB OEAB LEAB TL/F/10685-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.Absolute Maximum Ratings (note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (Vcc) 0.5V to + 7.0V DC Input Diode Current (I\k) V, = 0.5V 20 mA Vi = Veo + 0.5V +20 mA DC Input Voltage (V}) DC Output Diode Current (lox) Vo = 0.5V Vo = Vcc + 0.5V DC Output Voltage (Vo) DC Output Source 0.5V to Voc + 0.5V 20mA +20mA 0.5V to Voc + 0.5V or Sink Current (Io) +50mA DC Voc or Ground Current per Output Pin (loc or I@np) +50 mA Storage Temperature (Tstq) 65C to + 150C DC Latch-up Source or Sink Current +300 mA Junction Temperature (T)) CDIP 175C PDIP 140C Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recom- mend operation of FACT circuits outside databook specifications. Recommended Operating Conditions Supply Voltage Voc *ACQ 2.0V to 6.0V *ACTQ 4.5V to 5.5V Input Voltage (V)) OV to Voc Output Voltage (Vo) OV to Voc Operating Temperature (Ta) (Note 2) 74ACQ/ACTQ 40C to + 85C 54ACTQ 55C to + 125C Minimum Input Edge Rate AV/At *ACQ Devices Vin from 30% to 70% of Vcc Voc @3.0V, 4.5V, 5.5V 125 mV/ns Minimum Input Edge Rate AV/At *ACTQ Devices Vin from 0.8V to 2.0V Voc @ 4.5V, 5.5V 125 mV/ns Note: Surface mount and plastic dip packaging is not recommended for applications requiring greater than 2000 temperature cycles from 40C to +128C, DC Characteristics for ACQ Family Devices 74ACQ 74ACQ Vec _ Ta = . as Symbol Parameter (V) Ta = +25C 40C to +85C Units Conditions Typ Guaranteed Limits ViH Minimum High Level 3.0 1.5 2.1 2.1 Vout = 0.1V Input Voltage 4.5 2.25 3.15 3.15 Vv or Voc 0.1V 5.5 2.75 3.85 3.85 Vit Maximum Low Level 3.0 1.5 0.9 0.9 Vout = 0.1V Input Voltage 45 2.25 1.35 1.35 Vv or Voc 0.1V 5.5 2.75 1.65 1.65 VoH Minimum High Level 3.0 2.99 2.9 2.9 louT = 50 pA Output Voltage 45 4.49 4.4 4.4 Vv 5.5 5.49 5.4 5.4 Vin = Vi or Vin 3.0 2.56 2.46 -12mA 4.5 3.86 3.76 Vv lou 24mA 5.5 4.86 4.76 24mA VoL Maximum Low Level 3.0 0.002 01 0.41 louT = 50 pA Output Voltage 4.5 0.001 0.1 0.1 Vv 5.5 0.001 0.1 0.1 Vin = Vit or Vin 3.0 0.36 0.44 12mA 4.5 0.36 0.44 Vv lot 24mA 5.5 0.36 0.44 24mA lin Maximum Input 4 4 Vi = Voc, GND Leakage Current 5.5 +0. 1.0 HA (Note 1) *All outputs loaded; thresholds on input associated with output under test.DC Characteristics for ACQ Family Devices (Continuea) 74ACQ 74ACQ Vec _ Ta = . ae Symbol Parameter (Vy) Ta = +25C 40C to + 85C Units Conditions Typ Guaranteed Limits lotb +Minimum Dynamic 5.5 75 mA VoLp = 1.65V Max lonp Output Current 55 -75 mA | Voxp = 3.85V Min loc Maximum Quiescent Vin= Voc . 8: 80. A Supply Current 55 0 0.0 B or GND (Note 1) lozt Maximum I/O V\(OE) = Viv. Vin Leakage Current 5.5 +0.6 +6.0 pA Vi = Voc, GND Vo = Voc, GND VoLP Quiet Output 2-12, 13 . 1.1 1. v Maximum Dynamic VoL 5.0 5 (Notes 2, 3) VoLv Quiet Output _ _ 2-12, 13 Minimum Dynamic Vo- 5.0 06 12 v (Notes 2, 3) VIHD Minimum High Level 5.0 34 35 Vv (Notes 2, 4) Dynamic Input Voltage ViLD Maximum Low Level 50 1.9 15 Vv (Notes 2, 4) Dynamic Input Voltage +Maximum test duration 2.0 ms, one output loaded at a time. Note 1: |), and Iocg @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V Voc. Note 2: Plastic DIP package. Note 3: Max number of outputs defined as (n). Data Inputs are driven OV to 5V. One output @ GND. Note 4: Max number of Data Inputs (n) switching. (n-1) inputs switching OV to 5V (ACQ). Input-under-test switching: 5V to threshold (Vi_p), OV to threshold (Viyp). f = 1 MHz.DC Characteristics for "ACTQ Family Devices 74ACTQ 54ACTQ 74ACTQ Symbol Parameter Hed Ta = +25C 55 of 1 125c | 40 tb + 85C Units Conditions Typ Guaranteed Limits Vin Minimum High Level 45] 15 | 20 2.0 2.0 y__| Your = 0.1V Input Voltage 5.5 1.5 2.0 2.0 2.0 or Voc 0.1V Vit Maximum Low Level 4.5 1.5 0.8 0.8 0.8 Vv Vout = 0.1V Input Voltage 5.5 1.5 0.8 0.8 0.8 or Voc 0.1V Vou Minimum High Level 45 | 449 | 44 4.4 4.4 y_ | lour = 50 pA Output Voltage 5.5 | 5.49 5.4 5.4 5.4 Vin = Vitor Vin 4.5 3.86 3.70 3.76 Vv | 24mA 5.5 4.86 4.70 4.76 OH 24mA VoL Maximum Low Level 4.5 | 0.001 01 0.41 0.41 Vv lout = 50 pA Output Voltage 5.5 | 0.001] 0.1 0.1 0.1 Vin = Vit Or Vin 4.5 0.36 0.50 0.44 Vv | 24 mA 5.5 0.36 0.50 0.44 OL 24 mA lin Maximum Input 55 +04 +10 +10 A Vi = Voc, GND Leakage Current , 7 Me lozt Maximum I/O 4 4 Vi (OE) = Vi. Vin I. +0, +10. +6. A Leakage Current 66 06 0.0 6.0 M Vo = Voc, GND loct Maximum 55 06 16 15 mA Vi = Voc 2.1V Ioc/Input , , , , lotp +Minimum Dynamic 5.5 50 75 mA | Vo_p = 1.65V Max lonp | Output Current 55 50 -75 mA | Voup = 3.85V Min loc Maximum Quiescent Vin = Voc . 8. 160. 80. A Supply Current 55 0 60.0 0.0 B or GND (Note 1) VoLP Quiet Output 2-12, 13 . 1.1 1. Vv Maximum Dynamic VoL 5.0 5 (Notes 2, 3) VoLv Quiet Output _ _ 2-12, 13 Minimum Dynamic VoL 5.0 0.6 12 v (Notes 2, 3) VIHD Maximum High Level 5.0 1.9 22 Vv (Notes 2, 4) Dynamic Input Voltage , , , ViLD Maximum Low Level 5.0 12 08 Vv (Notes 2, 4) Dynamic Input Voltage *All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2.0 ms, one output loaded at a time. Note 1: loc for 54ACTQ @ 25C is identical to 74ACTQ@ 25C. Note 2: Plastic DIP package. Note 3; Max number of outputs defined as (n-1). Data Inputs are driven OV to 3V, one output @ GND. Note 4; Max number of Data Inputs (n) switching (n-1) inputs switching OV to 3V (ACTQ). Input-under-test switching: 3V to threshold (Vi_p), OV to threshold (Vip), f= 1 MHz.AC Electrical Characteristics 74ACQ 74ACQ Ta = 40C * = +25 Symbol Parameter vec "a _ to me to + 85C Units L P C. = 50 pF Min Typ Max Min Max 'PLH Propagation Delay 3.3 15 8.0 11.0 15 12.0 tPHL Transparent Mode , , . ; , : An tO Bn OF By 10 Aq 5.0 1.5 5.0 7.5 1.5 8.0 ns tPLH Propagation Delay 3.3 1.5 8.5 12.0 1.5 12.5 ns tPHL LEBA, LEAB to An, Bn 5.0 15 6.0 8.0 15 8.5 Output Enable Time tPZH OEBA or OEAB to Ap or Bn eo 2 Me we 2 reo ns tPzL CEBA or CEAB to Ap or Bry , , , , , , Output Disable Time tpHZ OEBA or OEAB to Ap or Bh eo 0 re ae 0 u . ns tPLz CEBA or CEAB to Ap or Bry , , , , , , TOSHL: Output to Output 3.3 1.0 1.5 1.5 ns TOSLH Skew** 5.0 0.5 1.0 1.0 *Voltage Range 5.0 is 5.0V +0.5V Voltage Range 3.3 is 3.3V +0.3V **Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tosH_) or LOW to HIGH (tos_y). Parameter guaranteed by design. Not tested. AC Operating Requirements 74ACQ 74ACQ Ta = 40C * = +259 Symbol Parameter ve va _ so ee to + 85C Units L P C= 50 pF Typ Guaranteed Minimum ts Setup Time, HIGH or LOW 3.3 An OF By to LEBA or LEAB 5.0 3.0 3.0 ns th Hold Time, HIGH or LOW 3.3 _ 1.5 1.5 ns An or By to LEBA or LEAB 5.0 tw Latch Enable, B to A 3.3 Pulse Width, LOW 5.0 4.0 4.0 ns *Voltage Range 5.0 is 5.0V +0.5V Voltage Range 3.3 is 3.0V +0.3VAC Electrical Characteristics 74ACTQ 54ACTQ 74ACTQ Ta = 55C Ta = 40C x = 495 Symbol Parameter ee "a =5 3 5 . to + 125C to + 85C Units L P CL = 50 pF CL = 50 pF Min Typ Max Min Max Min Max tPLH Propagation Delay TPHL Transparent Mode 5.0 1.5 5.5 7.5 2.0 9.5 1.5 8.5 ns An to By or By to An 'PLH Propagation Delay 50 | 415 6.5 85 20 110 | 15 9.0 ng tPHL LEBA, LEAB to An, Bn . , , , " , , t Output Enable Time nen OEBA or OFAB to An orBy | 5.0 1.5 8.0 10.0 1.5 13.0 1.5 10.5 ns P2L CEBA or CEAB to A, or Bn tpHz Output Disable Time tPLz OEBA or OEAB to Ap or Bh 5.0 1.0 5.5 7.5 1.5 9.0 1.0 8.0 ns CEBA or CEAB to Ap or Bh TOSHL: Output to Output 5.0 05 1.0 1.0 ns tosLH Skew** . , , , *Voltage Range 5.0 is 5.0V +0.5V **Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tosH_) or LOW to HIGH (tog_y). Parameter guaranteed by design. Not tested. AC Operating Requirements 74ACTQ 54ACTQ 74ACTQ Ta = 55C Ta = 40C * = +25 Symbol Parameter ve a _ no ee to + 125C to + 85C Units L P CL = 50 pF CL = 50 pF Typ Guaranteed Minimum ts Setup Time, HIGH or LOW An or By to LEBA or LEAB 5.0 3.0 3.0 3.0 ns th Hold Time, HIGH or LOW Ap or By to LEBA or LEAB 5.0 15 15 15 ns tw Latch Enable, B to A Pulse Width, LOW 5.0 4.0 4.0 4.0 ns *Voltage Range 5.0 is 5.0V +0.5V Capacitance Symbol Parameter Typ Units Conditions Cin Input Capacitance 4.5 pF Voc = 5.0V Cpp Power Dissipation _ Capacitance 80.0 pF Voc = 5.0VFACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard Model 8180A Word Generator PGC-163A Test Fixture Tektronics Model 7854 Oscilloscope Procedure: . Verify Test Fixture Loading: Standard Load 50 pF, 5000. . Deskew the word generator so that no two channels have greater than 150 ps skew between them. This requires that the oscilloscope be deskewed first. Swap out the channels that have more than 150 ps of skew uniil all channels being used are within 150 ps. It is important to deskew the word generator channels before testing. This will ensure that the outputs switch simultaneously. . Terminate all inputs and outputs to ensure proper loading of the outputs and that the input levels are at the correct voltage. . Set Voc to 5.0V . Set the word generator to toggle all but one output at a frequency of 1 MHz. Greater frequencies will increase DUT heating and affect the results of the measurement. x = oo ok Vou ACTIVE OUTPUTS x QUIET OUTPUT UNDER TEST TL/F/10685-6 FIGURE 8. Quiet Output Noise Voltage Waveforms Note A. Vony and Voip are measured with respect to ground reference. 6. Set the word generator input levels at OV LOW and 3V HIGH for ACT devices and 0V LOW and 5V HIGH for AG devices. Verify levels with a digital volt meter. Vovp/Voiv and VoHp/Vony: * Determine the quiet output pin that demonstrates the greatest noise levels. The worst case pin will usually be the furthest from the ground pin. Monitor the output volt- ages using a 502 coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. Measure Vo_p and Vo_y on the quiet output during the HL transition. Measure Voyp and Vopy on the quiet out- put during the LH transition. Verify that the GND reference recorded on the oscillo- scope has not drifted to ensure the accuracy and repeat- ability of the measurements. Vitp and Vinp: Monitor one of the switching outputs using a 5029 coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. First increase the input LOW voltage level, Vj, until the output begins to oscillate. Oscillation is defined as noise on the output LOW level that exceeds Vj, limits, or on output HIGH levels that exceed Viy limits. The input LOW voltage level at which oscillation occurs is defined as Vitp- Next increase the input HIGH voltage level on the word generator, Vj} until the output begins to oscillate. Oscilla- tion is defined as noise on the output LOW level that exceeds Vj, limits, or on output HIGH levels that exceed Vin limits. The input HIGH voltage level at which oscilla- tion occurs is defined as Viyp. Verify that the GND reference recorded on the oscillo- scope has not drifted to ensure the accuracy and repeat- ability on the measurements. Note B. Input pulses have the following characteristics: f = 1 MHz, t, = 3ns, tp = 3 ns, skew < 150 ps. Vec @ 7=Input RT 4500. () Inputs yt SS eA HP 81804 Lf T aa w_ eS TEK 7854 WORD 50 pF Oscilloscope GENERATOR aa 500. Inputs Voc | 4500 GND Probes are grounded as GND is supplied via a copper plane Vv Te" close to DUT pins as possible. Load capacitors are placed as close to DUT as possible. TL/F/10685-7 FIGURE 9. Simultaneous Switching Test CircuitOrdering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74ACTQ 544 P G QR Temperature Range Family L Special Variations 74ACQ = Commercial X = Device shipped in 13 reels 74ACTQ = Commercial TTL-Compatible QR = Commercial grade device with 54ACTQ = Military TTL-Compatible burn-in . QB = Military grade device with Device Type " environmental and burn-in Package Code processing shipped in tubes P = Plastic DIP Temperature Range D = Ceramic DIP C = Commercial ( 40C to + 85C) F = Flatpak M = Military (55C to + 125C) L = Leadless Ceramic Chip Carrier (LCC) S = Small Outline Package (SOIC) Physical Dimensions inches (millimeters) 0.015 MIN TYP PIN #1 INDEX 0.300+0.005 TYP 45 x 0.0150.010 | i / i 26 4 0.063 [oes 08 7] {t- 0.075 0.093 g 0011 typ 0.077 9.007 poe MIN TYP to.o15 MAX rc 0.028 TYP + SEN TYP 0.022 A = >| | 0.022 MAX TYP 0.055 We O45 TYP >| |< 0.006 MIN TYP 0.055 11 0.045 TYP 18 12 } 45 y 0.0400.010 6.083 DETAIL A DETAIL A 3 PLCS >i o.oe7 TYP TOP VIEW BOTTOM VIEW SIDE VIEW E284 (REV D) 28-Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E28A 10Physical Dimensions inches (millimeters) (Continued) 0.025 1.290 0.025 = MAX (0.635) RAD (32.77) 0.315 Max 0.295 (8.001) GLASS (7.493) MAX We We Ge eee) tel eT cel 0.030-0.055 (0.762-1.397) RAD TP GLASS 0.060 20.005 0.290-~0.320 SEALANT (52a 20.127) 9.020-0.070 i7:366-8.128) (0508-178) 4 0.180 \ 0.225 (4.572) H (6.715) MAX max had 0.008-0.012 95 45 ee BG" 94 ae" (0.203-0.305) TP TYP ons MAK 0.100 20.010 0.018 +0,003 0.125 L. 0310-0410 | a7 ~ (2413) enos ~~ 5a 0258) 24) (o.as7 (oas7 =0.076)~ GN) (7874-1041) J24F{REY G) 24-Lead Ceramic Dual-iIn-Line Package (D) NS Package Number J24F = 0.6141 EB=| 0.5985 15.60 15.20 24 23 22 24 20 i 18 17 16 15 14 13 0.4190 0.3940 10.65 LEAD NO 1 0.2992 '9) 0.2914 IDENTIFICATION \f-}- - - - 4} 3%) A 0.0125 0.1043 9008! TyP ALL LEADS 7.65 6 0.23 2/35 os ome +O EEE l le[ea| ot ALL ered a PLANE 0.014 0.35 24-Lead Small Outline Integrated Circuit (S) NS Package Number M24B oe 1.27 0.40 0500 0.0160 8 MAX == ALL LEADS TYP ALL LEADS M246 (REY F) 1174ACQ544 e 54ACTQ/74ACTQ544 Quiet Series Octal Registered Transceiver with TRI-STATE Outputs Physical Dimensions: inches (mitimeters) (Continued) 4.2831.270 0.092 (31.57 32.28) (2.337) NN MAX (2 PLS) ~s|_fal_ [2s] fee] [27] (20) 9) Tie] 7] ie) SS) fal a] | OPTION 2 PIN NO. 1 7 0.260 10.005 IDENI AD (6.604 10.127) + NU OPTION 2 0.052 EJECIOR PINS Y 0,200-0.920 (1.878) OPTIONAL (7528.128) na 9.040 | (1.015) 0.1304 0.005 mp (3.302 40.127) ' 1 0.020 0.145-0.200 (0.508) Fe sa55 aan) MIN {3.683 5 080) 0.009 - 4.015 229-0301) (res \ 0.1250,145 ~0.040 rr ie 0.075 + 0.015 L | I. 0.018+0.003 cain iL (2175 2.556) 0.325 aia | MIN _is, (1.306 40.381) was 10.075) vn \- oa {a.255 fase 105) 0.100+0.010 g0=4 TYP - (2.54 0,254] nace rey = 24-Lead Plastic Dual-In-Line Package (P) NS Package Number N24C 0.090 0.625 0.060 [* 0.590 0.040 [pase >| tr 0.050 0.05 y+ 0.005 WIN TYP 24 0.370 0.250 0.015 0.008 0.420 wax D) 9.018 |, aors 7 0.015 oo 0.008 T | 0.370 0.250 SEE DETAIL A | 0.006 oll 0.004 be 0.045 MAX 240 (REV E} 24-Lead Ceramic Flatpak (F) NS Package Number W24C LIFE SUPPORT POLICY NATIONALS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National National National National Corporation GmbH Japan Ltd. Hong Kong Ltd. 2900 Semiconductor Drive Livry-Gargan-Str. 10 Sumitomo Chemical 13th Floor, Straight Block, P.O. Box 58090 0-82256 Firstenfeldbruck Engineering Center Ocean Centre, 5 Canton Rd. Santa Clara, CA 95052-8090 Tel: 1(800) 272-9959 TWX: (910) 339-9240 Germany Tel: (81-41) 35-0 Telex: 527649 Fax: (81-41) 35-1 Bldg. 7F 1-7-1, Nakase, Mihama-Ku Chiba-City, Ciba Prefecture 261 Tel: (043) 299-2300 Fax: (043) 299-2500 Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductores Do Brazil Ltda. Rue Deputado Lacorda Franco 120-34, Sao Paulo-SP Brazil 05418-000 Tel: (55-11) 212-5066 Telex: 391-1131931 NSBR BR Fax: (55-11) 212-1181 National Semiconductor {Australia} Pty, Ltd. Building 16 Business Park Drive Monash Business Park Nottinghill, Melbourne Victoria 3168 Australia Tel: (3) 558-9999 Fax: (3) 558-9998 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.