CY54FCT138T, CY74FCT138T
1-OF-8 DECODERS
SCCS013B – MAY 1994 – REVISED OCTOBER 2001
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Function, Pinout, and Drive Compatible
With FCT and F Logic
D
Reduced VOH (Typically = 3.3 V) Versions of
Equivalent FCT Functions
D
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D
Ioff Supports Partial-Power-Down Mode
Operation
D
Matched Rise and Fall Times
D
Fully Compatible With TTL Input and
Output Logic Levels
D
Dual 1-of-8 Decoder With Enables
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D
CY54FCT138T
– 32-mA Output Sink Current
– 12-mA Output Source Current
D
CY74FCT138T
– 64-mA Output Sink Current
– 32-mA Output Source Current
description
The ’FCT138T devices are 1-of-8 decoders. These devices accept three binary weighted inputs (A0, A1, A2)
and, when enabled, provide eight mutually exclusive active-low outputs (O0–O7). The ’FCT138T devices
feature three enable inputs: two active low (E1, E2) and one active high (E3).
All outputs are high unless E1 and E2 are low and E3 is high. This multiple-enable function allows easy parallel
expansion of the device to a 1-of-32 (five lines to 32 lines) decoder with just four ’FCT138T devices and one
inverter.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
PIN DESCRIPTION
NAME DESCRIPTION
AAddress inputs
E1, E2Enable inputs (active low)
E3Enable input (active high)
O Outputs
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A0
A1
A2
E1
E2
E3
O7
GND
VCC
O0
O1
O2
O3
O4
O5
O6
CY54FCT138T ...D PACKAGE
CY74FCT138T ...Q OR SO PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
O1
O2
NC
O3
O4
A2
E1
NC
E2
E3
A
NC
V
7
GND
NC
CY54FCT138T . . . L PACKAGE
(TOP VIEW)
CC
NC – No internal connection
1
A0
O0
O
6
O
5
O
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
CY54FCT138T, CY74FCT138T
1-OF-8 DECODERS
SCCS013B MAY 1994 REVISED OCTOBER 2001
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ORDERING INFORMATION
TAPACKAGESPEED
(ns) ORDERABLE
PART NUMBER TOP-SIDE
MARKING
QSOP Q Tape and reel 5 CY74FCT138CTQCT FT138-3
SOIC SO
Tube 5 CY74FCT138CTSOC
FCT138C
SOIC
SO
Tape and reel 5 CY74FCT138CTSOCT
FCT138C
40°C to 85°CQSOP Q Tape and reel 5.8 CY74FCT138ATQCT FT138-1
SOIC SO
Tube 5.8 CY74FCT138ATSOC
FCT138A
SOIC
SO
Tape and reel 5.8 CY74FCT138ATSOCT
FCT138A
QSOP Q Tape and reel 9 CY74FCT138TQCT FT138
LCC L Tube 6 CY54FCT138CTLMB
55°C to 125°CLCC L Tube 12 CY54FCT138TLMB
CDIP D Tube 12 CY54FCT138TDMB
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS OUTPUTS
E1E2E3A0A1A2O0O1O2O3O4O5O6O7
H X X X X X H H H H H H H H
XHXXXXHHHHHHHH
XXLXXXHHHHHHHH
L L H L L L L H H H H H H H
LLHHLLHLHHHHHH
LLHLHLHHLHHHHH
LLHHHLHHHLHHHH
L L H L L H H H H H L H H H
LLHHLHHHHHHLHH
LLHLHHHHHHHHLH
L L H H H H H H H H H H H L
H = High logic level, L = Low logic level, X = Dont care
CY54FCT138T, CY74FCT138T
1-OF-8 DECODERS
SCCS013B MAY 1994 REVISED OCTOBER 2001
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic diagram (positive logic)
E2
E1
E3
A2
A1
A0
O0
1
2
3
6
4
5
15
14
13
12
11
10
9
7
Pin numbers shown are for the D, Q, and SO packages.
O1
O2
O3
O4
O5
O6
O7
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC input voltage range 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output voltage range 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output current (maximum sink current/pin) 120 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 1): Q package 90°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SO package 57°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ambient temperature range with power applied, TA 65°C to 135°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
CY54FCT138T, CY74FCT138T
1-OF-8 DECODERS
SCCS013B MAY 1994 REVISED OCTOBER 2001
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions (see Note 2)
CY54FCT138T CY74FCT138T
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IOH High-level output current 12 32 mA
IOL Low-level output current 32 64 mA
TAOperating free-air temperature 55 125 40 85 °C
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
CY54FCT138T CY74FCT138T
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYPMAX MIN TYPMAX
UNIT
VIK
VCC = 4.5 V, IIN = 18 mA 0.7 1.2
V
V
IK VCC = 4.75 V, IIN = 18 mA 0.7 1.2
V
VCC = 4.5 V, IOH = 12 mA 2.4 3.3
VOH
VCC = 4 75 V
IOH = 32 mA 2V
V
CC =
4
.
75
V
IOH = 15 mA 2.4 3.3
VOL
VCC = 4.5 V, IOL = 32 mA 0.3 0.55
V
V
OL VCC = 4.75 V, IOL = 64 mA 0.3 0.55
V
Vhys All inputs 0.2 0.2 V
II
VCC = 5.5 V, VIN = VCC 5
µA
I
IVCC = 5.25 V, VIN = VCC 5µ
A
IIH
VCC = 5.5 V, VIN = 2.7 V ±1
µA
I
IH VCC = 5.25 V, VIN = 2.7 V ±1µ
A
IIL
VCC = 5.5 V, VIN = 0.5 V ±1
µA
I
IL VCC = 5.25 V, VIN = 0.5 V ±1µ
A
I
VCC = 5.5 V, VOUT = 0 V 60 120 225
mA
I
OS
VCC = 5.25 V, VOUT = 0 V 60 120 225
mA
Ioff VCC = 0 V, VOUT = 4.5 V ±1±1µA
ICC
VCC = 5.5 V, VIN 0.2 V, VIN VCC 0.2 V 0.1 0.2
mA
I
CC VCC = 5.25 V, VIN 0.2 V, VIN VCC 0.2 V 0.1 0.2
mA
ICC
VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2
mA
I
CC VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2
mA
ICCD
VCC = 5.5 V, Outputs open, One bit switching at 50% duty
cycle, VIN 0.2 V or VIN VCC 0.2 V 0.06 0.12 mA/
I
CCD
VCC = 5.25 V, Outputs open, One bit switching at 50%
duty cycle, VIN 0.2 V or VIN VCC 0.2 V 0.06 0.12 MHz
Typical values are at VCC = 5 V, TA = 25°C.
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, IOS tests should be performed last.
§Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
This parameter is derived for use in total power-supply calculations.
CY54FCT138T, CY74FCT138T
1-OF-8 DECODERS
SCCS013B MAY 1994 REVISED OCTOBER 2001
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
CY54FCT138T CY74FCT138T
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYPMAX MIN TYPMAX
UNIT
#
VCC = 5.5 V,
Outputs open,
Switch E1E2or
One output
switching
at f1 = 10 MHz
VIN 0.2 V or
VIN VCC 0.2 V 0.7 1.4
IC#
Switch
E
1,
E
2,
or
E3
1
at 50% duty
cycle VIN = 3.4 V or GND 1 2.4
mA
I
C
#
VCC = 5.25 V,
Outputs open,
Switch E1E2or
One output
switching
at f1 = 10 MHz
VIN 0.2 V or
VIN VCC 0.2 V 0.7 1.4||
mA
Switch
E
1,
E
2,
or
E3
1
at 50% duty
cycle VIN = 3.4 V or GND 1 2.4||
Ci5 10 5 10 pF
Co9 12 9 12 pF
Typical values are at VCC = 5 V, TA = 25°C.
#IC= ICC + ICC × DH × NT + ICCD (f0/2 + f1 × N1)
Where:
IC= Total supply current
ICC = Power-supply current with CMOS input levels
ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH= Duty cycle for TTL inputs high
NT= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0= Clock frequency for registered devices, otherwise zero
f1= Input signal frequency
N1= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM TO CY54FCT138T CY54FCT138CT
UNIT
PARAMETER
(INPUT) (OUTPUT) MIN MAX MIN MAX
UNIT
tPLH
1.5 12 1.5 6
ns
tPHL
1.5 12 1.5 6
ns
tPLH
1.5 12.5 1.5 6.1
ns
tPHL
1 or
2
1.5 12.5 1.5 6.1
ns
tPLH
1.5 12.5 1.5 6.1
ns
tPHL
3
1.5 12.5 1.5 6.1
ns
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM TO CY74FCT138T CY74FCT138AT CY74FCT138CT
UNIT
PARAMETER
(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX
UNIT
tPLH
A
O
1.5 9 1.5 5.8 1.5 5
ns
tPHL
A
O
1.5 9 1.5 5.8 1.5 5
ns
tPLH
E E
O
1.5 9 1.5 5.9 1.5 5
ns
tPHL
E
1 or
E
2
O
1.5 9 1.5 5.9 1.5 5
ns
tPLH
E3
O
1.5 9 1.5 5.9 1.5 5
ns
tPHL
E
3
O
1.5 9 1.5 5.9 1.5 5
ns
CY54FCT138T, CY74FCT138T
1-OF-8 DECODERS
SCCS013B MAY 1994 REVISED OCTOBER 2001
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
3 V
0 V
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
W aveform 1
(see Note B)
Output
W aveform 2
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
3.5 V
0 V
VOL + 0.3 V
0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
3 V
0 V
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR
3-STATE OUTPUTS
S1 7 V
500 GND
From Output
Under Test
CL = 50 pF
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
VOH 0.3 V
500
500
1.5 V1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9223302M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9223302M2A
CY54FCT
138TLMB
5962-9223302MEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9223302ME
A
CY54FCT138TDMB
5962-9223306M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9223306M2A
CY54FCT
138CTLMB
5962-9223306MEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9223306ME
A
CY54FCT138CTLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9223306M2A
CY54FCT
138CTLMB
CY54FCT138TDMB ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9223302ME
A
CY54FCT138TDMB
CY54FCT138TLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9223302M2A
CY54FCT
138TLMB
CY74FCT138ATQCT ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138-1
CY74FCT138ATQCTE4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138-1
CY74FCT138ATQCTG4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138-1
CY74FCT138ATSOC ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138A
CY74FCT138ATSOCE4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138A
CY74FCT138ATSOCG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138A
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
CY74FCT138ATSOCT ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138A
CY74FCT138ATSOCTE4 ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138A
CY74FCT138ATSOCTG4 ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138A
CY74FCT138CTQCT ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138-3
CY74FCT138CTQCTE4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138-3
CY74FCT138CTQCTG4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138-3
CY74FCT138CTSOC ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138C
CY74FCT138CTSOCE4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138C
CY74FCT138CTSOCG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT138C
CY74FCT138TQCT ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138
CY74FCT138TQCTE4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138
CY74FCT138TQCTG4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FT138
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 3
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
CY74FCT138ATSOCT SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CY74FCT138ATSOCT SOIC DW 16 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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