INTEGRATED CIRCUITS DATA Slalle = | 74LVT273 3.3V Octal D flip-flop Product specification Supersedes data of 1994 May 11 IC23 Data Handbook Philips Semiconductors PHILIPS 1998 Feb 19 PHILIPSPhilips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 FEATURES Eight edge-triggered D-type flip-flops Buffered common clock Buffered asynchronous Master Reset Output capability: +64mA-32mA TTL input and output switching levels |nput and output interface capability to systems at 5V supply Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Power-up reset Live insertion/extraction permitted No bus current loading when outputis tied to 5V bus Latchup protection exceeds 500 mA per JEDEC Std 17 ESD protection exceeds 2000V per Mil Std 883 Method 3015 and 200V per Machine Model. QUICK REFERENCE DATA DESCRIPTION The LVT273 is a high-performance BICMOS product designed for Voc operation at 3.3V. This device has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flops Q output. All outputs will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the GP and WR are common elements. CONDITIONS SYMBOL PARAMETER Tamb = 25C; GND = 0V TYPICAL UNIT tPLH Propagation delay _ . _ 3.5 ipo CP to Qn CL = 50pF; Vee =3.3V 35 ns Cin Input capacitance V, = OV or 3.0V 4 pF ORDERING INFORMATION PACKAGES TEMPERATURE RANGE | OUTSIDE NORTH AMERICA | NORTH AMERICA DWG NUMBER 20-Pin Plastic SOL 40C to +85C T4LVT273 D T4LVT273 D SOT163-1 20-Pin Plastic SSOP Type II 40C to +85C 74LVT273 DB 74LVT273 DB SOT339-1 20-Pin Plastic TSSOP Type | 40C to +85C 74LVT273 PW T4LVT273PW DH SOT360-1 PIN CONFIGURATION LOGIC SYMBOL mm [1] EO ere ao [2] 19] a7 bo [3] 18] Dr bi ii7] De ai [5] 16) O68 az [6] is] Os be [7] ees bs [8] 13] D4 as [9] 2] a4 GND [79 ii] cP svooot7 3.04 #7 #8 13 14 17 18 11 J 1-4 Do Di D2 D3 D4 Ds De D7 cP MR Qa Q1 Q2 | | 2 5 6 Q3 O24 Q5 Q6 O7 [| 9 12 15 16 19 SvVoooia 1998 Feb 19 853-1740 18985Philips Semiconductors Product specification 3.3V Octal D flip-flop 7ALVT273 LOGIC SYMBOL (IEEE/IEC) FUNCTION TABLE INPUTS OUTPUTS OPERATING WR cP Dr, Q0 - 97 MODE L Xx Xx L Reset (clear) H tT h H Load 1 H tT | L Load 0 H L x Qo Retain state H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level | = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don't care Svougig9 ?T = Low-to-High clock transition Qo = Output as it was PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 11 cP Clock pulse input (active rising edge) 3, 4, 7, 8, 13, 14, 17, 18 Do - D7 Data inputs 2,5, 6, 9, 12, 15, 16, 19 Qo - Q7 Data outputs 1 MR Master Reset input (active-Low) 10 GND Ground (OV) 20 Vee Positive supply voltage LOGIC DIAGRAM ai Q2 9 12 15 16 19 a a4 Qs Q6 ar Svoo0z0 1998 Feb 19Philips Semiconductors Product specification 3.3V Octal D flip-flop 7ALVT273 ABSOLUTE MAXIMUM RATINGS! :2 SYMBOL PARAMETER CONDITIONS RATING UNIT Vec DC supply voltage 0.5 to 44.6 Vv lik BC input diode current V,<0 -50 mA Vv DC input voltage? 0.5 to +7.0 Vv lok DC output diode current Vo<0 -50 mA Vout DC output voltage? output in Off or High state 0.5 to +7.0 Vv Output in Low state 128 lout DC output current mA Output in High State 64 Tstg Storage temperature range -65 to 150 C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT MIN MAX Vec DC supply voltage 2.7 3.6 Vv Vi Input voltage a 5.5 Vv Vi High-level input voltage 2.0 Vv VIL Low-level Input voltage 0.8 Vv lou High-level output current -32 mA lov Low-level output current 64 mA AAV Input transition rise or fall rate; Outputs enabled 10 ns/V Tamb Operating free-air temperature range 40 +85 C 1998 Feb 19 4Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C UNIT MIN TYP MAX Vik Input clamp voltage Veco = 2.7V; Ie =-18mA -0.9 -1.2 Vv Voc = 2.7 to 3.6V; low = -100nA Vec-0.2 | Vec0.1 Vou High-level output voltage Veco = 2.7V; loy =-8mA 24 2.5 Vv Veco = 3.0V; low = -32mMA 2.0 2.2 Veco = 2.7V; lo. = 100UA 0.1 0.2 Veco = 27V; lol = 24mA 0.3 0.5 Voi Low-level output voltage Veco = 3.0V; lo. = 16mA 0.25 0.4 Vv Vec = 3.0V; lo =32mA 03 0.5 Vec = 3.0V; lon =64mA 04 0.55 Vast Power-up cutout low voltaget | Ver = 3.6V; lo = 1mA; V, = GND or Vee 0.13 0.55 Vv Vec = 0 or 3.6V; V) = 5.5V 1 10 Vec = 3.6V; V) = Vee or GNB Control pins +0.1 +1 I I leak | nput leakage current Veo = 3.8V:V\= Veo 04 1 WA Data pins? Vec = 3.6V; Vi =0 1 5 lorr Output off current Vee = OV; Vor Vg = 0 to 4.5V 1 +100 Vec = 3V; Vi =0.8V 75 150 IHOLD Bus Hold current A inputs Veco = 3V; V) =2.0V -75 -150 Vec = OV to 3.6V; Vec =3.6V +500 Currentinto an output in the _ . _ lex High state when Va > Vec Vo = 5.5V; Voe = 3.0V 60 125 pA lecu Vec= 3.BV; Outputs High, vi = GND or Vec, lo -9 0.13 0.19 Quiescent supply current leet Vec = 3.6V; Outputs Low, Vi = GND or Vec, lo _9 3 12 mA Additional supply current per Vec = 3V to 3.6V; One input at Ver -0.6V, Alec input pin? Other inputs at Vee or GND 0.1 02 mA NOTES: 1. All typical values are at Veg = 3.3V and Tapp = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than Vec or GND 3. Unused pins at Vcc or GND. 4. For valid test results, data must not be loaded inte the flip-flops (or latches) after applying the power. 5. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS GND = OV; tp =tp = 2.5ns; C, = SOpF, R, = 5009; Tip = 40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM Vec = 3.3V 40.3V Veco =2.7V UNIT MIN TYP MAX MAX Max Maximum clock frequency 1 150 MHz tPLH Propagation delay 1 1.7 3.5 5.5 6.3 ns tPHL CP to Qn 1.9 3.5 5.5 5.9 Propagation delay {PHL WE toon 2 1.3 3.2 6.2 6.2 ns NOTE: 1. All typical values are at Veco = 3.3V and Tap = 25C. 1998 Feb 19 5Philips Semiconductors Product specification 3.3V Octal D flip-flop 7ALVT273 AC SETUP REQUIREMENTS GND = OV; tp =tp = 2.5ns; C, = SOpF, R, = 500, Tay, = 40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM Vec=+3.3+ 0.3V Veco =2.7V UNIT MIN TYP MIN ts(H) Setup time, High or Low 3 2.3 1.0 27 ns t.(L) Dn to CP 2.3 1.0 27 ty{H) Hold time, High or Low 3 0 0.6 Q ns ty(L) Dn to CP Q -0.6 0 ty(H) Clock pulse width 3.3 1.5 3.3 ns ty(L) High or Low 3.3 1.5 3.3 ty{L) Master Reset pulse width, Low 2 3.3 1.5 3.3 ns tec neon time 2 27 1.0 3.2 ns AC WAVEFORMS Vu = 1.5V, Vin = GND to 2.7V NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. Svoo02t svoo7108 Waveform 1. Propagation Delay, Clock Input to Output, Waveform 3. Data Setup and Hold Times Clock Pulse Width, and Maximum Clock Frequency 27 MR \ ov 2 cp 1.5 ov Vou Qn sro Vo svooto7 Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time 1998 Feb 19 6Philips Semiconductors 3.3V Octal D flip-flop Product specification 74LVT273 TEST CIRCUIT AND WAVEFORMS Voc VIN VOUT PULSE GENERATOA r #7) DUT TT ltr Test Circuit for Outputs DEFINITIONS FR, = Load resistor; see AG CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC GHARACTERISTICS for value. Ry = Termination resistance should be equal to Zout of pulse generators. 90% 'w | Foon, AMP) NEGATIVE VM VM PULSE 10% 10% l a ov tTHL {F} = TLH CR le TL tr) etre Ce} 90% 90% AMP i POSITIVE PULSE VM VM 10% K10% tw | Vi = 1.8V Input Pulse Definition INPUT PULSE REQUIREMENTS FAMILY Amplitude | Rep. Rate tw tr tf T4LVT 2.7V <10MHz 500ns| <2.5ns | <2.5ns svoooz2 1998 Feb 19Philips Semiconductors 3.3V Octal D flip-flop $020: plastic small outline package; 20 leads; body width 7.5 mm Product specification 74LVT273 SOT163-1 ! HEU Oy 4 AAARAIRR AAR Wy __ = d 8 Ag i D Ay i\ as) : { | pin 1 index j FS - 1 me Lae f HEHE WERE EE | | 1 | 10 detail X el [e] = Bp 0 5 10mm l L L L L l 1 1 L L scale DIMENSIONS (inch dimensions are derived from the original mm dimensions} A UNIT | ax. | At Ao | As bp c pM) EM] e He L Lp Q v w 7M] 4 0.30 | 2.45 0.49 | 0.32] 13.0] 7.6 10.65 11) 44 0.9 2.65 5 mm oio | 225] F | ozs 023] ize) 74] 17? | ooo] $4 | o4 | to | O89) OF) OT | 4 | go tb . 0.012 | 0.098 0.019 | 0.013] 051 | oa o.419 0,043 | 0.043 0.036] 9 inches | 9.19 | yo04| o.0a9 | &91 |oora| oco9| a49 | 0.29 | 2%] 0594] 8 | oo18| o039| %91 | 297 194 | gore Note 1, Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE IEC JEDEC EIAJ 05-0124 SOT163-1 075504 MS-013AG 37-05-22 1998 Feb 19Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm $0T339-1 1s +4] > aT =.=. t f \ / STE "Fy LS oy . He {EOE | *banannAaaR pin 1 index 1 | | | P | | S JP OOH BID HOY bs _ 7 |! 3mm scale DIMENSIONS (mm are the original dimensions) unt | * | a, 3) (1) 4) Ff max. As Ag bp c DB E a He L Lp a V Ww y Zz tf 0.21 | 1.80 0.38 | 0.20) 7.4 5.4 79 1.03 | 0.9 0.9 a mm 2.0 105 | 165 0.25 aos | aos 70 52 0.65 76 1.25 06s o7 0.2 0.13 01 05 a? Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE IEC JEDEC ElAJ 03-05-98- SOTS89" MO-180AE fe} 95-02-04 1998 Feb 19Philips Semiconductors Product specification 3.3V Octal D flip-flop 7ALVT273 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 _ | Zz ly 7 hn Ann AAD" 0 yt H fe Pp 0 2.5 5 mm a | scale DIMENSIONS (mm are the original dimensions) A UNIT | wax | 41 | A2 | Aa | bp c pM) Eel] e HE L Lp Q v w y Zz] 9 0.15 | 0.95 0.30 0.2 6.6 4.5 6.6 0.75 0.4 0.5 8 mm 1.19 0.05 0.80 0.25 0.19 0.1 6.4 4.3 9.65 6.2 1.0 0.50 0.3 9.2 0.13 4 0.2 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE IEC JEDEC EIAJ 63-+96-++4- SOT360-1 MO-153AC :-} oe 02 04 1998 Feb 19 10Philips Semiconductors Product specification 3.3V Octal D flip-flop 7ALVT273 Data sheet status Data sheet Product Definition [1] status status Objective Development This data sheet contains the design target or goal specifications for product development. specification Specification may change in any manner without notice. Preliminary Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. specification Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make specification changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or atany other conditions above those givenin the Characteristics sections of the specificationis notimplied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to resultin personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors Copyright Philips Electronics North America Corporation 1998 811 East Arques Avenue All rights reserved. Printed in U.S.A. P.O. Box 3409 Su nnyvale, California 94088-3409 print code Date of release: 05-96 Telephone 800-234-7381 Document order number: 9397-750-03534 Lett make things better ra dito =] PHILIPS