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WIRELESS CHARGING
TS51224
Wireless Power Receiver
and Battery Charger
Features
• 40V maximum input voltage
• Single-cell Li-Ion or Li-Polymer charger with
programmable charging current and topoff voltage
• System rail available with deeply discharged battery
• Integrated switches for narrow VDC power path
management
• Supports Qi, AirFuel Inductive and Resonant (PMA,
A4WP) and proprietary charging standards
• Up to 2W combined system/battery power
• Better than 87% AC-DC efficiency to the system
• Better than 83% AC-DC efficiency to the battery
• Integrated switches for load modulation
• Integrated frequency detection to support
bidirectional communication
• TX to RX CPU alert or reset signal
• Integrated minimum load current sink
• Thermal shutdown at 130C junction temperature
and over-current protection
• Low external component count
• Junction operating temperature -40C to 125C
• Product is lead-free, halogen-free, RoHS / WEEE
compliant
Typical Application Circuit
Description
TS51224 is a fully-integrated wireless power receiver and
battery charger for low-power, wearable applications that
require a low-cost and space-saving solution. The TS51224
can operate by itself as a single-chip wireless power
receiver in proprietary applications. It can also operate in
conjunction with a wireless power controller or an
application microcontroller to support the Qi, PMA or
A4WP wireless charging standards as well as proprietary
standards up to 2W combined system/battery power.
Applications
• Wearables
o Watches
o Bracelets
o Fitness Bands
o Smart Jewelry
o Smart Glasses
• Health Monitors
• Electric Toothbrushes
• Tablets
• Wireless Keyboard and Mouse
• Medical Applications
• Wireless Headsets
• ID Tags
• Augmented Reality
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Ball Configuration
Figure 1: TS51224 Ball Configuration
(Top view with ball 1 designator)
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Ball Description
Ball Number
Ball Name
Function
Description
A4 BST Bootstrap capacitor Bootstrap capacitor for buck regulator high-side
driver, capacitor between BST pin and SW pin
B4 CHG_DIS Charge disable Disables battery charging when pulled high
A3 COMM1 Load modulation switch Pull-down for VAC1 modulation capacitor
E3 COMM2 Load modulation switch Pull-down for VAC2 modulation capacitor
C4 EOC End-of-Charge indicator Toggles low when the charger gets to the end-of-
charge state
A5 FB Feedback input BUCK feedback input and blocking FET input
D3 FREQ Frequency detector output Open drain output signal, divided-by-8 version of
the frequency of the input AC power signal
B1, D1 GND Power ground Ground
D5 ISP Current Sense Negative battery terminal connection and current
sensing node
E4 MOD_CFG Modulation configuration
Configures the internal modulator to start up in
standalone mode or in bypass mode. Also
configures the PDC voltage in standalone mode.
D4 MOD_EN MCU modulation input
Active high input to the modulator selection logic,
with internal 100k pull-down. If repeated
transitions are detected on this pin, the integrated
modulator is bypassed and MOD_EN controls the
COMM switches.
B3 nALERT MCU interrupt
output/reset signal
Active low open drain output activated when TX
sends an ALERT command
A2, B2, D2, E2 PDC Input power Rectified input voltage
C1, C2 SW Switching node BUCK regulator switching node
B5 SYSOUT System output power System output power connection
C3 THERM Thermistor connection Thermistor connection used for system temperature
monitoring
E5 TOP_SET Topoff voltage
configuration Configures the topoff voltage of the charger
A1 VAC1 Coil input AC power input from the resonator coil
E1 VAC2 Coil input AC power input from the resonator coil
C5 VBAT Battery node Positive battery terminal connection
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Functional Block Diagram
Figure 2: TS51224 Block Diagram
Half Sync
Rectifier
COMM
Switch
SYSOUT
SW
BST
PDC
VAC1
VAC2
COMM1
COMM2
GND
Frequency
Detection
Minimum
Load
Buck
Regulator
Data
Modulator
nALERT TX to RX
Alert/Reset
FREQ
MOD_EN
MOD_CFG
Div/8 THERM
CHG_DIS
TOP_SET
VBAT
ISP
Charging
Controller
WARN 0.5V
SHUTDOWN 0.225V
FB
EOC
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Absolute Maximum Ratings
Over operating free–air temperature range unless otherwise noted
(1, 2)
Parameter
Value
Unit
COMM1, COMM2, PDC, VAC1, VAC2 -0.3 to 42 V
BST -0.3 to (SW+6) V
SW -1 to 42 V
CHG_DIS, EOC, FB, FREQ, nALERT, MOD_EN,
MOD_CFG, SYSOUT, THERM, TOP_SET, VBAT -0.3 to 6 V
ISP -0.7 to 0.7 V
Electrostatic Discharge—Human Body Model ±2 kV
Electrostatic Discharge—Machine Model ±500 V
Peak IR Reflow Temperature (10 to 30 seconds) 260 °C
Notes:
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal GND.
Recommended Operating Conditions
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
PDC Capacitance
(1)
C
IN
2.2 10 F
BUCK Output Capacitance
(1)
C
OUT
F
SW
=1.3MHz, I
OUT_MAX
= 50mA 8.8 44 F
BUCK Output Capacitance
(1)
C
OUT
F
SW
=1.3MHz, I
OUT_MAX
= 400mA 20 44 F
BUCK Bootstrap Capacitor C
BST
17.6 47 nF
Output Filter Inductor L
OUT
F
SW
=1.3MHz, I
OUT_MAX
= 50mA 1.5 3.3 H
Output Filter Inductor L
OUT
F
SW
=1.3MHz, I
OUT_MAX
= 400mA 1.5 4.7 H
RX Coil L
IN
F
BR
= 1MHz 11 H
RX Series Resonant Capacitor C
s
F
BR
= 1MHz 10 nF
COMM Modulation Capacitors C
C1
, C
C2
F
BR
= 1MHz 1 nF
Rectified Voltage V
PDC
3.5 12 40 V
Bridge Current I
BR
50 300 mA
Rectification Frequency F
BR
100 1000 6780 kHz
COMM Current I
COMM
50 mA
Charger Output Current I
RANGE
500 mA
Topoff Voltage Range V
TOP_RANGE
Valid set point range 4.1 4.4 V
TOP_SET Pin Range V
TOP_SET_RANGE
Valid TOP_SET pin voltage range 0 3 V
Buck Regulator Output
Current I
OUT_MAX
500 mA
High Level Input Voltage V
IH
CHG_DIS, MOD_EN 1.3 5.5 V
Low Level Input Voltage V
IL
CHG_DIS, MOD_EN 0 0.54 V
Notes:
(1) Specified capacitance includes allowance for voltage derating, tolerance, temperature, and aging. Select capacitors that meet the specified
minimum capacitance.
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Electrical Characteristics
Electrical Characteristics, T
J
= -40°C to 85°C, unless otherwise noted
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Synchronous Rectifier
Low-Side Bridge FET Drain-
Source On-State Resistance R
DSON_BR
400 mΩ
High-Side Bridge Diode
Forward Voltage V
D_BR
I
BR
= 150mA 500 mV
Capacitive Modulation Switches
COMM FET Drain-Source
On-State Resistance
R
DSON_COMM
I
COMM
= 50mA 10 Ω
Power On Reset
Power On Reset Voltage V
PDC-POR
Internal logic reset clear,
internal logic/modulator ready 2.7 3.0 3.4 V
Power On Reset Hysteresis V
PDC-POR_HYST
(1)
0.35 V
Quiescent Current
Quiescent Current, PWM mode Idd
PWM
PDC current, Buck Regulator PWM mode,
V
PDC
=12V, VAC1=VAC2=0V,
I
LOAD
=0A, MOD_EN=0,
external feedback resistors, R
TOTAL
=1MΩ
15 mA
Quiescent Current, PFM mode Idd
PFM
PDC current, Buck Regulator PFM mode,
V
PDC
=12V, VAC1=VAC2=0V,
I
LOAD
=0A, MOD_EN=0,
external feedback resistors, R
TOTAL
=1MΩ
4 mA
Quiescent Current, Buck Off,
10mA Current Source Off Idd
BK_10mA_OFF
PDC current, Buck Regulator OFF,
V
PDC
=4.5V, VAC1=VAC2=0V,
MOD_EN=0, 10mA current source off,
external feedback resistors, R
TOTAL
=1MΩ
3 mA
Quiescent Current, Buck Off,
10mA Current Source On Idd
BK_OFF
PDC current, Buck Regulator OFF,
V
PDC
=4.5V, VAC1=VAC2=0V,
MOD_EN=0, 10mA current source on,
external feedback resistors, R
TOTAL
=1MΩ
13 mA
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Electrical Characteristics
Parameter Symbol Conditions Min Typ Max Unit
Charger
ISP Voltage
V
ISP_1C
1C mode 20 25 30 mV
V
ISP_0p5C
0.5C mode 10 12.5 15 mV
V
ISP_0p1C
Precharge (0.1C) mode 1.5 2.5 3.5 mV
1C Charge Voltage Threshold V
1C_Charge
VBAT rising 3.05 3.15
3.25 V
Charger Dropout V
Drop_CHG
SYSOUT-VBAT in 1C charging mode,
PWM mode 100
mV
On Resistance R
ON,CHG
(1)
100 m
Temperature Sense
THERM Output Current I
THERM
18 20 22 A
WARN Voltage V
WARN,FALLING
V
THERM
falling 0.485 0.505 0.525 V
V
WARN,RISING
V
THERM
rising 0.776 0.805 0.834 V
SHUTDOWN Voltage V
STOP,FALLING
V
THERM
falling 0.22 0.235 0.25 V
V
STOP,RISING
V
THERM
rising 0.32 0.335 0.35 V
Blocking Switch
On Resistance R
ON,BLK
(1)
50 100 m
Off State Leakage I
OFF
1 A
Topoff
TOP_SET Pin Set Point Current I
TOP
T
J
= 25C 17 20 23 A
Topoff Voltage Offset V
TOP_OFFSET
R
TOP_SET
= 0
4.08 4.1 4.12 V
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Electrical Characteristics
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Buck Regulator Input
PDC Under-voltage Lockout V
PDC-UVLO
Buck Regulator = Off 4.3 V
PDC Under-voltage Lockout Hysteresis V
PDC-UVLO-HYST
Buck Regulator = Off 180 mV
CHG_DIS,
MOD_EN Digital Input
s
Pull-Down Resistance R
PD
68 100 144 kΩ
EOC,
FREQ, nALERT Open Drain Output
EOC High Level Output Leakage I
OH_LEAK_EOC
VIO = 5V 5 A
FREQ, nALERT High Level Output Leakage I
OH_LEAK
VIO = 5V 0.01 1 A
Low Level Output Voltage V
OD_OL
I
SINK
= 3mA
(2)
0.4 V
Thermal Protection Thresholds
Thermal Shutdown Junction Temperature T
SD
(1)
130 146 °C
Thermal Shutdown Hysteresis T
SD_HYST
(1)
10 °C
Notes:
(1) This parameter is not tested in production.
(2) nALERT only tested as pass / fail.
Regulator Characteristics
Electrical Characteristics, T
J
= -40°C to 85°C, V
PDC
=12V, F
SW
=1.3MHz, L
OUT
=4.7H, C
OUT
=44F, C
BST
=22nF, unless otherwise noted
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SYSOUT Precharge Voltage V
OUT-PWM
VBAT < 3.1V, PWM mode 3.2 3.3 3.5 V
High-Side Switch ON
Resistance R
DSON_HS
I
SW
= -0.15A
(1)
450 mΩ
Low-Side Switch ON
Resistance R
DSON_LS
I
SW
= 0.15A
(1)
300 mΩ
Output Over Current
Detect I
OCD
1320 mA
Buck Switching Frequency F
sw
1.17 1.33 1.46 MHz
Soft Start Ramp Time T
SS
(2)
2.5 ms
Notes:
(1) R
DSON
is characterized at 500mA and tested at lower current in production.
(2) This parameter is not tested in production.
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Functional Description
TS51224 is a fully-integrated wireless power receiver that can operate as a single-chip solution in proprietary
applications. It can also operate in conjunction with a wireless charger controller or an application microcontroller to
support the Qi, PMA or A4WP standards as well as proprietary standards up to 2W for 5V output and up to 5W for higher
output voltages. Operating in conjunction with TS80002 as a wireless power transmitter and with a charging controller
on the RX side, TS51224 can support bidirectional communication for data upload from the RX to the TX side. A TX to RX
alert or reset function is also included so TS80002 can issue an interrupt or a reset signal to the RX MCU if the RX MCU
becomes unresponsive.
Rectifier
TS51224 includes a high-efficiency rectifier to convert the input AC power signal to a DC output level for powering a
high-efficiency step-down DC-DC converter and an integrated data modulator. The rectifier bridge is built to minimize
power dissipation across load current of interest. The primary side of the bridge can stand-off up to 40V with AC input
running at 6.78MHz. On the secondary side, a capacitive load on the PDC pin is used to filter the voltage signal on both
sides of the bridge rectifier. The integrated data modulator and the external MCU communicate to the transmitter side
using the capacitive modulation scheme.
Integrated Modulator
The integrated Data Modulator can be configured to operate in standalone or bypass mode. In standalone mode, the
integrated modulator sends data messages to the TX side using a proprietary protocol to control the rectified voltage
level on the PDC pin. In bypass mode, the external MCU controls the data packets to the TX side. For example, if the
device is configured for standalone mode at power up, the system can receive power without external MCU support,
and once PDC is high enough to operate the buck regulator and the MCU, the MCU can take over the communication
with the transmitter by bypassing the integrated modulator. Modulator mode reverts back to the standalone mode
when the MCU communication with the transmitter stalls. When the PDC output load current is low (buck regulator is
off), an internal 10mA load is enabled to allow data communication to take place in optimal conditions.
40V Input Buck Regulator
The integrated Buck regulator is a current-mode synchronous step-down power supply with integrated power switches,
internal compensation, and fault protection. It is powered by the DC output of the Wireless power receiver bridge. The
regulator is designed to handle a wide range of input and output voltages. The regulator is optimized for high
efficiency power conversion with low R
DSON
integrated synchronous switches. Low power at light output loads is
attained by the regulator automatic transitions between PFM and PWM modes. The regulator will automatically turn off
when the RX AC power input is removed.
Blocking FET
An integrated low impedance FET in the TS51224 provides blocking from SYSOUT to FB. In cases where AC power is not
applied, the battery is directly connected to SYSOUT. In this condition, the blocking FET is off, preventing conduction
from SYSOUT to PDC. If AC power is applied and PDC is greater than the batter voltage, then the blocking FET will be on
and the SMPS will regulate the SYSOUT voltage.
Charger
TS51224 includes a linear regulator to manage battery charging current. The charger operates by sensing the voltage
drop across a sense resistor and regulating this to a DC value. Battery charging is controlled by the integrated state
machine. When charging at a 1C rate, the SMPS will regulate SYSOUT to be sufficiently higher than VBAT to allow full
charging currents. When the battery is very low (<3.3V), the SMPS will regulate SYSOUT to be equal to 3.3V and the
charger will regulate the battery current to the 0.1C rate.
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Device Power Up Timing
Figure 3: Bypass Mode Power Up
Figure 4: Standalone Mode Power Up
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Operation Diagrams
Figure 5: VAC Signal Loss & Buck Control
Figure 6: Battery Charging State Diagram
Figure 6: Battery Charging State Diagram
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Detailed Ball Description
BST – Bootstrap input
This terminal provides the bootstrap voltage required for the high-side NMOS switch of the buck regulator. An external
ceramic capacitor placed between the BST and SW pins will provide the necessary gate drive voltage for the high-side
switch. In normal operation, the capacitor is re-charged on every low-side synchronous switching action. For the case
where the switch mode approaches 100% duty cycle for the high-side FET, the buck regulator will automatically reduce
the duty cycle to a minimum off time on every 8th cycle to allow the BST capacitor to re-charge.
CHG_DIS – Charge disable signal
This input terminal allows an external microcontroller to disable charging by pulling the pin high.
COMM1, COMM2 – Modulation capacitor switches
COMM1 and COMM2 pins are momentarily grounded when the system or the device communicates to the wireless
power transmitter. When the COMM1/2 switches close, this shifts the impedance seen by the RX coil L
IN
and this shift is
in turn reflected as a change in TX coil current that can be detected by the transmitter’s demodulator. Depending on
the MOD_CFG pin configuration and activity on the MOD_EN pin, the integrated modulator or the MOD_EN pin controls
the COMM1/2 switches.
EOC – End of charge indicator
When charging, this pin will be pulled low by an integrated NMOS. When the battery is fully charged, the NMOS will
release. An external resistor should be connected to a system rail to allow this voltage to pull to the rail.
FB – Buck regulator output feedback
This is the input terminal for the buck regulator output voltage feedback and the power input for the blocking FET. The
SMPS will regulate the FB voltage at all times when enabled.
FREQ – Frequency detector output
This is an open drain output which outputs a clock reference running at the frequency of the input AC power signal
divided by 8.
GND – Ground
Ground reference. This pin will conduct both correlated and uncorrelated switching currents during power transfer
mode from the COMM1/2 pins switching and the buck operating in PWM mode, as well as switching current from the
internal oscillator and the integrated modulator. PCB layout must provide low resistance to the ground plane for stable
operation.
ISP – Charging current sense node
This terminal is the negative battery terminal. A sense resistor placed between ISP and ground will set the 1C charging
current. The integrated charger will regulate the voltage on the ISP pin to set the charging current.
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Detailed Ball Description
MOD_CFG – Modulation configuration
PDC voltage and modulation control scheme for communication are configured by the MOD_CFG pin.
Bypass Mode
When the MOD_CFG pin is grounded (voltage < 250mV), the internal data modulator is bypassed and the external
MCU is required to drive the MOD_EN pin to control the communication with the power transmitter. Thus, the MCU
must be fully active prior to the device generating a stable output voltage V
OUT
. The external MCU will set V
PDC
by
sending data packets to the transmitter.
Stand-alone Mode
If the MOD_CFG pin is grounded through an external precision resistor (voltage > 250mV), the voltage on the
MOD_CFG pin determines the nominal rectified voltage on the PDC pin. In this mode, the integrated modulator
generates the wireless power control packets and drives the COMM1/2 switches after power-on reset. This mode is
referred to as the stand-alone mode as it does not require an external MCU to control the communication with the
transmitter during receiver power up and for normal operation.
While in stand-alone mode, the device also monitors the MOD_EN pin to detect if the external MCU wants to take
control of the communication with the power transmitter. If at least 8 pulses with a delay of less than 25ms between
each pulse are detected on the MOD_EN pin, the device enters the (integrated modulator) bypass mode. Once in
bypass mode and the MOD_EN pin activity stalls (less than 8 pulses in a 250 ms window), the device exits the bypass
mode and returns to stand-alone mode and the integrated modulator resumes communication with the power
transmitter.
MOD_CFG Pin
Connection
RX Data
Communication
Modulator
COMM1/2
Pin Drive V
PDC
Internal
Modulator
Bypass
Internal Modulator
Fallback
Grounded External MCU MOD_EN
Set by
External
MCU’s power
control data
packet
Integrated
modulator
always bypassed
Integrated modulator
always bypassed
Resistor R
MOD_CFG
to Ground
Integrated
modulator
Integrated
modulator
R
MOD_CFG
/
5000
If MOD_EN pin
pulses 8 times
with delay <
25ms between
pulses,
COMM1/2 pins
responsive to
MOD_EN input
If MOD_EN pin pulses less
than 8 times within 250ms
window, COMM1/2 pins
responsive to the
integrated modulator
MOD_EN – MCU modulation input
This is an active high CMOS input to drive the COMM1 and COMM2 pins to modulate the coil current to communicate
with the wireless power transmitter. MOD_EN signal is generated by the external MCU and its output swing must
conform to the input levels specified in the Electrical Characteristics section for the MOD_EN pin. Activity on the
MOD_EN is also sampled by the control logic to transition between Stand-alone and Bypass modes as outlined in the
MOD_CFG pin description.
nALERT – MCU reset/interrupt
nALERT is an open drain output which is asserted low when the transmitter sends an ALERT command to the receiver to
reset the MCU or to generate an interrupt. During the power up sequence, nALERT pin is pulled high by the external
pull-up resistor, thus only the power transmitter ALERT command is allowed to assert this pin low.
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Detailed Ball Description
PDC – Rectified input signal
This terminal is the rectified output of the RX AC input voltage and serves as the DC supply for the device. It is
recommended that a 10F bypass capacitor rated for the maximum PDC voltage (> 2.2F capacitance accounting for
voltage derating, aging, and tolerance) be placed close to the device for best performance. Since this is the main power
supply for the IC, good layout practices need to be followed for this connection.
SW – Switching output
This is the switching node of the buck regulator. It should be connected directly to the output filter inductor L
OUT
and
bootstrap capacitor with a short, wide trace. SW pin switches between V
PDC
and GND at the switching frequency, thus it
is considered a noise source on the PCB. Route high impedance and quiet traces away from the SW trace.
SYSOUT – System output supply
This terminal is the system power supply. When AC input power is not available, SYSOUT is shorted to VBAT through the
integrated charger FET. When AC power is applied, SYSOUT will be regulated to either 3.3V when the battery is low or
~150mV above battery up to the topoff voltage.
THERM – Thermistor connection
This terminal allows temperature monitoring of the external system using a thermistor. When the system temperature
reaches the warning level, the 1C charging level will be cut in half. At the shutdown level, charging will stop.
TOP_SET – Topoff voltage setpoint
The battery topoff voltage is set by placing a resistor to ground on this pin. The IC will provide a 20A DC output
current. The topoff voltage will be set according to the following equation.
V
TOP
= V
TOP_OFFSET
+ I
TOP
* (R
TOP_SET
/ 10)
VAC1, VAC2 – AC Power input from resonant LC network
These terminals are connected to the wireless power supply receiver coil and resonant capacitor. It is recommended
that the PCB traces are robust to handle high peak currents during power up maximum power transfer.
VBAT – Battery connection
This pin is the positive battery terminal. The charger will supply output current to this pin during charging.
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Regulator Internal Protection Details
Regulator Output Current Limit
The current through the high-side FET is sensed on a cycle by cycle basis and if current limit is reached, it will turn off the
high-side FET in mid-cycle. In addition, the device senses the FB pin to identify hard short conditions and will direct the
SW output to skip 4 cycles if current limit occurs when FB is low. This allows current built up in the inductor during the
minimum on-time to decay sufficiently. Current limit is always active when the regulator is enabled and the soft start
function ensures current limit does not prevent regulator startup.
Under extended over-current conditions (such as a short), the buck regulator switching will automatically be disabled.
Once the over current condition is removed, the device automatically returns to normal operation.
Thermal Shutdown
If the die temperature exceeds T
SD
, SW outputs will tri-state to protect the device and its load from damage. Once the
device cools to T
SD
– T
SD_HYST
, the buck regulator will attempt to start up again.
Reference Soft Start
Internal references are ramped to prevent the output from overshoot during initial startup. During the soft start ramp,
current limit is still active, and protects the device in case of a shorted output.
Output Overvoltage
If the output of the regulator exceeds 3% of the set regulation voltage, the SW output tri-states to protect the device
from damage. This check occurs at the start of each switching cycle. If overvoltage occurs mid-cycle, the switching for
that cycle completes and the SW output tri-states on the next cycle.
PDC Under-Voltage Lockout
Buck regulator is off until PDC is over 4V with 300mV hysteresis.
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Application Schematics
Figure 7: Minimal PCB Area Configuration
(V
PDC
=12V, V
OUT
=5V, I
OUT
=50mA)
Figure 8: Standard Configuration
(V
PDC
=12V, V
OUT
=5V, I
OUT
=100-500mA)
4.7nF
50V
C4
47nF
C5
10nF
25V
C2
GND
4.7nF
50V
C6
4.7nF
50V
C7
GND
+
1
-
2 Out
J1
BATTERY
GND
60K
R5
GND
VAC1
VAC2
PDC
FREQ
ALERT
MOD_EN
MOD_CFG
RX COIL
AC1
AC2
0.25
R7
GND
GND
50K
R8
1
2
3
4
5
6
7
8
P1
Header 8
CHG_DIS
EOC
2.2uF
10V
C8
GND
22uF
10V
C9
22uF
10V
C10
4.7uH
L1
GND
100K
R9
VAC1
A1 PDC A2
SW C2
CHG_DIS
B4
GND B1
PDC B2
THERM C3
COMM1
A3
SW C1
EOC
C4
FREQ
D3
BST A4
GND D1
PDC D2
ALERT
B3
MOD_EN
D4
VAC2
E1 PDC E2
COMM2
E3
MOD_CFG
E4
FB A5
SYSOUT B5
VBAT C5
ISP D5
TOP_SET E5
U1
TS51224
1
2
3
J2
SYSOUT&THERM
THERM
SYSOUT
2.2uF
10V
C20
4.7nF
50V
C4
22uF
25V
C2
GND
47nF
C5
100nF
25V
C3
GND
4.7nF
50V
C6
4.7nF
50V
C7
GND
NP
C1
75K
R2
4.7K
R4
PDC
GND
+
1
-
2 Out
J1
BATTERY
47nF
C12
GND
GND
60K
R5
GND
VAC1
VAC2
PDC
FREQ
ALERT
MOD_EN
MOD_CFG
RX COIL
AC1
AC2
0.25
R7
GND
GND
50K
R8
10K
R6
1
2
3
4
5
6
7
8
P1
Header 8
CHG_DIS
EOC
2.2uF
10V
C8
GND
22uF
10V
C9
22uF
10V
C10
22uF
10V
C11
22uF
10V
C13
4.7uH
L1
GND
SYSOUT
100K
R9
VAC1
A1 PDC A2
SW C2
CHG_DIS
B4
GND B1
PDC B2
THERM C3
COMM1
A3
SW C1
EOC
C4
FREQ
D3
BST A4
GND D1
PDC D2
ALERT
B3
MOD_EN
D4
VAC2
E1 PDC E2
COMM2
E3
MOD_CFG
E4
FB A5
SYSOUT B5
VBAT C5
ISP D5
TOP_SET E5
U1
TS51224
LED1
GREEN
GND
1
2
3
J2
SYSOUT&THERM
THERM
SYSOUT
2.2uF
10V
C20
TS51224
Final Datasheet
June 19, 2017
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Package Information
0.10 C
0.08 C
0.05 C A B
CONTROLLING DIMENSIONS ARE IN MILLIMETERS
NOTES:
1.
AB
C
A
B
C
INDEX AREA
A1 CORNER
SEATING
1 2 3
PLANE
525X Ø 0.26±0.03
Ball Diameter
2.30±0.03
0.525±0.05
D
E
0.40
0.40
1.60
4
1.60
2.30±0.03
0.20±0.03
Figure 9: Package Outline Drawing
TS51224
Final Datasheet
June 19, 2017
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Package Information
Figure 10: Device Symbolization
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
NOTES:
2.
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS
25X Ø 0.210
0.40
1.60
0.40
1.60
Figure 11: Recommended Board Layout Land Pattern
TS51224
Final Datasheet
June 19, 2017
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Ordering Information
Device Part Number Description 25 Ball WCSP Package
(5x5 ball array, 0.4mm ball pitch)
TS51224-M000WCSR Wireless Power Receiver,
external resistor feedback Tape & Reel (3000 parts/reel)
TS51224
Final Datasheet
June 19, 2017
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IMPORTANT NOTICE
Information relating to this product and the application or design described herein is believed to be reliable,
however such information is provided as a guide only and Semtech assumes no liability for any errors in this
document, or for the application or design described herein. Semtech reserves the right to make changes to the
product or this document at any time without notice. Buyers should obtain the latest relevant information before
placing orders and should verify that such information is current and complete. Semtech warrants performance
of its products to the specifications applicable at the time of sale, and all sales are made in accordance with
Semtech’s standard terms and conditions of sale.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN
LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE
COULD BE REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE OR SEVERE PROPERTY OR
ENVIRONMENTAL DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE
UNDERTAKEN SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for
any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could
arise.
The Semtech name and logo are registered trademarks of the Semtech Corporation. All other trademarks and
trade names mentioned may be marks and names of Semtech or their respective companies. Semtech reserves
the right to make changes to, or discontinue any products described in this document without further notice.
Semtech makes no warranty, representation or guarantee, express or implied, regarding the suitability of its
products for any particular purpose. All rights reserved.
© Semtech 2017
Contact Information
Semtech Corporation
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111, Fax: (805) 498-3804
www.semtech.com