VEML6040A3OG - Vishay Semiconductors

VEML6040

www.vishay.com Vishay Semiconductors

Rev. 1.6, 21-Nov-16 1Document Number: 84276

For technical questions, contact: sensorstechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

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RGBW Color Sensor with I2C Interface

DESCRIPTION

VEML6040 color sensor senses red, green, blue, and white

light and incorporates photodiodes, amplifiers, and analog /

digital circuits into a single chip using CMOS process. With

the color sensor applied, the brightness, and color

temperature of backlight can be adjusted base on ambient

light source that makes panel looks more comfortable for

end user’s eyes. VEML6040’s adoption of FiltronTM

technology achieves the closest ambient light spectral

sensitivity to real human eye responses.

VEML6040 provides excellent temperature compensation

capability for keeping the output stable under changing

temperature. VEML6040’s function are easily operated

via the simple command format of I2C (SMBus compatible)

interface protocol. VEML6040’s operating voltage ranges

from 2.5 V to 3.6 V. VEML6040 is packaged in a

lead (Pb)-free 4 pin OPLGA package which offers the

best market-proven reliability.

FEATURES

• Package type: surface mount

• Dimensions (L x W x H in mm): 2.0 x 1.25 x 1.0

• Integrated modules: color sensor (RGBW) and

signal conditioning IC

•Filtron

TM technology provides a spectrum

matching real human eye responses

• Supports low transmittance (dark) lens design

• Fluorescent light flicker immunity

• Provides 16-bit resolution for each channel

(R, G, B, W)

• Selectable maximum detection range (515.4, 1031,

2062, 4124, 8248, or 16 496) lux with highest sensitivity

0.007865 lux/step

• Package: OPLGA

• Temperature compensation: -40 °C to +85 °C

• Low power consumption I2C (SMBus compatible)

interface

• Floor life: 168 h, MSL 3, according to J-STD-020

• Output type: I2C bus

• Operation voltage: 2.5 V to 3.6 V

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

APPLICATIONS

• Handheld device

• Notebook

• Consumer device

• Industrial and mechanical application

Note

(1) Adjustable through I2C interface

Note

(1) MOQ: minimum order quantity

PRODUCT SUMMARY

PART NUMBER

OPERATING

VOLTAGE RANGE

(V)

I2C BUS

VOLTAGE RANGE

(V)

PEAK SENSITIVITY

(nm)

RANGE OF SPECTRAL

BANDWIDTH λ0.5

(nm)

OUTPUT CODE

VEML6040 2.5 to 3.6 1.7 to 3.6 650, 550, 450 (R, G, B) ± 35, ± 35, ± 40 (R, G, B) 16 bit, I2C

ORDERING INFORMATION

ORDERING CODE PACKAGING VOLUME (1) REMARKS

VEML6040A3OG Tape and reel MOQ: 2500 pcs 2.0 mm x 1.25 mm x 1.0 mm

VEML6040

www.vishay.com Vishay Semiconductors

Rev. 1.6, 21-Nov-16 2Document Number: 84276

For technical questions, contact: sensorstechsupport@vishay.com

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BLOCK DIAGRAM

ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT

Supply voltage VDD 03.6V

Operation temperature range Tamb -40 +85 °C

Storage temperature range Tstg -40 +85 °C

RECOMMENDED OPERATING CONDITIONS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT

Supply voltage VDD 2.5 3.6 V

Operation temperature range Tamb -40 +85 °C

I2C bus operating frequency f(I2CCLK) 10 400 kHz

PIN DESCRIPTIONS

PIN ASSIGNMENT SYMBOL TYPE FUNCTION

1 GND I Ground

2 SDAT I / O (open drain) I2C data bus data input / output

3SCLKII

2C digital bus clock input

DD I Power supply input

VDD

SCLSDA

GND 1

VEML6040

Output buffer

I2C interface

Control logic

VEML6040

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Rev. 1.6, 21-Nov-16 3Document Number: 84276

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Notes

(1) Test condition: VDD = 3.3 V, temperature: 25 °C

(2) Light source: white LED

(3) LED spectrum given in fig. 1; IT = 160 ms

Fig. 1 - Normalized Spectral Response of Used LEDs for Measuring the Irradiance Responsivity

BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT

Supply voltage VDD 2.5 - 3.6 V

Supply current IDD - 200 - μA

I2C signal input

Logic high VDD = 3.3 V VIH 1.5 - - V

Logic low VIL --0.8

Logic high VDD = 2.6 V VIH 1.4 - - V

Logic low VIL --0.6

Peak sensitivity wavelength

λPR - 650 - nm

λPG - 550 - nm

λPB - 450 - nm

Irradiance responsivity

λPR = 619 nm (3) -96-

counts/(μW/cm2)λPG = 518 nm (3) -74-

λPB = 467 nm (3) -56-

Detectable intensity Minimum G channel, IT = 1280 ms (1)(2) - 0.007865 - lx

Maximum G channel, IT = 40 ms (1)(2) - 16 496 -

Dark offset G channel, IT = 80 ms (1) 0-3

Operating temperature range Tamb -40 - +85 °C

Shutdown current Light condition = dark, VDD = 3.6 V IDD - 800 - nA

100

1000

10000

0.2

0.4

2.0

150 900

Average Gain 1

Transient Thermal Impedance

Relative Responsivity (µW/cm2)

Power (W)

2nd line

Wavelength (nm)

700650600550500450400350300250200

1.8

1.0

0.8

0.6

Blue

Red

Green

850800750

VEML6040

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Rev. 1.6, 21-Nov-16 4Document Number: 84276

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Fig. 2 - I2C Bus Timing Diagram

I2C BUS TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

PARAMETER SYMBOL STANDARD MODE FAST MODE UNIT

MIN. MAX. MIN. MAX.

Clock frequency f(SMBCLK) 10 100 10 400 kHz

Bus free time between start and stop condition t(BUF) 4.7 - 1.3 - μs

Hold time after (repeated) start condition;

after this period, the first clock is generated t(HDSTA) 4.0 - 0.6 - μs

Repeated start condition setup time t(SUSTA) 4.7 - 0.6 - μs

Stop condition setup time t(SUSTO) 4.0 - 0.6 - μs

Data hold time t(HDDAT) 300 - 90 - ns

Data setup time t(SUDAT) 250 - 100 - ns

I2C clock (SCK) low period t(LOW) 4.7 - 1.3 - μs

I2C clock (SCK) high period t(HIGH) 4.0 - 0.6 - μs

Detect clock / data low timeout t(TIMEOUT) 25 35 - - ms

Clock / data fall time t(F) - 300 - 300 ns

Clock / data rise time t(R) - 1000 - 300 ns

VIH

t(LOW)

VIL

t(R)

t(HDSTA)

t(BUF)

VIL

t(HDDAT)

t(F)

t(HIGH) t(SUSTA)

t(SUDAT)

t(SUSTO)

I2CBus

CLOCK

(SCLK)

I2CBus

DATA

(SDAT)

Stop Condition

Star Condition

VEML6040

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Rev. 1.6, 21-Nov-16 5Document Number: 84276

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PARAMETER TIMING INFORMATION

Fig. 3 - I2C Bus Timing for Sending Word Command Format

Fig. 4 - I2C Bus Timing for Receiving Word Command Format

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www.vishay.com Vishay Semiconductors

Rev. 1.6, 21-Nov-16 6Document Number: 84276

For technical questions, contact: sensorstechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

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TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

Fig. 5 - Normalized Spectral Response

Fig. 6 - Normalized Output vs. View Angle

APPLICATION INFORMATION

Pin Connection with the Host

VEML6040 integrates R, G, B, and W sensor together with I2C interface. It is very easy for the baseband (CPU) to access

VEML6040 output data via I2C interface without extra software algorithms. The hardware schematic is shown in the following

diagram.

The 0.1 μF capacitor near the VDD pin is used for power supply noise rejection. The 2.2 kΩs are suitable for the pull-up resistors

of I2C.

Fig. 7 - Hardware Pin Connection Diagram

100

1000

10000

0.1

0.4

1.0

400 1000

Average Gain 1

Transient Thermal Impedance

Relative Responsivity (µW/cm2)

Normalized Response

2nd line

Wavelength (nm)

950900850800750700650600550500450

0.9

0.8

0.7

0.6

Blue

Red

Green

0.5

0.3

0.2

White

SDA (2)

SCL (3)

GND (1)

VDD (4)

100 nF

2.5 V to 3.6 V

1.7 V to 3.6 V

R2R1

VEML6040

I2C bus data SDA

I2C bus clock SCL

Host

Micro Controller

VEML6040

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Rev. 1.6, 21-Nov-16 7Document Number: 84276

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Digital Interface

The VEML6040 contains a CONF register (00h) used for operation control and parameter setup. Measurement results are stored

in four separate registers, one each for red, green, blue, and white respectively (08h to 0Bh). All registers are accessible via I2C

communication. Figure 8 shows the basic I2C communication with the VEML6040. Each of the registers in the VEML6040 are

16 bit wide, so 16 bit should be written when a write command is sent, and 16 bit should be read when a read command is sent.

The built in I2C interface is compatible with I2C modes “standard” and “fast”: 100 kHz to 400 kHz

Fig. 8 - Command Protocol Format

Note

• Please note the repeat start condition when data is read from the sensor. A stop condition should not be sent here.

Slave Address and Function Description

VEML6040 uses 10h slave address for 7-bit I2C addressing protocol. VEML6040 has 16-bit resolution for each channel (R, G,

B, and W) that provides sensitivity up to 0.0056 lux/step for G, which is advantageous under a low transmittance lens design

(dark lens).

Note

• Slave address is 7-bit addressing protocol

TABLE 1 - SLAVE ADDRESS AND COMMAND CODE DESCRIPTION

SLAVE ADDRESS 0x10

COMMAND

CODE

DATE BYTE

LOW / HIGH

NAME R / W BIT

76543210

00h L CONF R / W 0 IT (2 : 0) 0 TRIG AF SD

H Reserved R / W Reserved

01h to 07h L Reserved R / W Reserved

H Reserved R / W Reserved

08h L R_DATA R R_Data (7 : 0)

H R_DATA R R_Data (15 : 8)

09h L G_DATA R G_Data (7 : 0)

H G_DATA R G_Data (15 : 8)

0Ah L B_DATA R B_Data (7 : 0)

H B_DATA R B_Data (15 : 8)

0Bh L W_DATA R W_Data (7 : 0)

H W_DATA R W_Data (15 : 8)

SSlave address

ACommand code AData byte low AData byte high A

17 811 1 818

Send Word ɦġWrite Command to VEML6040

Slave address

ACommand code A S Slave address

AData byte low AData byte high A P

11811711818 11

Receive Word ɦġRead Data from VEML6040

S = start condition

P = stop condition

A = acknowledge

Shaded area = VEML6040 acknowledge

VEML6040

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Configuration Register Format

VEML6040 has a 16-bit configuration register for controlling. The description of each command format is shown in the following

tables.

TABLE 2-1 - COMMAND CODE 00H BITS DESCRIPTION

SLAVE ADDRESS: 0x10; REGISTER NAME: CONF; COMMAND CODE: 00H / DATA BYTE LOW

XITXTRIGAFSD

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

0IT2IT1IT00TRIGAFSD

DESCRIPTION

IT Integration time setting

TRIG Proceed one detecting cycle at manual force mode

AF Auto / manual force mode

SD Chip shutdown setting

TABLE 2-2 - COMMAND CODE 00H REGISTER SETTING

BITS SETTING DESCRIPTION BITS SETTING DESCRIPTION

BIT 7 Default = 0 BIT 3 Default = 0

BIT 6, 5, 4

IT (2 : 0)

(0 : 0 : 0) = 40 ms BIT 2

TRIG

0 = no trigger

(0 : 0 : 1) = 80 ms 1 = trigger one time detect cycle

(0 : 1 : 0) = 160 ms BIT 1

0 = auto mode

(0 : 1 : 1) = 320 ms 1 = force mode

(1 : 0 : 0) = 640 ms BIT 0

0 = enable color sensor

(1 : 0 : 1) = 1280 ms 1 = disable color sensor

TABLE 3-1 - RESERVE COMMAND CODE DESCRIPTION

RESERVED COMMAND CODE: 00H / DATA BYTE HIGH

Command Bit Description

Reserved 7 : 0 Default = 0x00

TABLE 3-2 - RESERVE COMMAND CODE DESCRIPTION

RESERVED COMMAND CODE: 01H TO 07H

Command Bit Description

Reserved 7 : 0 Default = 0x00

TABLE 4 - READ OUT COMMAND CODE DESCRIPTION

R_DATA 0x08_L (08H data byte low) 7 : 0 0x00 to 0xFF, R channel LSB output data

0x08_H (08H data byte high) 7 : 0 0x00 to 0xFF, R channel MSB output data

G_DATA 0x09_L (09H data byte low) 7 : 0 0x00 to 0xFF, G channel LSB output data

0x09_H (09H data byte high) 7 : 0 0x00 to 0xFF, G channel MSB output data

B_DATA 0x0A_L (0AH data byte low) 7 : 0 0x00 to 0xFF, B channel LSB output data

0x0A_H (0AH data byte high) 7 : 0 0x00 to 0xFF, B channel MSB output data

W_DATA 0x0B_L (0BH data byte low) 7 : 0 0x00 to 0xFF, W channel LSB output data

0x0B_H (0BH data byte high) 7 : 0 0x00 to 0xFF, W channel MSB output data

VEML6040

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Rev. 1.6, 21-Nov-16 9Document Number: 84276

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Data Access

Each of the R, G, B, and W result registers has a 16-bit resolution (2 bytes). One byte is the LSB and the other byte is the MSB.

The host needs to follow the read word protocol as shown in figure 7. The data format shows as below.

Note

• Data byte low represents LSB and data byte high represents MSB.

The integration time settings result in the corresponding resolutions that are shown in table 6.

Data Auto-Memorization

VEML6040 keeps the last results read. These values will remain in the registers, and can be read from these registers, until the

device wakes up and a new measurement is made.

Lux and CCT Calculation

In order to use the results to calculate the lux or correlated color temperature, please refer to the “Designing the VEML6040 into

an Application” application note (www.vishay.com/doc?84331).

TABLE 5 - 16-BIT DATA FORMAT

VEML6040 16-BIT DATA FORMAT

Data bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Data byte low

Data byte high

TABLE 6 - G CHANNEL RESOLUTION AND MAXIMUM DETECTION RANGE

IT SETTINGS G SENSITIVITY MAX. DETECTABLE LUX

IT (2 : 0) INTEGRATION TIME

(0 : 0 : 0) 40 ms 0.25168 16 496

(0 : 0 : 1) 80 ms 0.12584 8248

(0 : 1 : 0) 160 ms 0.06292 4124

(0 : 1 : 1) 320 ms 0.03146 2062

(1 : 0 : 0) 640 ms 0.01573 1031

(1 : 0 : 1) 1280 ms 0.007865 515.4

Slave address

ACommand code A S Slave address

AData byte low AData byte high A P

VEML6040

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PACKAGE INFORMATION in millimeters

Fig. 9 - VEML6040 A3OG Package Dimensions

LAYOUT NOTICE AND REFERENCE CIRCUIT in millimeters

Fig. 10 - VEML6040 PCB Layout Footprint

RECOMMENDED STORAGE AND REBAKING CONDITIONS

PARAMETER CONDITIONS MIN. MAX. UNIT

Storage temperature 5 50 °C

Relative humidity - 60 %

Open time - 168 h

Total time From the date code on the aluminized envelope (unopened) - 12 months

Rebaking Tape and reel: 60 °C - 22 h

Tube: 60 °C - 22 h

0.70

TOP VIEW

SIDE VIEW

2.00 ± 0.15

1.25 ± 0.15

0.450.56

DIE

0.25

30um ± 10 um

0.45 ± 0.05 1.10

0.55 ± 0.05

1.0

0.35 ± 0.05

1± 0.10

0~0.05

0~0.06

0~0.02

0~0.04

0.1

1.00± 0.15

0.1

0.625± 0.15

VEML6040

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RECOMMENDED INFRARED REFLOW

Soldering conditions which are based on J-STD-020 C

Recommend Normal Solder Reflow is 235 °C to 255 °C

Fig. 11 - VEML6040 OPLGA Solder Reflow Profile Chart

RECOMMENDED IRON TIP SOLDERING CONDITION AND WARNING HANDLING

1. Solder the device with the following conditions:

1.1. Soldering temperature: 400 °C (max.)

1.2. Soldering time: 3 s (max.)

2. If the temperature of the method portion rises in addition to the residual stress between the leads, the possibility that an

open or short circuit occurs due to the deformation or destruction of the resin increases.

3. The following methods: VPS and wave soldering, have not been suggested for the component assembly.

4. Cleaning method conditions:

4.1. Solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol

4.2. Solvent temperature < 45 °C (max.)

4.3. Time: 3 min (min.)

IR REFLOW PROFILE CONDITION

PARAMETER CONDITIONS TEMPERATURE TIME

Peak temperature 255 °C + 0 °C / - 5 °C (max.: 260 °C) 10 s

Preheat temperature range and timing 150 °C to 200 °C 60 s to 180 s

Timing within 5 °C to peak temperature - 10 s to 30 s

Timing maintained above temperature / time 217 °C 60 s to 150 s

Timing from 25 °C to peak temperature - 8 min (max.)

Ramp-up rate 3 °C/s (max.) -

Ramp-down rate 6 °C/s (max.) -

Temperature (ºC)

VEML6040

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TAPE PACKAGING INFORMATION in millimeters

Fig. 12 - VEML6040 A3OG Package Carrier Tape Fig. 13 - Taping Direction

Fig. 14 - Reel Dimensions

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Revision: 08-Feb-17 1Document Number: 91000

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

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