5962-8774201EA - Texas Instruments High-Performance Analog

UC1834

UC2834

UC3834

High Efficiency Linear Regulator

FEATURES

•Mi nimum V IN - VOUT Less Than

0.5V At 5A Load With Ext ernal

Pass Device

•Equally Usable For Either Positive

or Negative Regulator Design

•Adjustable Low Threshold Current

Sense Amplifier

•Under And Over-V o ltage F ault Alert

With Pr ogrammable Delay

•Over -Voltage F au lt Lat ch With

100mA Crowbar Drive Output

DESCRIPTION

The UC1834 family of integrated ci rcuits is optimized for the design of l ow

input-output differential linear regulators. A high gain amplifier and 200mA

sink or source drive outputs facilitate high output current designs which use

an external pass device. With both positive and negative precision refer-

ences, either pol arity of regulator can be implement ed. A c urrent sense am-

plifier with a low, adjustable, threshold can be used to sense and limit

currents in either the posit ive or negative supply lines.

In addition, this series of parts has a fault monitoring circuit which senses

both und er and ove r-voltage fault condi tions. Af ter a user defined delay for

transi ent reje cti on, this circuitry provides a fault alert output for either fault

condition. In the over-voltage case, a 100mA crowbar output is activated.

An ove r-voltage latch will maintai n the crowbar output and can be used to

shutdown the driver outputs. System control to the device can be accom-

modated at a singl e input which will act as both a supply reset and remote

shutdown terminal. These die are protected against excessive power dissi-

pation by an internal thermal shutdown funct ion.

BL OCK DIAG RAM

6/94

ABSOL UTE MAXIMUM RAT ING S (Note 1)

Input Supply Voltage, VIN + . . . . . . . . . . . . . . . . . . . . . . . . . 40V

Driver Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA

Driver Source to Sink Voltag e . . . . . . . . . . . . . . . . . . . . . . . 40V

Crowba r Curren t. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −200mA

+ 1.5V Reference O ut pu t Curre nt . . . . . . . . . . . . . . . . . . −10mA

F ault Aler t Vo ltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V

F ault Aler t Cu rr ent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA

Error Amplifier Inputs . . . . . . . . . . . . . . . . . . . . . . −0.5V to 35 V

Cu rrent Sense Inp ut s . . . . . . . . . . . . . . . . . . . . . . −0.5V t o 40V

O.V. Lat ch Out pu t Voltage . . . . . . . . . . . . . . . . . . −0. 5V to 40 V

O.V. Latch Output Current . . . . . . . . . . . . . . . . . . . . . . . . 15mA

Power Dissipation at TA = 25°C. . . . . . . . . . . . . . . . . . 1000m W

Power Dissipation at TC = 25°C. . . . . . . . . . . . . . . . . . 2000m W

Oper at ing Jun ctio n Tem per atur e. . . . . . . . . . −55°C to +150° C

Storage Temperature. . . . . . . . . . . . . . . . . . . −65°C to +150° C

Lead Tem per at ur e (sold ering , 10 secon ds). . . . . . . . . . . 300° C

Note 1: V olta ges ar e re fe ren ce to V

−

, Pin 5.

Curre nt s are p osit ive in to, ne gat ive out of the spec ifie d

terminals.

Con sult Packag in g sect ion of Dat abo ok for ther m a l

limitat ions an d cons iderations of packa ge.

UC1834

UC2834

UC3834

CONNECTION DIAGRAMS

DIL -16, SO IC- 16 (T O P VI EW)

J or N Package, DW Packag e PLCC-20, L CC-20 (TO P VIEW)

Q, L Packages

PACKAGE PIN FUNCTION

FUNCTION PIN

N/C 1

VIN + 2

−2. 0V RE F 3

+ 1.5V R EF 4

T hre shold Adjus t 5

N/C 6

VIN−7

Sense−8

Sense+ 9

N.Inv. Input 10

N/C 11

Inv. Input 12

Fault Alert 13

Fault Delay 14

Driver Sink 15

N/C 16

Driver Source 17

Co mp ensa tion / Shutd own 18

O.V. Latch Output/Reset 19

Crowba r Gate 20

PARAMETER TEST CONDI TION S UC1834

UC2834 UC3834 UNITS

MIN TYP MAX MIN TYP MAX

Turn- on Char act er is tics

Standb y Supply Cur re nt 5 .5 7 5.5 1 0 mA

+1.5 Volt Reference

Out put Voltage TJ = 25°C 1.485 1.5 1.515 1.4 7 1.5 1.53 V

TJ(MIN) ≤ TJ ≤ TJ(MAX) 1.47 1.53 1.455 1.545

Line Reg ulat ion VIN+ = 5 to 35V 1 10 1 15 mV

Load Regulat ion I OUT = 0 to 2mA 1 10 1 15 mV

-2.0 Volt Refe ren ce (No te 2)

Out put Voltage ( Referenced

to VIN+)TJ = 25°C −2.04 −2−1.96 −2.06 −2−1.94 V

TJ(MIN) ≤ TJ ≤ TJ(MAX) −2.06 −1.94 −2.08 −1.92

Line Reg ulat ion VIN+ = 5 to 35V 1.5 15 1.5 20 mV

Out put Impedance 2 .3 2.3 kΩ

Error Amplifier Section

Input O ffs et Vo lta ge VCM = 1. 5 V 1 6 1 10 m V

Input Bias Current VCM = 1. 5 V −1−4−1−8µA

Input O ffs et Cu rr ent VCM = 1. 5 V 0 .1 1 0. 1 2 µA

Sma ll Signal Ope n Loop Ga in Ou tput @ Pin 14, Pin 12 = V IN+

Pin 13, 20 Ω to VIN−50 65 50 65 dB

CMRR VCM = 0. 5 to 33V, VIN+ = 35V 60 80 60 80 dB

PSRR VIN+ = 5 to 35V, VCM = 1.5V 70 100 70 100 dB

Drive r Sect io n

Maximu m Output Current 200 350 200 350 mA

Satur atio n Voltage I OUT = 100mA 0 .5 1.2 0.5 1 .5 V

Out put Leakage Curr ent Pin 12 = 35V, Pin 13 = V IN−, Pin 14 = V IN−0.1 50 0.1 50 µA

Shutdo wn In put Volta ge

at Pin 14 IOUT ≤ 100µA, Pin 13 = VIN−, Pin 12 =

VIN+ 0.4 1 0.4 1 V

Shutd o wn In put Current

at Pin 14 Pin 14 = VIN−, Pin 12 = VIN+

IOUT ≤ 100µA, Pin 13 = VIN−−100 −150 −100 −150 µA

Thermal Shut down (Note 3) 165 165 ° C

Fault Amplif ie r Sect i on

Under- and Over-Voltage

Fault Thr eshold VCM = 1.5V, @ E/A I n puts 12 0 150 1 8 0 11 0 150 1 90 mV

Comm on M ode Sen sitivit y V IN+ = 3 5V, V CM = 1. 5 t o 33 V −0.4 −0.8 −0.4 −1.0 %/v

Supply Sensitivity VCM = 1. 5V, VIN+ = 5 to 35V −0.5 −1.0 −0.5 −1.2 %/V

Fault Delay 30 45 60 30 45 60 ms/µF

Fault Alert Output Curren t 2 5 2 5 mA

Fault Alert Saturatio n Voltage IOUT = 1mA 0 .2 0. 5 0.2 0.5 V

O. V. La tch O ut put Curr ent 2 4 2 4 m A

O. V. Latc h Satura tion Voltag e IOUT = 1mA 1 .0 1. 3 1.0 1 .3 V

O. V. Latc h Out put Reset

Voltage 0.3 0.4 0.6 0.3 0.4 0.6 V

Crowbar Gate Current −100 −175 −100 −175 mA

Crowbar Gat e Leakage

Current VIN+ = 35V, Pin 16 = VIN−−0.5 −50 −0.5 −50 µA

No te 2: When using bot h the 1.5V and

−

2.0V refer enc es the current o ut of pin 3 sh ould be ba lanced by an equ ivalent cur ren t into

Pin 2. The

−

2.0V output will change

−

2.3mV per

A of imbalance.

No te 3: Therm al shut down t ur ns off the drive r . If Pin 15 (O . V. Latch O utput ) is tied to Pin 14 (Com pe nsat ion/ Shu tdown) the

O.V. Latch will be re set.

UC1834

UC2834

UC3834

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA=−55°C to +125°C

for the UC1834, −40°C t o +85°C for the UC2834, and 0°C to +70°C for the

UC3834. VIN+ = 15V, VIN− = 0V, TA = TJ.

PARAMETER TEST CONDITIONS UC1834

UC2834 UC3834 UNITS

MIN TYP MAX MIN TYP MAX

Current Sense Amplifier Section

T hre shold Volt age Pin 4 Open, VCM = VIN+ or VIN−130 150 170 120 150 180 mV

Pin 4 = 0.5V, VCM = V IN+ or V IN−40 50 60 30 50 70

T hre shold Sup ply Sensit ivity Pin 4 Open, VCM = VIN−, VIN+ = 5 to 35V −0.1 −0.3 −0.1 −0.5 %/V

Ad j. Input Cur ren t Pin 4 = 0.5 V −2−10 −2−10 µA

Se nse Inpu t Bias Cur rent VCM = VIN+ 100 200 100 200 µA

VCM = VIN−−100 −200 −100 −200

UC1834

UC2834

UC3834

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA=−55°C to +125°C

for the UC1834, −40°C t o +85°C for the UC2834, and 0°C to +70°C for the

UC3834. VIN+ = 15V, VIN− = 0V. TA = TJ

Differen tial Vo ltage at Curren t Sense

Inputs - mV (reference to sense − input)

Curren t Sense T hresh old Adj ust ment Cur rent Limiting Knee Characteristics

Error Amplifier Gain and Phase

Frequency Response Current Sen se Ampl ifier Gai n an d Ph as e

Freq uen cy Respo n s e

UC1834

UC2834

UC3834

Both th e curren t sense and erro r amplifi ers on the UC1834

are tran sc onducta nce t ype ampl i fiers. As a res ult , the ir vol t-

age gain is a direct func tion of the load impedance at their

shared output pin, Pin 14. T heir small signal voltage gain as

a function of load and frequency is nominally given by;

⁄

(

)

700Ω

and A

. ⁄

(

)

70Ω

for: f

≤

500kHz and |Z

(f) |

≤

1 M

Ω

Where:

AV=S mall Sign al Volta ge Ga in to pi n 1 4.

ZL(f) = Load Impedance at Pin 14.

The UC1834 fault delay circuitry prevents the fault outputs

from responding to transient fault conditions. The delay reset

la tc h insur es th at the f ull, use r def ined, de lay p ass es befo re an

over-voltage fault response o ccurs. This prevents un neces sary

crowbar, or latched-off conditions, from occurring following

sharp under-voltage to over-voltage transients.

The crowbar output on the UC1834 is activated following a

sustained over-voltage condition. The crowbar output remains

high as long as the fault condition persists, or, as long as the

over-voltage latch is set. The latch is set with an over-voltage

fault if the voltage at Pin 15 is above the latch reset threshold,

typically 0.4V. When the latch is set, its Q− output will pull Pin

15 low through a series diode. As long as a nominal pull-up

lo ad ex ists , the series diode preve nts Q− from pulli ng Pin 15

below the reset threshold. However, Pin 15 is pulled low

enou gh to disable the dri ver outputs if Pins 15 and 14 are

tied together. With Pin 15 and 14 common, the regulator

will latch off in response to an over-voltage fault. If the

fault condition is cleared and Pins 14 and 15 are momen-

tarily pulled below the latch reset threshold, t he driver out-

puts are re-enabled.

APPL ICATI ON INF ORMATI ON Fo ldb ack Curren t L imiti n g

Settin g th e Thresho l d Adju st Vo lt age ( V ADJ)

TYPICAL APPLICATIONS

UNITRODE CORPORATION

7 CONTINENTAL BLVD. • MERRIMACK, NH 03054

TEL. (603) 424-2410 • FAX (603) 424-3460

UC1834

UC2834

UC3834

5-10 Amp Positive Regulator

5-10 Amp Negative Regulator

PACKAGE OPTION ADDENDUM

www.ti.com 10-Oct-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

5962-87742012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

87742012A

UC1834L/

883B

5962-8774201EA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8774201EA

UC1834J/883B

UC1834J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 UC1834J

UC1834J/81025 OBSOLETE CDIP J 16 TBD Call TI Call TI -55 to 125

UC1834J883B ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8774201EA

UC1834J/883B

UC1834L ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 UC1834L

UC1834L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

87742012A

UC1834L/

883B

UC2834DW ACTIVE SOIC DW 16 40 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW

UC2834DWG4 ACTIVE SOIC DW 16 40 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW

UC2834DWTR ACTIVE SOIC DW 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW

UC2834DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW

UC2834J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -40 to 85 UC2834J

UC2834N ACTIVE PDIP N 16 25 Green (RoHS

& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UC2834N

UC2834NG4 ACTIVE PDIP N 16 25 Green (RoHS

& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UC2834N

UC2834Q ACTIVE PLCC FN 20 46 Green (RoHS

& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 UC2834Q

UC2834QG3 ACTIVE PLCC FN 20 46 Green (RoHS

& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 UC2834Q

UC2834QTR OBSOLETE PLCC FN 20 TBD Call TI Call TI -40 to 85 UC2834Q

PACKAGE OPTION ADDENDUM

www.ti.com 10-Oct-2013

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

UC2834QTRG3 OBSOLETE PLCC FN 20 TBD Call TI Call TI -40 to 85 UC2834Q

UC3834DW ACTIVE SOIC DW 16 40 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3834DW

UC3834DWG4 ACTIVE SOIC DW 16 40 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3834DW

UC3834N ACTIVE PDIP N 16 25 Green (RoHS

& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UC3834N

UC3834NG4 ACTIVE PDIP N 16 25 Green (RoHS

& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UC3834N

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

PACKAGE OPTION ADDENDUM

www.ti.com 10-Oct-2013

Addendum-Page 3

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF UC1834, UC2834, UC2834M, UC3834 :

•Catalog: UC3834, UC2834

•Military: UC2834M, UC1834

•Space: UC1834-SP

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

•Military - QML certified for Military and Defense Applications

•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

UC2834DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 8-May-2013

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

UC2834DWTR SOIC DW 16 2000 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 8-May-2013

Pack Materials-Page 2

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