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LM4941 1.25 Watt Fully Differential Audio Power Amplifier
With RF Suppression and Shutdown
Check for Samples: LM4941,LM4941SDBD,LM4941TMBD
1FEATURES DESCRIPTION
The LM4941 is a fully differential audio power
2• Improved RF Suppression, By Up to 20dB amplifier primarily designed for demanding
Over Previous Designs in Selected applications in mobile phones and other portable
Applications communication device applications. It is capable of
• Fully Differential Amplification delivering 1.25 watts of continuous average power to
a 8Ωload with less than 1% distortion (THD+N) from
• Available in Space-Saving DSBGA Package a 5VDC power supply. The LM4941 does not require
• Ultra Low Current Shutdown Mode output coupling capacitors or bootstrap capacitors,
• Can Drive Capacitive Loads up to 100pF and therefore is ideally suited for mobile phone and
• Improved Pop & Click Circuitry Eliminates other small form factor applications where minimal
PCB space is a primary requirement.
Noises During Turn-On and Turn-Off
Transitions The LM4941 also features proprietary internal
• 2.4 - 5.5V Operation circuitry that suppresses the coupling of RF signals
into the chip. This is important because certain types
• No Output Coupling Capacitors, Snubber of RF signals (such as GSM) can couple into audio
Networks or Bootstrap Capacitors Required amplifiers in such a way that part of the signal is
heard through the speaker. The RF suppression
APPLICATIONS circuitry in the LM4941 makes it well-suited for
• Mobile Phones portable applications in which strong RF signals
generated by an antenna from or a cellular phone or
• PDAs other portable electronic device may couple audibly
• Portable Electronic Devices into the amplifier.
Other features include a low-power consumption
KEY SPECIFICATIONS shutdown mode, internal thermal shutdown
• Improved PSRR at 217Hz 95dB (typ) protection, and advanced pop & click circuitry.
• Power Output, VDD = 5.0V, RL= 8Ω, 1% THD+N
1.25W (typ)
• Power Output, VDD = 3.0V, RL= 8Ω, 1% THD+N
430mW (typ)
• Shutdown Current 0.1µA (typ)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2006–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
A B C
OUT-
GND BYP
GND
3
2
1
VDD OUT+
+IN -IN
SHDN
1
2
3
4
-IN
BYP
SHDN
+IN
8
7
6
5
OUT+
VDD
GND
OUT-
SHUTDOWN
BYP
- Differential Input -IN
+ Differential Input +IN
-
+
VO+
VO-
GND
VDD
CS
1 PF
+
RL
8:
+
-
Ri1
Ri2
RF2
RF1
Common
Mode
Bias
CB
1.0 PF
20 k:
20 k:
20 k:
20 k:
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Typical Application
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram xxx
xxx
Figure 3. 8-Pin WSON - Top View
See NGS0008C Package
Figure 2. 9-Bump DSBGA - Top View
See YFQ0009 Package
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)(2)(3)
Supply Voltage 6.0V
Storage Temperature −65°C to +150°C
Input Voltage −0.3V to VDD +0.3V
Power Dissipation(4)(5) Internally Limited
ESD Susceptibility(6) 2000V
ESD Susceptibility(7) 200V
Junction Temperature 150°C
Thermal Resistance θJA (TM) 100°C/W
θJA (WSON) 71°C/W
Soldering Information See AN-1187 (SNOA401)
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM4941, see power derating curve for additional information.
(5) Maximum Power Dissipation (PDMAX) in the device occurs at an output power level significantly below full output power. PDMAX can be
calculated using Equation 3 shown in the Application section. It may also be obtained from the Power Dissipation graphs.
(6) Human body model, 100pF discharged through a 1.5kΩresistor.
(7) Machine Model, 220pF – 240pF discharged through all pins.
Operating Ratings
Temperature Range TMIN ≤TA≤TMAX −40°C ≤TA≤85°C
Supply Voltage 2.4V ≤VDD ≤5.5V
Electrical Characteristics VDD = 5V(1)(2)
The following specifications apply for VDD = 5V, AV= 1V/V, and 8Ωload unless otherwise specified. Limits apply for TA=
25°C. LM4941 Units
Symbol Parameter Conditions (Limits)
Typical(3) Limit(4)(5)
VIN = 0V, no load 1.7 2.3 mA (max)
IDD Quiescent Power Supply Current VIN = 0V, RL= 8Ω1.7 mA
ISD Shutdown Current VSHDN = GND 0.1 0.8 µA (max)
THD+N = 1% (max); f = 1 kHz
RL= 8Ω1.25 1.15 W (min)
POOutput Power THD+N = 10% (max); f = 1 kHz
RL= 8Ω1.54 W
THD+N Total Harmonic Distortion + Noise PO= 0.7 W; f = 1kHz 0.04 %
VRIPPLE = 200mVP-P Sine
PSRR Power Supply Rejection Ratio f = 217Hz(6) 95 80 dB (min)
f = 1kHz(6) 90 dB
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) 10Ωterminated input.
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Electrical Characteristics VDD = 5V(1)(2) (continued)
The following specifications apply for VDD = 5V, AV= 1V/V, and 8Ωload unless otherwise specified. Limits apply for TA=
25°C. LM4941 Units
Symbol Parameter Conditions (Limits)
Typical(3) Limit(4)(5)
f = 217Hz, VCM = 200mVP-P Sine 70 dB
CMRR Common-Mode Rejection Ratio f = 20Hz–20kHz , VCM = 200mVpp 70 dB
VOS Output Offset Voltage VIN = 0V 2 6 mV (max)
VSDIH Shutdown Voltage Input High 1.4 V (min)
VSDIL Shutdown Voltage Input Low 0.4 V (max)
SNR Signal-to-Noise Ratio PO= 1W, f = 1kHz 108 dB
TWU Wake-up Time from Shutdown CBYPASS = 1μF 12 ms
Electrical Characteristics VDD = 3V(1)(2)
The following specifications apply for VDD = 3V, AV= 1V/V, and 8Ωload unless otherwise specified. Limits apply for TA=
25°C. LM4941 Units
Symbol Parameter Conditions (Limits)
Typical(3) Limit(4)(5)
VIN = 0V, no load 1.6 2.2 mA (max)
IDD Quiescent Power Supply Current VIN = 0V, RL= 8Ω1.6 mA
ISD Shutdown Current VSHDN = GND 0.1 0.8 µA (max)
THD+N = 1% (max); f = 1 kHz
RL= 8Ω0.43 W
POOutput Power THD+N = 10% (max); f = 1 kHz
RL= 8Ω0.54 W
THD+N Total Harmonic Distortion + Noise PO= 0.25W; f = 1kHz 0.05 %
VRIPPLE = 200mVPP Sine
PSRR Power Supply Rejection Ratio f = 217Hz(6) 95 dB
f = 1kHz(6) 90 dB
CMRR Common-Mode Rejection Ratio f = 217Hz, VCM = 200mVPP Sine 70 dB
VOS Output Offset Voltage VIN = 0V 2 6 mV (max)
VSDIH Shutdown Voltage Input High 1.4 V (min)
VSDIL Shutdown Voltage Input Low 0.4 V (max)
TWU Wake-up Time from Shutdown CBYPASS = 1μF 8 ms
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) 10Ωterminated input.
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External Components Description
(Figure 1)
Components Functional Description
1. CSSupply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for
information concerning proper placement and selection of the supply bypass capacitor.
2. CBBypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
3. RiInverting input resistance which sets the closed-loop gain in conjunction with RF.
4. RFExternal feedback resistance which sets the closed-loop gain in conjunction with Ri.
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20 100 1k 20k
FREQUENCY (Hz)
-120
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
PSRR (dB)
-110
-100
10k
20 100 1k 20k
FREQUENCY (Hz)
-120
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
PSRR (dB)
-110
-100
10k
20 100 1k 10k 20k
0.001
0.01
0.1
1
10
THD+N (%)
FREQUENCY (Hz)
20 100 1k 10k 20k
0.001
0.01
0.1
1
10
THD+N (%)
FREQUENCY (Hz)
0.001
0.01
0.1
1
10
THD+N (%)
OUTPUT POWER (W)
10m 100m 1 2
0.001
0.01
0.1
1
10
THD+N (%)
OUTPUT POWER (W)
10m 100m 1 2
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Typical Performance Characteristics
Data taken with Bandwidth = 80kHz, AV= 1V/V and inputs are AC-coupled except where specified.
THD+N vs Output Power THD+N vs Output Power
VDD = 5V, RL= 8Ω, f = 1kHz VDD = 3V, RL= 8Ω, f = 1kHz
Figure 4. Figure 5.
THD+N vs Frequency THD+N vs Frequency
VDD = 5V, RL= 8Ω, PO= 700mW VDD = 3V, RL= 8Ω, PO= 250mW
Figure 6. Figure 7.
PSRR vs Frequency PSRR vs Frequency
VDD = 5V, RL= 8Ω, Inputs terminated VDD = 3V, RL= 8Ω, Inputs terminated
Figure 8. Figure 9.
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0 100 200 300 400 500
0
50
100
150
200
250
300
POWER DISSIPATION (mW)
OUTPUT POWER (mW)
0 400 800 1200 1400
0
100
200
300
400
500
600
700
POWER DISSIPATION (mW)
OUTPUT POWER (mW)
200 600 1000
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
PSRR (dB)
DC COMMON MODE VOLTAGE (V)
0.5 1 1.5 2 2.5 3
DC COMMON MODE VOLTAGE (V)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
PSRR (dB)
0
20 100 1k 20k
FREQUENCY (Hz)
-100
-80
-70
-60
-50
-40
CMRR (dB)
-90
10k
20 100 1k 20k
FREQUENCY (Hz)
-100
-80
-70
-60
-50
-40
CMRR (dB)
-90
10k
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Typical Performance Characteristics (continued)
Data taken with Bandwidth = 80kHz, AV= 1V/V and inputs are AC-coupled except where specified.
CMRR vs Frequency CMRR vs Frequency
VDD = 5V, RL= 8ΩVDD = 3V, RL= 8Ω
Figure 10. Figure 11.
PSRR vs Common Mode Voltage PSRR vs Common Mode Voltage
VDD = 5V, RL= 8Ω, f = 217Hz VDD = 3V, RL= 8Ω, f = 217Hz
Figure 12. Figure 13.
Power Dissipation vs Output Power Power Dissipation vs Output Power
VDD = 5V, RL= 8ΩVDD = 3V, RL= 8Ω
Figure 14. Figure 15.
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090 180
0
0.1
0.2
0.3
0.4
0.6
0.7
TOTAL POWER DISSIPATION (W)
AMBIENT TEMPRATURE (oC)
120 150
0.5
TM
LLP
Note 11
30 60
0 20 40 60
LOAD RESISTANCE (:)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
OUTPUT POWER (W)
10 30 50 70
3
0
0.4
1.4
1.6
1.8
IDDQ (mA)
SUPPLY VOLTAGE (V)
4.5
1.5 2 1.5 3.5 5
4
0.2
0.6
0.8
1
1.2
5.51
2 2.5 3 3.5 4 4.5 5 5.5 6
SUPPLY VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
OUTPUT POWER (W)
2 2.5 3 3.5 4 4.5 5 5.5 6
SUPPLY VOLTAGE (V)
DROPOUT VOLTAGE (V)
0
0.1
0.2
0.3
0.4
0.5
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Typical Performance Characteristics (continued)
Data taken with Bandwidth = 80kHz, AV= 1V/V and inputs are AC-coupled except where specified.
Output Power vs Supply Voltage
RL= 8Ω, Top-THD+N = 10%; Bot-THD+N = 1% Clipping Voltage vs Supply Voltage
Figure 16. Figure 17.
Output Power vs Load Resistance
Top-VDD = 5V, 10% THD+N, Topmid-VDD = 5V, 1% THD+N
Bot-VDD = 3V, 10% THD+N, Botmid-VDD = 3V, 1% THD+N IDDQ vs Supply Voltage
Figure 18. Figure 19.
Power Derating Curve
fIN = 1kHz, RL= 8Ω
Figure 20.
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APPLICATION INFORMATION
OPTIMIZING RF IMMUNITY
The internal circuitry of the LM4941 suppresses the amount of RF signal that is coupled into the chip. However,
certain external factors, such as output trace length, output trace orientation, distance between the chip and the
antenna, antenna strength, speaker type, and type of RF signal, may affect the RF immunity of the LM4941. In
general, the RF immunity of the LM4941 is application specific. Nevertheless, optimal RF immunity can be
achieved by using short output traces and increasing the distance between the LM4941 and the antenna.
DIFFERENTIAL AMPLIFIER EXPLANATION
The LM4941 is a fully differential audio amplifier that features differential input and output stages. Internally this is
accomplished by two circuits: a differential amplifier and a common mode feedback amplifier that adjusts the
output voltages so that the average value remains VDD / 2. When setting the differential gain, the amplifier can be
considered to have "halves". Each half uses an input and feedback resistor (Riand RF) to set its respective
closed-loop gain (see Figure 1). With Ri1 = Ri2 and RF1 = RF2, the gain is set at -RF/ Rifor each half. This results
in a differential gain of
AVD = -RF/Ri(1)
It is extremely important to match the input resistors to each other, as well as the feedback resistors to each
other for best amplifier performance. See the Proper Selection of External Components section for more
information. A differential amplifier works in a manner where the difference between the two input signals is
amplified. In most applications, input signals will be 180° out of phase with each other. The LM4941 can be used,
however, as a single-ended input amplifier while still retaining its fully differential benefits because it simply
amplifies the difference between the inputs.
All of these applications provide what is known as a "bridged mode" output (bridge-tied-load, BTL). This results in
output signals that are 180° out of phase with respect to each other. Bridged mode operation is different from the
single-ended amplifier configuration that connects the load between the amplifier output and ground. A bridged
amplifier design has distinct advantages over the single-ended configuration: it provides differential drive to the
load, thus doubling maximum possible output swing for a specific supply voltage. Four times the output power is
possible compared with a single-ended amplifier under the same conditions. This increase in attainable output
power assumes that the amplifier is not current limited or clipped. Choose an amplifier's closed-loop gain without
causing excess clipping.
A bridged configuration, such as the one used in the LM4941, also creates a second advantage over single-
ended amplifiers. Since the differential outputs are biased at half-supply, no net DC voltage exists across the
load. This assumes that the input resistor pair and the feedback resistor pair are properly matched (see Proper
Selection of External Components). BTL configuration eliminates the output coupling capacitor required in single-
supply, single-ended amplifier configurations. If an output coupling capacitor is not used in a single-ended output
configuration, the half-supply bias across the load would result in both increased internal IC power dissipation as
well as permanent loudspeaker damage. Further advantages of bridged mode operation specific to fully
differential amplifiers like the LM4941 include increased power supply rejection ratio, common-mode noise
reduction, and click and pop reduction.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a
given supply voltage and driving a specified output load.
PDMAX = (VDD)2/ (2π2RL) Single-Ended (2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase
in internal power dissipation versus a single-ended amplifier operating at the same conditions.
PDMAX = 4 * (VDD)2/ (2π2RL) Bridge Mode (3)
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Since the LM4941 has bridged outputs, the maximum internal power dissipation is four times that of a single-
ended amplifier. Even with this substantial increase in power dissipation, the LM4941 does not require additional
heatsinking under most operating conditions and output loading. From Equation 3, assuming a 5V power supply
and an 8Ωload, the maximum power dissipation point is 625mW. The maximum power dissipation point obtained
from Equation 3 must not be greater than the power dissipation results from Equation 4:
PDMAX = (TJMAX - TA) / θJA (4)
The LM4941's θJA in a DSBGA package is 100°C/W. Depending on the ambient temperature, TA, of the system
surroundings, Equation 4 can be used to find the maximum internal power dissipation supported by the IC
packaging. If the result of Equation 3 is greater than that of Equation 4, then either the supply voltage must be
decreased, the load impedance increased, the ambient temperature reduced, or the θJA reduced with
heatsinking. In many cases, larger traces near the output, VDD, and GND pins can be used to lower the θJA. The
larger areas of copper provide a form of heatsinking allowing higher power dissipation. For the typical application
of a 5V power supply, with an 8Ωload, the maximum ambient temperature possible without violating the
maximum junction temperature is approximately 87.5°C provided that device operation is around the maximum
power dissipation point. Recall that internal power dissipation is a function of output power. If typical operation is
not around the maximum power dissipation point, the LM4941 can operate at higher ambient temperatures.
Refer to the Typical Performance Characteristics curves for power dissipation information.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection ratio (PSRR). The capacitor location on both the bypass and power supply pins should be as close to
the device as possible. Typical applications employ a 5V regulator with 10µF and 0.1µF bypass capacitors that
increase supply stability. This, however, does not eliminate the need for bypassing the supply nodes of the
LM4941. The LM4941 will operate without the bypass capacitor CB, although the PSRR may decrease. A 1µF
capacitor is recommended for CB. This value maximizes PSRR performance. Lesser values may be used, but
PSRR decreases at frequencies below 1kHz. The issue of CBselection is thus dependant upon desired PSRR
and click and pop performance as explained in the section Proper Selection of External Components.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4941 contains shutdown circuitry that is used to
turn off the amplifier's bias circuitry. The device may then be placed into shutdown mode by toggling the SHDN
pin to logic low. It is best to switch between ground and supply for maximum performance. While the device may
be disabled with shutdown voltages in between ground and supply, the idle current may be greater than the
typical value of 0.1µA. In either case, the SHDN pin should be tied to a definite voltage to avoid unwanted state
changes.
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which
provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction
with an external pull-up resistor. This scheme ensures that the shutdown pin will not float, thus preventing
unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical when
optimizing device and system performance. Although the LM4941 is tolerant to a variety of external component
combinations, consideration of component values must be made when maximizing overall system quality.
The LM4941 is unity-gain stable, giving the designer maximum system flexibility. The LM4941 should be used in
low closed-loop gain configurations to minimize THD+N values and maximize signal to noise ratio. Low gain
configurations require large input signals to obtain a given output power. Input signals equal to or greater than
1VRMS are available from sources such as audio codecs. When used in its typical application as a fully differential
power amplifier the LM4941 does not require input coupling capacitors for input sources with DC common-mode
voltages of less than VDD. Exact allowable input common-mode voltage levels are actually a function of VDD, Ri,
and RFand may be determined by Equation 5:
VCMi < (VDD-1.2)(Ri+RF)/RF-VDD/2(Ri/ RF) (5)
-RF/ Ri= AVD (6)
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When using DC coupled inputs, special care must be taken to match the values of the input resistors (Ri1 and
Ri2) to each other. Because of the balanced nature of differential amplifiers, resistor matching differences can
result in net DC currents across the load. This DC current can increase power consumption, internal IC power
dissipation, reduce PSRR, and possibly damaging the loudspeaker. The chart below demonstrates this problem
by showing the effects of differing values between the feedback resistors while assuming that the input resistors
are perfectly matched. The results below apply to the application circuit shown in Figure 1, and assumes that VDD
= 5V, RL= 8Ω, and the system has DC coupled inputs tied to ground.
Tolerance Ri1 Ri2 V01–V02 ILOAD
20% 0.8R 1.2R –0.500V 62.5mA
10% 0.9R 1.1R –0.250V 31.25mA
5% 0.95R 1.05R –0.125V 15.63mA
1% 0.99R 1.01R –0.025V 3.125mA
0% R R 0 0
Since the same variations can have a significant effect on PSRR and CMRR performance, it is highly
recommended that the input resistors be matched to 1% tolerance or better for best performance.
Recommended TM Board Layout
Figure 21. Recommended TM Board Layout: Top Figure 22. Recommended TM Board Layout: Top
Layer Overlay
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Figure 23. Recommended TM Board Layout: Bottom Layer
Recommended WSON Board Layout
Figure 24. Recommended WSON Board Layout: Figure 25. Recommended WSON Board Layout:
Top Layer Top Overlay
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SNAS347C –JUNE 2006–REVISED MAY 2013
Figure 26. Recommended WSON Board Layout: Bottom Layer
LM4941 Reference Design Boards Bill Of Materials
Designator Value Tolerance Part Description Comments
Ri1, Ri2 20kΩ0.10% 1/10W, 0.1% 0805 Resistor
Rf1, Rf2 20kΩ0.10% 1/10W, 0.1% 0805 Resistor
Ci1, Ci2 0Ω1/10W, 0.1% 0805 Resistor
Cb, Cs 1μF 10% 16V Tantalum 1210 Capacitor
In, Out, VDD, J1 0.100” 1x2 header, Vertical mount Input, Output, VDD/GND, Shutdown
Control
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM4941 LM4941SDBD LM4941TMBD
LM4941, LM4941SDBD, LM4941TMBD
SNAS347C –JUNE 2006–REVISED MAY 2013
www.ti.com
REVISION HISTORY
Rev Date Description
1.0 06/28/06 Initial release.
1.1 07/10/06 Added the WSON pkg mktg outline (per
Kashif J.)
1.2 08/04/06 Added the WSON package and marking
diagrams.
1.3 10/12/06 Edited some of the Typical Performance
curves' labels and some text edits.
1.4 10/25/06 Added the WSON boards.
1.5 11/07/06 Text edits.
1.6 11/15/06 Replaced curve 20170381 with 20170382
and input text edits.
1.7 03/09/07 Changed the Limit value from 70 to 80 on the
PSRR in the EC 5V EC table.
C 05/03/13 Changed layout of National Data Sheet to TI
format.
14 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM4941 LM4941SDBD LM4941TMBD
PACKAGE OPTION ADDENDUM
www.ti.com 3-May-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
LM4941SD/NOPB ACTIVE WSON NGS 8 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 4941
LM4941SDX/NOPB ACTIVE WSON NGS 8 4500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 4941
LM4941TM/NOPB ACTIVE DSBGA YFQ 9 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 G
H6
LM4941TMX/NOPB ACTIVE DSBGA YFQ 9 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 G
H6
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 3-May-2013
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM4941SD/NOPB WSON NGS 8 1000 178.0 12.4 3.3 2.8 1.0 8.0 12.0 Q1
LM4941SDX/NOPB WSON NGS 8 4500 330.0 12.4 3.3 2.8 1.0 8.0 12.0 Q1
LM4941TM/NOPB DSBGA YFQ 9 250 178.0 8.4 1.35 1.35 0.76 4.0 8.0 Q1
LM4941TMX/NOPB DSBGA YFQ 9 3000 178.0 8.4 1.35 1.35 0.76 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Oct-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM4941SD/NOPB WSON NGS 8 1000 210.0 185.0 35.0
LM4941SDX/NOPB WSON NGS 8 4500 367.0 367.0 35.0
LM4941TM/NOPB DSBGA YFQ 9 250 210.0 185.0 35.0
LM4941TMX/NOPB DSBGA YFQ 9 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Oct-2013
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
8X 0.3
0.2
1.5 0.1
8X 0.5
0.3
2X
1.5
1.6 0.1
6X 0.5
0.8
0.7
0.05
0.00
B3.1
2.9 A
2.6
2.4
(0.1) TYP
WSON - 0.8 mm max heightNGS0008C
PLASTIC SMALL OUTLINE - NO LEAD
4214924/A 07/2018
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
45
8
PIN 1 ID 0.1 C A B
0.05 C
THERMAL PAD
EXPOSED
9
SYMM
SYMM
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
SCALE 5.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
(1.6)
6X (0.5)
(2.8)
8X (0.25)
8X (0.6)
(1.5)
(R0.05) TYP ( 0.2) VIA
TYP
(0.5)
WSON - 0.8 mm max heightNGS0008C
PLASTIC SMALL OUTLINE - NO LEAD
4214924/A 07/2018
SYMM
1
45
8
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
9
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
SOLDER MASK
OPENING
SOLDER MASK
METAL UNDER
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
8X (0.25)
8X (0.6)
6X (0.5)
(1.38)
(1.47)
(2.8)
(R0.05) TYP
WSON - 0.8 mm max heightNGS0008C
PLASTIC SMALL OUTLINE - NO LEAD
4214924/A 07/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
EXPOSED PAD 9:
82% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:20X
SYMM
1
45
8
SYMM
METAL
TYP
9
MECHANICAL DATA
YFQ0009xxx
www.ti.com
TMD09XXX (Rev A)
E
0.600±0.075
D
A
. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
4215077/A 12/12
D: Max =
E: Max =
1.24 mm, Min =
1.24 mm, Min =
1.18 mm
1.18 mm
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