ees A 1 / BV ()'1 0 Features @ Fast Read Access Time - 70 ns Unregulated Battery Power Supply Range, 2.7 V to 3.6 V Compatible with JEDEC Standard AT27C010 @ Low Power CMOS Operation 20 LA max. Standby 29 mW max. Active at 5 MHz for Vcc = 3.6 V @ Wide Selection of JEDEC Standard Packages 32-Lead 600-mil PDIP and Cerdip 32-Pad PLCC and LCC 32-Lead TSOP @ High Reliability CMOS Technology 2,000 V ESD Protection 200 mA Latchup Immunity @ Rapid Programming - 100 i.s/byte (typical) @ Two-Line Control CMOS and TTL Compatible Inputs and Outputs JEDEC Standard for LVTTL and LVBO @ Integrated Product Identification Code Commercial and Industrial Temperature Ranges Description The AT27BV010 chip is a high performance, low power, low voltage 1,048,576 bit ultraviolet erasable and electrically programmable read only memory (EPROM) organized as 128K by 8 bits. It requires only one supply in the range of 2.7 to 3.6 V in normal read mode operation, making it ideal for fast, portable systems using either regulated or unregulated battery power. Atmels innovative design techniques provide fast speeds that rival 5-V parts while keeping the low power consumption of a 3-V supply. At Vcc = 2.7 V, any byte can be accessed in less than 70 ns. With a typical power draw of only 18 mW at 5 MHz and Vcc = 3 V, the AT27BV010 consumes less than one-fifth the power of a standard 5-V EPROM. Standby mode supply current is typically less than 1 WA at 3 V. The AT27BV010 simplifies system design and stretches battery lifetime even further by eliminating the need for power supply regulation. (continued) Pin Configurations CDIP, PDIP Top View Pin Name Function 2 AQ-A16 Addresses : 00-07 Outputs 5 CE Chip Enable ; OE Output Enable 3 PGM Program Strobe NC No Connect LCC, PLCC Top View Al2 A16 VCC_NC A1SVPP PGM TSOP Top View Type 1 ato OE o7 CE 06 08 o3 08 NI o2 oe 13 45.17, 19 21 1416 18 20 at AO 02 03 05 ag 42 01 GND 04 06 x 1 Megabit 3 (128K x 8) Unregulated Battery-Voltage High Speed UV Erasable CMOS EPROM PreliminaryAlmEt Description (Continued) The AT27BV010 comes in a choice of industry standard JEDEC-approved packages, including: one-time programmable (OTP) plastic PDIP, PLCC, and TSOP, as well as windowed ceramic Cerdip and LCC. All devices feature two-lihe control (CE, OE) to give designers the flexibility to prevent bus contention. The AT27BVO10 operating with Vcc at 3.0 V produces TTL level outputs that are compatible with standard TTL logic de- vices operating at Vcc = 5.0 V. At Vcc = 2.7 V, the part is compatible with JEDEC approved low voltage battery operation (LVBO) interface specifications. Atmels AT27BV010 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typi- cally only 100 us/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27BV0O10 programs exactly the same way as a standard 5-V AT27CO010 and uses the same programming equipment. Erasure Characteristics The entire memory array of the AT27BV010 is erased (all out- puts read as Von) after exposure to ultraviolet light at a wave- length of 2537 A. Complete erasure is assured after a minimum of 20 minutes exposure using 12,000 uWicm? intensity lamps spaced one inch away from the chip. Minimum erase time for lamps at other intensity ratings can be calculated from the min- imum integrated erasure dose of 15 W-sec/cm*. To prevent un- intentional erasure, an opaque label is recommended to cover the clear window on any UV erasable EPROM which will be subjected to continuous fluorescent indoor lighting or sunlight. Operating Modes Block Diagram VCC DATA OUTPUTS GND 00 - 07 _ oe r vee peapeses OE ad OUTPUT : OE, CE AND CE -~*! proaram_Loaic | BUFFERS PGM > /*| YDECODER |? Y-GATING A0-A16 |_| ADDRESS *| CELL MATRIX INPUTS XDECODER | IDENTIFICATION Absolute Maximum Ratings* Temperature Under Bias ............06 -40C to +85C Storage Temperature... -65C to +125C Voltage on Any Pin with Respect to Ground... eee -2.0 V to +7.0 Vi) Voltage on AQ with Respect to Ground 0... eee -2.0V to +14.0 Vi") Vpp Supply Voltage with Respect to Ground... -2.0 V to +14.0 VI) Integrated UV Erase Dose.............. 7258 Wesec/om* *NOTICE: Stresses beyond those listed under "Absolute Maxi- mum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the de- vice at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6 V de which may undershoot to -2.0 V for pulses of less than 20 ns. Maximum output pin voltage is Vcc + 0.75 V de which may be exceeded if certain precau- tions are observed (consult application notes) and which may overshoot to +7.0 V for pulses of less-than 20 ns. Mode \ Pin CE OE PGM Ai Vpp Vcc Outputs Read) ViL Vib x) Ai x Veco Dour Output Disable!) X Vi x X X Voc High Z Standby) VIH X X Xx X Voc ) High Z Rapid Program) Vi ViH Vit Ai Vep Voc) DIN PGM Verity) VIL VIL VIH Ai Vpp Voc 9) DouT PGM Inhibit? Vin x x x Vee Veco ) HighZ ~v, Product Identification) VIL VIL x ALVIN or Vi Xx Vec ) Gentication A1-A16=ViL Notes: 1. X can be Vir or Vin. 2. Read, output disable, and standby modes require Veco $3.7 V. 3. Refer to Programming Characteristics. Programming modes require Vcc 2 4.5 V. 4. VH=12.040.5 V. 5. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to Vu and AO which is toggled low (Vi) to select the Manufacturers Identification byte and high (Vw) to select the Device Code byte. 3-4 AT27BV01 0 memesees f\ | 2 / ES \/()1 0) D.C. and A.C. Operating Conditions for Read Operation AT27BV010 -70 -90 -12 -15 Operating Temperature oom 0 - 70C 0C - 70C 0 - 70C 0C - 70C (Case) -40C - 85C -40C - 85C -40C - 85C -40C - 85C Voc Power Supply 2.7Vto3.6V [ezvesev 2.7Vt0o3.6V 2.7 Vto3.6V D.C. and Operating Characteristics for Read Operation (VCC = 2.7 V to 3.6 V unless otherwise specified) Symbol Parameter Condition Min Max Units tu Input Load Current Vin = 0 V to Vec +1 HA ILo Output Leakage Current Vout = 0 V to Vcc +5 nA tippy @ | Vpp @ Read/Standby Current Vep = Voc 10 HA IsB | Veco Standby Current IsB1 (CMOS), CE = Veo +0.3V 20 BA Isp2 (TTL), CE=2.0 to Vec + 0.5 V 100 pA lec Vcc Active Current athens eu. as so e ViL Input Low Voltage Veo = 8.010 3.6V 06 0.8 Vv Voc = 2.7 to 3.6 V -0.6 0.2xVcc Vv . Veco =3.0 10 3.6 V 2.0 Voct+0.5 vl VIH Input High Voltage Veco =2.7 03.6 V 0.7xVcc Vect0.5 Vv lo. = 2.0 mA 0.4 Vv VoL Output Low Voltage lot = 100 HA 0.2 Vv lot = 20 pA 0.1 Vv lo = -2.0 mA 2.4 Vv VOH Output High Voltage lo = -100 LA Vec-0.2 Vv lon = -20 pA Voc-0.1 Vv Notes: 1. Vcc must be applied simultaneously with or before Vpp, 2. Vpp may be connected directly to Vcc, except during program- and removed simultaneously with or after Vpp. A.C. Characteristics for Read Operation (Vcc = 2.7 V to 3.6 V) ming. The supply current would then be the sum of Icc and Ipp. AT27BV010 -70 -90 -12 -15 Symbol Parameter Condition Min Max; Min Max] Min Max] Min Max] Units tacc |Address to Output Delay CE =OE=Vi 70 90 120 150| ns tce [CE to Output Delay OE = ViL 70 90 120] 150) ns toc @) (OE to Output Delay CE =ViL 50| 50 50 60| ns tor 4 |OE or CE High to Output Float 40 40 40 50) ns ion _Qupeatoitom Aaa, CE or OF 0 fo fo jo [ms Notes: 2,3, 4, 5. - see AC Waveforms for Read Operation. AMMEL 3-5 EeeAIL A.C. Waveforms for Read Operation ADDRESS ADDRESS VALID Notes: 1. Timing measurement references are 0.8 V and 2.0 V. Input AC driving levels are 0.45 V and CE 2.4 V, unless otherwise specified. 2. OE may be delayed up to tce-tor after the fall- ing edge of CE without impact on tce. 3. OE may be delayed up to tacc-tor after the ad- Oc dress is valid without impact on tacc. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is OUTPUT- HIGH 2 OUTPUT | 5 ___ no Jonger driven. VALID Input Test Waveform and Measurement Level Output Test Load 1,3V 2.4V AC 20 ao (1N914) DRIVING MEASUREMENT 3.3K LEVELS og LEVEL OUTPUT 0.45V PIN CL tr, tr< 20 ns (10% to 90%) b Note: Cy = 100 pF including jig capacitance. : . pry (1) Pin Capacitance (f= 1 MHz, T=25'C) Typ Max Units Conditions CIN 4 8 pF Vin=OV CouT 8 12 pF Vout =0V Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Programming Waveforms READ PROGRAM (VERIFY) VIH ADDRESS yy, ADDRESS STABLE tAS _ + tAH DATA vis ee DATA IN VIL VALID |, Ds | | (DH 6.5V vec 5.0V ves | }- tDFP 13.0V VPP 5.0V (VPS VIH CE vi 1. tCES 4 aa VIH . PGM VIL h ww L.| | 1088 3. aS VIH OE vit 3-6 Notes: The Input Timing Reference is 0.8 V for Viz and 2.0 V for Vin. tog and tprp are characteristics of the device but must be accommodated by the programmer. When programming the AT27BV010 a 0.1-nF capacitor is required across Vpp and ground to suppress spurious voltage transients. AT27BV010 cqumemes f\ | 2 / [3 \/()1 0 D.C. Programming Characteristics Ta= 25+ 5C, Voc =6.5+ 0.25 V, Vpp=13.0+ 0.25V Atmels 27BV010 Integrated | Product Identification Code A.C. Programming Characteristics Ta = 25 + 5C, Voc = 6.5 40.25 V, Vep = 13.04+0.25V Test Sym- Conditions* _Limits bol Parameter (see Note 1) Min Max Units tas | Address Setup Time 2 us tces | CE Setup Time 2 us toes OE Setup Time 2 ps ips Data Setup Time 2 us taH Address Hold Time 0 HS tpbH | Data Hold Time 2 us OE High to Out- tpFP put Float Delay (Note 2) 0 130 ns tvps | Vep Setup Time 2 us tvcs | Vcc Setup Time 2 us PGM Program tpw | pulse Width (Note 3) 95 105 us [tog | Data Valid from OF 150 ns *A.C. Conditions of Test: Input Rise and Fall Times (10% to 90%) ......... 20 ns Input Pulse Levels ..............-2.--. 0.45 V to 2.4 V Input Timing Reference Level .......... 0.8 V to 2.0V Output Timing Reference Level ......... 0.8 V to2.0V Notes: 1. Vcc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no jonger driven see timing diagram. 3. Program Pulse width tolerance is 100 sec + 5%. Sym- Test Limits Pins Hex bol Parameter Conditions Min Max Units Codes AQ O7 06 O05 04 03 O02 01 00|Data Iu Input Load Current) Vin=Vi,Vin 10 pA Manufacturer }O O 0 0 1 14 1 +t =O| 1E Vit | Input Low Level (AllInputs) -0.6 0.8 Vv | Device Type 100 0 0 01 0 1j| 0 | Vio} | Input High Level 2.0 Veot V Note: 1. The AT27BVO10 has the same Product Identification Vow | Output Low Vott. lous2.1 mA 45 Vv Code as the AT27C010. Both are programming compatible. Vou | Output High Volt. lon=-400 pA 2.4 Vv loos Veo Supply Curent ; 40. mA Rapid Programming Algorithm | A 100 ts PGM pulse width is used to program. The address is Ipp2 ore Supply CE=PGMEVIL 20 mA set to the first location. Vcc is raised to 6.5 V and Vpp is raised to 13.0 V. Each address is first programmed with one 100 Ls AQ Product PGM pulse without verification. Then a verification / repro- Vio volage 15 125 Vv gramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 Us pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is se- lected until all have been checked. Vpp is then lowered to 5.0 V and Vcc to 5.0 V. All bytes are read again and compared with the original data to determine if the device passes or fails. ADDR = FIRST LOCATION VCC = 6.5V VPP=13.0V PROGRAM ONE 100 uS PULSE INCREMENT ADDRESS INCREMENT ADDRESS AIMEL a7Almet Ordering Information | Ioc (mA) tacc Voc = 3.6 V . . (ns) Ketive | Standby Ordering Code Package Operation Range 70 8 0.02 AT27BV010-70DC 32DW6 Commercial AT27BV010-70JC 32J (0C to 70C) AT27BV010-70LC 32LW AT27BV010-70PC 32P6 AT27BV010-70TC 32T 70 10 0.02 AT27BV010-70DI 32DW6 Industrial AT27BV010-704! 32J (-40C to 85C) AT27BV010-70LI 32LW AT27BV010-70PI 32P6 | AT27BV010-70TI 32T 90 8 0.02 AT27BV010-90DC 32DW6 Commercial AT27BV010-90JC 32J (0C to 70C) AT27BV010-90LC 32LW AT27BV010-90PC 32P6 AT27BV010-90TC 32T | 90 10 0.02 AT27BV010-90DI 32DW6 Industrial AT27BV010-90J! 32J (-40C to 85C) AT27BV010-90LI 32LW AT27BV010-90PI 32P6 AT27BV010-90T| 32T 120 8 0.02 AT27BV010-12DC 32DW6 Commercial AT27BV010-12JC 32J (0C to 70C) AT27BV010-12LC 32LW AT27BV010-12PC 32P6 AT27BV010-12TC 32T 120 10 0.02 AT27BV010-12DI 32DW6 Industrial AT27BV010-12ul 32J (-40C to 85C) AT27BV010-12L1 32LW AT27BV010-12PI 32P6 AT27BV010-12TI 32T 150 8 0.02 AT27BV010-15DC 32DW6 Commercial AT27BV010-15JC 32J (0C to 70C) AT27BV010-15LC 32LW AT27BV010-15PC 32P6 | AT27BV010-15TC 32T 150 10 0.02 AT27BV010-15D! 32DW6 Industrial AT27BV010-15Jl 32J (-40C to 85C) AT27BV010-15LI 32LW AT27BV010-15PI 32P6 AT27BV010-15T| 32T Package Type 32DW6 32 Lead, 0.600 Wide, Windowed, Ceramic Dual Inline Package (Cerdip) 32J 32 Lead, Plastic J-Leaded Chip Carrier OTP (PLCC) 32LW 32 Pad, Windowed, Ceramic Leadless Chip Carrier (LCC) 32P6 32 Lead, 0.600" Wide, Plastic Dual Inline Package OTP (PDIP) 32T 32 Lead, Plastic Thin Small Outline Package OTP (TSOP) 3-8 AT27BV01 0 cums