7-1169
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
CD4511BMS
CMOS BCD-to-7-Segment
Latch Decoder Drivers
Pinout
CD4511BMS
TOP VIEW
Functional Diagram
7-Segment Display
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
B
C
LT
BL
LE/STROBE
D
VSS
A
VDD
g
a
b
c
d
e
f
L
A
T
C
H
D
E
C
O
D
E
R
D
R
I
V
E
R
13
12
11
10
9
15
14
a
b
c
d
e
f
g
7
1
2
6
A
B
C
D
7
SEGMENT
OUTPUTS
BCD
INPUTS
BL 4
LE/STROBE 5
LT 3
VSS = 8
VDD = 16
ab
c
d
g
f
e
Features
• High Voltage Type (20V Rating)
• High Output Sourcing Capability up to 25mA
• Input Latches for BCD Code Storage
• Lamp Test and Blanking Capability
• 7 Segment Outputs Blanked for BCD Input Codes
> 1001
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
Applications
• Driving Common Cathode LED Displays
• Multiplexing with Common Cathode LED Displays
• Driving Incandescent Displays
• Driving Low Voltage Fluorescent Displays
Description
CD4511BMS is a BCD-to-7-Segment latch decoder drivers
constructed with CMOS logic and n-p-n bipolar transistor
output devices on a single monolithic structure. These
devices combine the low quiescent power dissipation and
high noise immunity features of Intersil CMOS with n-p-n
bipolar output transistors capable of sourcing up to 25mA.
This capability allows the CD4511BMS types to drive LED’s
and other displays directly.
Lamp Test (LT), Blanking (BL), and Latch Enable or Strobe
inputs are provided to test the display, shut off or intensity
modulate it, and store or strobe a BCD code, respectively.
Several different signals may be multiplexed and displayed
when external multiplexing circuitry is used.
These devices are similar to the type MC14511.
The CD4511BMS is supplied in these 16-lead outline
packages:
Braze Seal DIP H4W
Frit Seal DIP H2R
Ceramic Flatpack H6W
December 1992
File Number 3339
7-1170
Specifications CD4511BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . . θja θjc
Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K). . . . . .Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-10µA
2 +125oC - 1000 µA
VDD = 18V, VIN = VDD or GND 3 -55oC-10µA
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA
2 +125oC -1000 - nA
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
2 +125oC - 1000 nA
VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1 +25oC 14.1 - V
2 +125oC 14.2 V
3 -55oC 14.0 V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC1-mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 2.6 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 6.8 - mA
Output Drive Voltage LVOH5 VDD = 5V, IOH = -20mA 1 +25oC 3.4 - V
Output Drive Voltage LVOH10 VDD = 10V, IOH = -20mA 1 +25oC 8.6 - V
Output Drive Voltage LVOH15 VDD = 15V, IOH = -20mA 1 +25oC 13.7 - V
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
(Note 2) VIL VDD = 5V, VOH > 3.6V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
Input Voltage High
(Note 2) VIH VDD = 5V, VOH > 3.6V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
Input Voltage Low
(Note 2) VIL VDD = 15V, VOH > 12.6V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC- 4 V
Input Voltage High
(Note 2) VIH VDD = 15V, VOH > 12.6V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC11 - V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD
7-1171
Specifications CD4511BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1, 2) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Propagation Delay
Data to Output TPHL VDD = 5V, VIN = VDD or GND 9 +25oC - 1040 ns
10, 11 +125oC, -55oC - 1404 ns
Propagation Delay
Data to Output TPLH VDD = 5V, VIN = VDD or GND 9 +25oC - 1320 ns
10, 11 +125oC, -55oC - 1782 ns
Transition Time TTHL VDD = 5V, VIN = VDD or GND 9 +25oC - 310 ns
10, 11 +125oC, -55oC - 419 ns
Transition Time TTLH VDD = 5V, VIN = VDD or GND 9 +25oC - 80 ns
10, 11 +125oC, -55oC - 108 ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA
+125oC - 150 µA
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
+125oC - 300 µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
+125oC - 600 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC 4.1 - V
1, 2 +125oC 4.2 - V
1, 2 -55oC 4.0 - V
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC 9.1 - V
1, 2 +125oC 9.2 - V
1, 2 -55oC 9.0 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
-55oC 0.64 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
-55oC 1.6 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
-55oC 4.2 - mA
Input Voltage Low VIL VDD = 10V, VOH > 9V , VOL < 1V 1, 2 +25oC, +125oC,
-55oC-3V
Input Voltage High VIH VDD = 10V, VOH > 9V , VOL < 1V 1, 2 +25oC, +125oC,
-55oC+7 - V
Propagation Delay
Data to Output TPHL VDD = 10V 1, 2, 3 +25oC - 420 ns
VDD = 15V 1, 2, 3 +25oC - 300 ns
7-1172
Specifications CD4511BMS
Propagation Delay
Data to Output TPLH VDD = 10V 1, 2, 3 +25oC - 520 ns
VDD = 15V 1, 2, 3 +25oC - 360 ns
Propagation Delay
(BT) TPHL VDD = 5V 1, 2, 3 +25oC - 700 ns
VDD = 10V 1, 2, 3 +25oC - 350 ns
VDD = 15V 1, 2, 3 +25oC - 250 ns
Propagation Delay
(BT) TPLH VDD = 5V 1, 2, 3 +25oC - 800 ns
VDD = 10V 1, 2, 3 +25oC - 350 ns
VDD = 15V 1, 2, 3 +25oC - 300 ns
Propagation Delay
(LT) TPHL VDD = 5V 1, 2, 3 +25oC - 500 ns
VDD = 10V 1, 2, 3 +25oC - 250 ns
VDD = 15V 1, 2, 3 +25oC - 170 ns
Propagation Delay
(LT) TPLH VDD = 5V 1, 2, 3 +25oC - 300 ns
VDD = 10V 1, 2, 3 +25oC - 150 ns
VDD = 15V 1, 2, 3 +25oC - 100 ns
Transition Time TTHL VDD = 10V 1, 2, 3 +25oC - 185 ns
VDD = 15V 1, 2, 3 +25oC - 160 ns
Transition Time TTLH VDD = 10V 1, 2, 3 +25oC - 60 ns
VDD = 15V 1, 2, 3 +25oC - 50 ns
Minimum Data Setup
Time TS VDD = 5V 1, 2, 3 +25oC - 150 ns
VDD = 10V 1, 2, 3 +25oC - 70 ns
VDD = 15V 1, 2, 3 +25oC - 40 ns
Minimum Data Hold Time TH VDD = 5V 1, 2, 3 +25oC-0ns
VDD = 10V 1, 2, 3 +25oC-0ns
VDD = 15V 1, 2, 3 +25oC-0ns
Minimum Strobe Pulse
Width TW VDD = 5V 1, 2, 3 +25oC - 400 ns
VDD = 10V 1, 2, 3 +25oC - 160 ns
VDD = 15V 1, 2, 3 +25oC - 100 ns
Output Drive Voltage LVOH5 VDD = 5V, IOH = -10mA 1, 2 +25oC 3.9 - V
1, 2 +125oC 3.9 - V
1, 2 -55oC 3.8 - V
VDD = 5V, IOH = -20mA 1, 2 -55oC 3.55 - V
VDD = 5V, IOH = -25mA 1, 2 +25oC 3.1 - V
1, 2 -55oC 3.4 - V
Output Drive Voltage LVOH10 VDD = 10V, IOH = -10mA 1, 2 +25oC 9.0 - V
1, 2 +125oC 9.0 - V
1, 2 -55oC 8.85 - V
VDD = 10V, IOH = -20mA 1, 2 +125oC 8.4 - V
1, 2 -55oC 8.7 - V
VDD = 10V, IOH = -25mA 1, 2 +25oC 8.3 - V
1, 2 -55oC 8.6 - V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS(Continued)
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
7-1173
Specifications CD4511BMS
Output Drive Voltage LVOH15 VDD = 15V, IOH = -10mA 1, 2 +25oC 14.0 - V
1, 2 +125oC 14.0 - V
1, 2 -55oC 13.9 - V
VDD = 15V, IOH = -20mA 1, 2 +125oC 13.5 - V
1, 2 -55oC 13.75 - V
VDD = 15V, IOH = -25mA 1, 2 +25oC 13.5 - V
1, 2 -55oC 13.65 - V
Input Capacitance CIN Any Input 1, 2 +25oC - 7.5 pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC-25µA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V
N Threshold Voltage
Delta ∆VTN VDD = 10V, ISS = -10µA 1, 4 +25oC-±1V
P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V
P Threshold Voltage
Delta ∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC-±1V
Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time TPHL
TPLH VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x
+25oC
Limit
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC
PARAMETER SYMBOL DELTA LIMIT
Supply Current - MSI-2 IDD ± 1.0µA
Output Current (Sink) IOL5 ± 20% x Pre-Test Reading
Output Current (Source) IOH5A ± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883
METHOD GROUP A SUBGROUPS READ AND RECORD
Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS(Continued)
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
7-1174
Specifications CD4511BMS
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Final Test 100% 5004 2, 3, 8A, 8B, 10, 11
Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6 Sample 5005 1, 7, 9
Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS MIL-STD-883
METHOD
TEST READ AND RECORD
PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD
Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION OPEN GROUND VDD 9V ± -0.5V
OSCILLATOR
50kHz 25kHz
Static Burn-In 1
(Note 1) 9-15 1-8 16
Static Burn-In 2
(Note 1) 9-15 8 1-7, 16
Dynamic Burn-
In (Note 1) 9-15 5, 8 3, 4, 16 - 1, 2, 7 6
Irradiation
(Note 2) 9-15 8 1-7, 16
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
TABLE 6. APPLICABLE SUBGROUPS (Continued)
CONFORMANCE GROUP MIL-STD-883
METHOD GROUP A SUBGROUPS READ AND RECORD
7-1175
CD4511BMS
Logic Diagram
FIGURE 1.
TRUTH TABLE
LE BI LTDCBAabcdefgDISPLAY
XX0XXXX1111111
X01XXXX0000000 Blank
01100001111110
01100010110000
01100101101101
01100111111001
01101000110011
01101011011011
IOH
VDD
+
DRIVER
LOGIC
VSS OUTPUT
DRIVERS
VOH-
a
b
c
d
e
f
g
LT
*
(BL)
*
P
N
TG
P
N
TG
A*
P
N
TG
P
N
TG
B*
P
N
TG
P
N
TG
C*
P
N
TG
P
N
TG
D*
*
VDD
VSS
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION NETWORK
LE/STROBE
7-1176
CD4511BMS
01101100011111
01101111110000
01110001111111
01110011110011
01110100000000 Blank
01110110000000 Blank
01111000000000 Blank
01111010000000 Blank
01111100000000 Blank
01111110000000 Blank
111XXXX * *
X = Don’t Care
* Depends on BCD code previously applied when LE = 0
NOTE: Display is blank for all illegal input codes (BCD > 1001).
Typical Performance Characteristics
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS FIGURE 3. TYPICAL DA TA-TO-OUTPUT, LOW-TO-HIGH-LEVEL
PROPAGATION DELAY TIME AS A FUNCTION OF
LOAD CAPACITANCE
TRUTH TABLE (Continued)
LE BI LTDCBAabcdefgDISPLAY
10V
5V
AMBIENT TEMPERATURE (T A) = +25oC
GATE-TO-SOURCE VOLT AGE (VGS) = 15V
0 5 10 15
15
10
5
20
25
30
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
AMBIENT TEMPERATURE (T A) = +25oC
SUPPLY VOLTAGE (VDD) = 5V
10V
15V
700
600
500
400
300
200
100
PROPAGATION DELAY TIME (tPLH) (ns)
0 25 50 75 100
LOAD CAPACITANCE (CL) (pF)
7-1177
CD4511BMS
FIGURE 4. TYPICAL DA TA-TO-OUTPUT, HIGH-TO-LOW-LEVEL
PROPAGATION DELAY TIME AS A FUNCTION OF
LOAD CAPACITANCE
FIGURE 5. TYPICAL LOW-TO-HIGH-LEVEL TRANSITION TIME
AS A FUNCTION OF LOAD CAPACITANCE
FIGURE 6. TYPICAL HIGH-TO-LOW TRANSITION TIME AS A
FUNCTION OF LOAD CAPACITANCE FIGURE 7. TYPICAL VOLTAGE DROP (VDD TO OUTPUT) vs OUT-
PUT SOURCE CURRENT AS A FUNCTION OF SUPPL Y
FIGURE 8. TYPICAL DYNAMIC POWER DISSIPATION CHARACTERISTICS
Typical Performance Characteristics
AMBIENT TEMPERATURE (T A) = +25oC
SUPPLY VOLTAGE (VDD) = 5V
10V
15V
700
600
500
400
300
200
100
PROPAGATION DELAY TIME (tPLH) (ns)
0 25 50 75 100
LOAD CAPACITANCE (CL) (pF) LOAD CAPACITANCE (CL) (pF)
0
10
SUPPLY VOLT AGE (VDD) = 5V
TRANSITION TIME (tTLH) (ns)
20
30
40
50
60
AMBIENT TEMPERATURE (T A) = +25oC
10V
15V
25 50 75 100
AMBIENT TEMPERATURE (T A) = +25oC
LOAD CAPACITANCE (CL) (pF)
0
100
SUPPLY VOLT AGE (VDD) = 5V
TRANSITION TIME (tTHL) (ns)
200
300
400
500
10V
15V
100 200 300 400 500
OUTPUT SOURCE CURRENT (IOH) (mA)
25
20
15
10
5
0 0.5 1 1.5
SUPPLY VOLTAGE - OUTPUT DRIVE VOLTAGE (VDD - VOH) (V)
AMBIENT TEMPERATURE (T A) = +25oC
SUPPLY VOLT AGE (VDD) = 15V 10V 5V
10V
5V
10V
100
DYNAMIC POWER DISSIPATION (PD) (µW)
SUPPLY VOLTS (VDD) = 15V
8
6
4
2
101
AMBIENT TEMPERATURE (TA) = +25oC
8
6
4
2
102
8
6
4
2
103
8
6
4
2
104
8
6
4
2
105
8642
FREQUENCY (f) (kHz)
10-2 10-1 8642 1008642 1018642 1028642 103
CL = 15pF
CL = 50pF
1178
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
CD4511BMS
Applications Interfacing with Various Displays
FIGURE 9. DRIVING COMMON CATHODE 7-SEGMENT LED DISPLAYS (EXAMPLE HEWLET-PACKARD 5082-7740)
FIGURE 10. DRIVING LOW VOLTAGE FLOURESCENT DISPLAYS FIGURE 11. DRIVING INCANDESCENT DISPLAYS (RCA NU-
MITRON DR2000 SERIES DISPLAYS)
ISEG
VDD
+
VSS
VOH
-
Ra
Rb
Rc
Rd
R
e
Rf
R
g
+
VDF
-
VDD
VSS
LATCH
8
DECODER
VDD
LT
LED 7-SEGMENT
DISPLAY
A
B
C
D
LE
BL
TO VDD
BCD
INPUTS
CD4511BMS
DUTY CYCLE = 100%
ISEG = IDIODEAVG. =
R = VOH - VDF
ISEG
20mA AT LUMINOUS INTENSITY/SEGMENT = 250µcd
a
b
c
d
e
f
g
CD4511BMS
A
B
C
D
LE
BL
VDD
VDD
LT
VSS
1.6V
AC OR DC
A MEDIUM BRIGHTNESS INTENSITY DISPLAY CAN BE OBTAINED WITH
LOW VOLT AGE FLUORESCENT DISPLAYS SUCH AS THE TUNG-SOL
DIGIVAC S/G* SERIES
* Trademark Tung-Sol Division Wagner Electric Co.
VSS
2 OF 7 SEGMENTS SHOWN CONNECTED
RESISTORS R FROM VDD TO EACH 7-SEGMENT DRIVER OUTPUT ARE
CHOSEN TO KEEP ALL NUMITRON SEGMENTS SLIGHTLY ON AND WARM
a
b
c
d
e
f
g
VDD = 5V
R≈
400Ω
VDD
R≈ 400Ω
VDD
CD4511BMS
A
B
C
D
LE
BL
VDD
LT
7-1179
CD4511BMS
FIGURE 12. MULTIPLEXING WITH COMMON CATHODE 7-SEGMENT LED DISPLAYS (EXAMPLE HEWLET-PACKARD 5082-7404
4 CHARACTER DISPLAY OR 4 DISCRETE MONOSANTO MAN 3 DISPLAYS)
Waveforms
FIGURE 13. DYNAMIC WAVEFORMS
Chip Dimensions and Pad Layout
Applications Interfacing with Various Displays (Continued)
CD4511BMS
A
B
C
D
LE
BL
VDD
VDD
LT
VSS
+VDF
-
R
R
ISEG
+
-VOH
T1
VSS
2 4
T2
VSS
5
T3
VSS
6
T4
VSS
7
+
VCE
-
VO1
V02
VO3
12 Q0
Q1
Q2
Q3
311
1
VSS
2
1
9
MULTIPLEXING SCHEME SHOWING
TRANSISTORS T1 - T4 (2N3053 OR 2N2102)
DUTY CYCLE = 25%
ISEG = (IDIODEAVG) x 4
R = (VOH - VDF-VCE)
ISEG
CD4555BMS
CD4024BMS
2 OF 7 SEGMENTS CONNECTED
HAVE IC MAX. RA TING > 7 x ISEG
a
b
c
d
e
f
g
90%
50%
10%
90%
50%
10%
VDD
VDD
0
0
DATA
OUTPUT
tr tf
tTLHtTHL
tPLH
tPHL
INPUT
tr, tf = 20ns
20ns
90%
50%
10% tW
20ns
STROBE
90%
50%
10%
20ns VDD
90%
50%
10%
20ns
VDD
0
0
tSU
50%
VDD
DATA
INPUTS
OUTPUT
FOR SETUP
FOR HOLD
LE
tr, tf = 20ns
tHOLD
0
Dimensions in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION: Thickness: 11kÅ−14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
