19-0099; Rev 0; 10/92 MA AAL/VI +3V Voltage Monitoring, Low-Cost, .P Supervisory Circuits General Description The MAX706P/R/S/T and MAX708R/S/T microprocessor (uP) supervisory circuits reduce the complexity and num- ber of components required to monitor +3V power-supply levels in +3V to +5V uP systems. These devices signifi- cantly improve system reliability and accuracy compared to separate ICs or discrete components. The MAX706P/R/S/T supervisory circuits provide the fol- lowing four functions: 1) A reset output during power-up, power-down and brownout conditions. 2) An independent watchdog output that goes low if the watchdog input has not been toggled within 1.6sec. 3) A 1.25V threshold detector for power-fail warning, low-battery detection, or for monitoring a power supply other than the main supply. 4) An active-low manual-reset input. The only difference among the MAX706R, MAX706S, and MAX706T is the reset-threshold voltage levels, which are 2.63V, 2.93V, and 3.08V respectively. All have active-low reset output signals. The MAX706P is identical to the MAX706R, except its reset output signal is active-high. The MAX708R/S/T provide the same functions as the MAX706R/S/T, except they do not have a watchdog timer. Instead, they provide both RESET and RESET outputs. As with the MAX706, devices with R, S, and T suffixes have reset thresholds of 2.63V, 2.93V and 3.08V respectively. All seven devices are packaged in 8-pin SO and DIP. Applications Battery-Powered Equipment Portable instruments Features @ Precision Supply Volta e Monitor 2.63V (MA P/R, MAX708R) 2.93V (MAX706S, MAX708S 3.08V (MAX706T, MAX708 @ 200ms Reset Time Delay @ Debounced TTL-/CMOS-Compatible Manual-Reset Input @ 100A Quiescent Current @ Watchdog Timer (MAX706P/R/S/T only) - 1.6sec Timeout @ Reset Output Signal: Active-High Only Npetheg Active-Low Only A AX706 Active-High and Active-Low (MAX708R/S/T) @ Voltage Monitor for Power-Fail or Low-Battery Warning @ 8-Pin Surface-Mount Package @ Guaranteed RESET Assertion to Vcc = 1V Ordering Information PART TEMP.RANGE PIN-PACKAGE _| MAX706PCPA C to +70C 8 Plastic DIP MAX706PCSA OC. to. + 70C 8SO | MAX706PC/D - C. to +70C Dice MAX706PEPA -40C to +85C 8 Plastic DIP MAX706PESA _-40C to +85C 8S0 MAX706PMJA _-55C to +125C 8 CERDIP Ordering Information continued on last page. " Dice are tested at Ta = +25C only. Contact factory for availability and processing to MIL-STD-883. Pin Configurations L/S/H80ZXUW L/S/8/d90ZXVW Computers Controllers TOP VIEW oS Intelligent Instruments im (7 . Woo Critical uP Power Monitoring a maaan {2 . . . . vec[2| MAX706P [7] RESET Typical Operating Circuits avo [| | wo) UNREGULATED OC Pri [a] 5 | PFO Anan | CONVERTER MAX639 | +3V/433V DIP/SO MAPDASA MAX706R/S/T _ . __. MR [1 | cua [8] #00 Vcc Vee Vcc [2| MAX706R/S/T [7] RESET RESET RESET PFI wOI VOLINE Gnd [ 3 | fe} wo Wo NMI Pri (4 PFO 1 WR eyo PFO INTERRUPT [4] 5 : b PUSHBUTTON DIP/SO = = = Typical Operating Circuits continued on last page. Pin Configurations continued on last page. MAXIAN Maxim integrated Products 5-57 Call toll free 1-800-998-8800 for free samples or literature.MAX706P/R/S/T, MAX708R/S/T +3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits ABSOLUTE MAXIMUM RATINGS Terminal Voltage (with respect to GND) Vcc All Other Inputs (Note 1) . Input Current Voc Continuous Power Dissipation Plastic DIP (derate 9.09mW/"C above +70C) SO (derate 5.88mMW/C above +70C) CERDIP (derate 8. 0OmW/"C above +70C) .. Lees -0.3V to 6.0V . ~0.3V to (Veco + 0.3V) 20mA 20mA 20mA Operating Temperature Ranges: MAX70__C__ MAX70_E__ MAX70__M__ Storage Temperature Range Lead Temperature (soldering. 10 sec) Note 1: The input voltage limits on PFl, WDI, and MR can be exceeded if the input current is less than 10mA. eee OC to +70C .... 740C to +88C -55C to +128C -65C to +160C +300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (MAX70_P/R: Vcc = 2.70V to 5.5V. MAX70_S: Vcc = 3.00V to 5.5V, MAX70_T: Vcc = 3.15V to 5.5V, Ta = TMIN to Tmax, unless otherwise noted.) T PARAMETER | SYMBOL. CONDITIONS MIN. TYP. MAX [UNITS Operating Voltage Vcc MAX70__C 1.0 5.5 Vv Range MAX70__E/M 1.2 55 Voc < 3.6V MAX70_C 100 200 Supply Current isupply L MAX70__E/M 100300 | ya Veo < 5.8V MAX70__C 150 350 MAX70__E/M 150 500 MAX70_P/R 255 263 270 Reset Threshold (Note 2) VRST MAX70_S 285 293 300 | VY MAX70_T 3.00 3.08 3.15 Reset Threshold Hysteresis (Note 2) 20 mv Reset Pulse Width tag -MAX70_PIR: Voc = 3.0V; MAX70_S/T Voc = 3.3V 140 200 280 | . (Note 2) Voc = 5.0V 200 1 Vast (max) < Voc < 3.6V ISOURCE = 500HA 0.8 x Vee __ . Isink = 1.2mA 03 RESET Output Voltage [~ _ 7 (MAX70_R/S/T) OH | apy <vcc <5.5V Isounce = 8O0HA Veo = 15 V ISINK = 3.2mA 0.4 VoL | MAX70__C: Voc = 1.0V, Isink = 5OHA 03 Po | MAX70__EM: Vee = 1.2, Isink = 100HA 0.3 VOH ISOURCE = 215yA Vec - 0.6 ---] Vast (max) < Voc < 3.6V MAXTO Voltage VoL : ( c ISINK = 1.2mA 0.3 V VOH | a sy < Voc <5 8V ISOURCE = 800HA Vee - 15 VoL ISINK = 3.2mA 0.4 5-58 . MAXLAIotherwise noted.) +3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits ELECTRICAL CHARACTERISTICS (continued) (MAX70_P/R: Vcc = 2.70V to 5.5V, MAX70_S: Vcc = 3.00V to 5.5V, MAX70_T: Vcc = 3.15V to 5.5V, Ta = TMIN to Tmax, unless PARAMETER SYMBOL CONDITIONS MIN TYP MAX | UNITS VOH ISOURCE = 500nA 0.8x Vcc Vast (max} < Voc < 3.6V RESET Output Von (max) < Vo IsiNK = 5002A 03] y Voltage (MAX708_) Vv | = BOQuA Vor 15 J YOH ! 45V<Voc < 5.5V SOURCE = cC~ VoL ISINK = 1.2mA Watchdog Timeout ti MAX70_P/R: Voc = 3.0V; 10 Period (MAX706_) WD MAX70_S/T: Vec = 3.3V WDI Pulse Width iwe VIL = 0.4V, Vrst(max) < Vcc < 3.6V (MAX706_.) WP | MH =08xVec 4.5V < Voc < 5.5V 50 VIL. Low Vi Vi .6V WDI Input Thresh- Vin | SSTimm) < Voc <36V i 0.7.x Veo old (MAX706_) V Low Vcc = 5.0V - VI High _ 3.5 WOIt Input Current | _ MAX706_) WODI = OV or Voc -1.0 VOH ISQURCE = 500) O.8xVec WDO Output Volt- VoL Vast (max) < Voc < 36 IsiNK = SO0HA | age (MAX706_) VOH ISOURCE = 800A Vec - 1.5 4.5V < Voc < 5.5V Vou ISinK = 1.2mA MR Pull-Up Current MR = OV Vast (max) < Veg < 3.6V 25 uA 45V < Voc < 5.5V 100 250 600 __! MR Pulse Width twa | Wast(max) < Voc < 36V [500 ns 4.5V < Vcc < 5.5V 150 _ Vit} Vast (max) < Veo < 3.6v LO 06 MR Input Threshold |VIH High 0.7 x Voc Vv |Vi_} 4sv <voo <55V Low 0.8 VIH High 2.0 . MR to Reset Out tuo ,_ Vast (max) < Vec < 3.6V 750 ns Delay (Note 2) 45V < Voc < 5.5V 250 | | PFI input Threshold MAX70_P/R: Voc = 3.0V, MAX70_S/T. Voc = 3.3V, PFI falling 1.20 1.25 1.30 Vv PFI Input Current -25 0.01 25 nA | VOH Vast (max) < Veo < 3.6V ISQURCE = 500pA 0.8 x Voc PFO Output Voltage | Vou ISINK = 1.2mA Po Vv VOH ISOURCE = 800UA Veco - 1.5 p= 4.5V < Voc < 5.5V pS ms Vou ISINK = 3.2mA 04 j Note 2: Applies to both RESET in the MAX70_R/S/T, and RESET in the MAX706P and MAX708R/S/T. MAAXKLAN 5-59 L/S/H80ZXVW L/S/4/d90ZXVINMAX706P/R/S/T, MAX708R/S/T +3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits RESET, RESET OUTPUT VOLTAGES vs. SUPPLY VOLTAGE {RESET OUTPUTS AND RESET THRESHOLDS SHOWN FOR MAX708T, T, = RESET, RESET RESPONSE TIMES we Q BV Vcc 3.2V Vec AID/AL RESET ov RESET ov 32v 2 s RESET RESET ov 500ms/div 2us/div RESET, RESET POWER-FAIL COMPARATOR RISE AND FALL TIMES DEASSERTION RESPONSE TIME (RESET ASSERTED) Vcc FALLS FROM 3.2V TO 2.8V RESET ov Voc | $ 10k 33pF wv RESET RESET ++ | 330pF 500ns/div 206ns/div 5-60 RD oe Vv NIP/AL nN a Vv = AIPIAZ 2.8V AIP/AL Typical Operating Characteristics POWER-FAIL COMPARATOR ASSERTION RESPONSE TIME 14V PFI 3V PFO Ips/div RESET, RESET RISE AND FALL TIMES (RESET DEASSERTED) wv RISES FROM 2.8V 10 3.2V ND/AL RESET 2 = vec] 310k RESET RESET || RESET we ev 10k = = 330pF GND _|=- 330pF AID/AL ov 200ns/div MA AXLAA+3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits Pin Description PIN 1 NAME FUNCTION MAX706P | MAX706R/S/T | MAX708R/S/T Manual-Reset Input. When pulled below 0.6V, MR triggers a reset pulse. It is 75 TTLICMOS compatible when Vcc = 5V and can be shorted to ground with a 1 1 1 MR ; - switch. This active-low input has an internal 70uA pull-up current. Leave floating ar connect to Vcc if not used. 2 2 Vcc j; Supply-Voltage Input 3 3 3 GND | Ground 4 4 4 PF Power-Fail Comparator Input. When PFI is less than 1.25V, PFO goes low; oth- erwise PFO remains high. Connect PFI to GND when not used. 5 5 5 PFO Power-Fail Output. When PFI is less than 1.25V, PFO goes low and sinks cur- rent; otherwise, PFO remains high. Leave unconnected if not used. Watchdog Input. A rising or falling edge must occur at WDI within 1.6sec or 6 6 _ i wol WDO goes low (Figure 4). The internal watchdog timer is reset to zero when reset is asserted or when a transition occurs at WDI. The watchdog function cannot be disabled. > > 6 N.C. | No Connect not internally connected. Active-Low Reset Output. RESET remains low while Vcc is below the reset - 7 7 RESET | threshold or MR is held low. It remains low for 200ms after the reset condi- tions are terminated (Figure 3). Active-High Reset Output. RESET remains high while Vcc is below the reset 7 - 8 RESET | threshold or MR is held low. It remains high for 200ms after the reset condi- tions are terminated (Figure 3). Watchdog Output. WOO goes low when a transition does not occur at WDI within 1.6sec, and remains tow until a transition occurs at WDI (indicating the 8 8 - WDO | watchdog interrupt has been serviced). WDO also goes low when Vcc falls below the reset threshold; however, unlike the reset output signal, WDO goes | high as soon as Vcc exceeds the reset threshold. Detailed Description RESET and RESET Outputs A microprocessor's (uPs) reset input starts it in a known state. When the uP is in an unknown state, it should be held in reset. The MAX706P/R/S/T and MAX708R/S/T assert reset when VCC is low, preventing code execution errors during power-up, power-down or brownout condi- tions. On power-up, once Vcc reaches 1V, RESET is guaran- teed to be a logic low and RESET is guaranteed to be a logic high. As Vcc rises, RESET and RESET remain asserted. Once Vcc_exceds the reset threshold, the internal timer causes RESET and RESET to be deasserted after a time equal to the reset pulse width, which is typically 200ms (Figure 3). If a power-fail or brownout condition occurs (i.e. Vcc drops below the reset thresh- old), RESET and RESET are asserted. As long as Vcc remains below the reset threshold, the internal timer is continually reset, causing the RESET and RESET outputs MAXLAA to remain asserted. Thus, a brownout condition that interrupts a previously initiated reset pulse causes an additional 200ms delay from the time the latest interrup- tion occurred. On power-down, once Vcc drops below the reset threshold, RESET and RESET are guaranteed to be asserted for Vcc 2 1V. The MAX706P provides a RESET signal, the MAX706R/S/T provide a RESET signal, and the MAX708R/S/T provide both RESET and RESET. Watchdog Timer (MAX706P/R/S/T) The MAX706P/R/S/T watchdog circuit monitors the P's activity. lf the uP does not toggle the Watchdog Input (WDI) within 1.6sec, the Watchdog Output (WDO) goes low (Figure 4). If the reset signal is asserted, the watch- dog timer will be reset to zero and disabled. As soon as reset is released, the timer starts counting. WDI can detect pulses as narrow as 100ns with a 2.7V supply and 50ns with a 4.5V supply. L/S/ABOZLXVW L/S/4/d90ZLXVNMAX706P/R/S/T, MAX708R/S/T +3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits 6 WATCHDOG 4 WATCHDOG +>] wol TRANSITION eo - DETECTOR TIMER w00 Veo TIMEBASE FOR op ru RESET AND 4 Mu WATCHDOG _| wa cello | 2 aes RESET Voc =f ___.. SS (RESET) 2eavwaxroepR AAALADKLAA 2 93 MAX706S MAX706P/R/S/T 3 08V MAX706T 4 PFI ' ; ><} PF L AN QO rev 3. GND () ARE FOR MAX706P Vcc 8 700uA [ RESET MR RESET 7 oa GENERATOR RESET Voc 2 MAXIMA aesvmaxroan MAX? OBRIS/T 2.93V MAX708S <= 3.08 MAX708T prt 5 | PFO 125V 3.L GND Figure 1. MAX706P/R/S/T Block Diagram WDO can be connected to the non-maskable interrupt (NMI) input of a uP. When Vcc drops below the reset threshold, WDO immediately goes low, even if the watch- dog timer has not timed out (Figure 3). Normally, this would trigger an NMI, but since reset is asserted simul- taneously, the NMI is overridden. WDO can instead be connected to MR to generate a reset pulse when the watchdog times out. Manual Reset The Manual-Reset (MR) input allows RESET and RESET to be activated by a pushbutton switch. The switch is effectively debounced by the 140ms minimum reset pulse width. MR can be driven by an external logic line since itis TTL/CMOS compatible. The minimum MR input pulse width is 500ns when Vcc = +3V and 150ns when Vec = +5V. Leave MR floating or tie to Vcc when not used. Power-Fail Comparator The power-fail comparator can be used for various pur- poses because its output and noninverting input are not internally connected. The inverting input is internally connected to a 1.25V reference. The power-fail compa- -62 0 - Figure 2. MAX708R/S/T Block Diagram rator has 10mV of hysteresis which prevents repeated triggering of the Power-Fail Output (PFO). To build an early-warning power-failure circuit, use the Power- Fail Comparator Input (PFI) to monitor the unreg- ulated DC supply voltage (see Typical Operating Circuit). Connect the PFI pin to a resistor-divider network such thal the voltage at PFI falls below 1.25V just before the regu- lator drops out. Use PFO to interrupt the uP so it can prepare for an orderly power-down. Regulated and unregulated voltages can be monitored by simply adjusting the PFI resistor-divider network val- ues to the appropriate ratio. In addition, the reset signal can be asserted at voltages other than the Vcc _reset threshold, as shown in Figure 5. Connect PFO to MR to initiate a reset pulse when the 12V supply drops below a user-specified threshold (11V in this example) or when Vcc falls below the reset threshold. Applications Information Operation with +3V and +5V Supplies The MAX706P/R/S/T and MAX708R/S/T provide voltage monitoring at the reset threshold (2.63V to 3.08V) when powered from either +3V or +5V. They are ideal in porta- MAAXIAA+3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits +33V -, SEE vec s1V Vast YRST =~ (RST 4 e WRST reset Nf ov ' : fl LN 43.3V : : , RESET bo ov Jo Lt +3.3V ne maT MR* : w = IMD : : tm 13.3 {yo wo0* *NOTE: MBEXTERNALLY DRIVEN LOW ov WDO TIMING SHOWN FOR MAX706P/8/S/T Figure 3. RESET, RESET, MR and WDO Timing we ~ wo + * wayeagy LE Wo tr 7 two 4 wy TU I Ww ; 43V/43.3V WD0 gy LI u _ +3VH3 3V v RESET EXTERNALLY Ll TRIGGERED BY MR IrsT RESET SET | Figure 4. MAX706P/R/S/T Watchdog Timing ble-instrument applications where power can be sup- plied from either a +3V battery or an AC- DC wail adapter that generates +5V (a +5V supply allows a uP or a microcontroller to run faster than a +3V supply). With a +3V supply, these ICs consume less power, but output drive capability is reduced, the MR-to-RESET delay time increases, and the MR minimum pulse width increases. The Electrical Characteristics table provides specifica- tions for operation with both +3V and +5V supplies. Ensuring a Valid RESET Output Down to Vcc = OV When Vcc falls below 1V, the MAX7O6R/S/T and MAX708R/S/T RESET output no longer sinks current; it becomes an open circuit. High-impedance, CMOS togic inputs can drift to undetermined voltages if left as open circuits. If a pull-down resistor is added to the RESET pin, as shown in Figure 6, any stray charge or leakage currents will flow to ground, holding RESET low. Resistor MAAXLAN +12V +3V/+3.3V RESET Vec (RESET) F- TO uP [- MAAXIAA MAX706P/R/S/T MAX708R/S/T me + PFI PFO _ PARAMETER _ | +12V Reset Threshold at +25C| 10-24 (} ARE FOR MAX706P 10.87 | Figure 5. Monitoring Both +3V/+3.3V and +12V MAXIAA MAX706R/S/T MAX708R/S/T RESET To L Figure 6. RESET Valid to Ground Circuit value R1 is not critical, but it should not load RESET and should be small enough to pull RESET and the input it is driving to ground. 100kQ is suggested for R1. Adding Hysteresis to the Power-Fail Comparator Hysteresis adds a noise margin to the power-fail compa- rator and prevents repeated triggering of PFO when VIN ig near the power-fail comparator trip point. Figure 7 shows how to add hysteresis to the power-fail compara- tor. Select the ratio of R1 and R2 such that PF! sees 1.25V when VIN falls to the desired trip point (VTRIP). Resistor R3 adds hysteresis. R3 will typically be an order of 5-63 L/S/H80ZXVW L/S/4/d90ZX VINMAX706P/R/S/T, MAX708R/S/T +3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits magnitude greater than R1 or R2. The current through R1 and R2 should be at least 1pA to ensure that the 25nA max PFI input current does not shift the trip point signifi- cantly. R3 should be larger than 10kQ to prevent it from loading down the PFO pin. Capacitor C1 adds noise rejection. Monitoring a Negative Voltage The power-fail comparator can be used to monitor a negative supply voltage using the circuit of Figure 8. When the negative supply is valid, PFO is low. When the negative supply voltage droops, PFO goes high. This circuit's accuracy is affected by the PFI threshold toler- ance, the Vcc voltage, and resistors R1 and R2. 5-64 wn 43V/43.3V Rt Voc PFI ha cr] AMAAXIAN 1 MAX7OBP/R/S/T RS = MAX708R/S/T PFO GNO = = * OPTIONAL TOpP savigav-t PFO ov ov Vi Vrrip VH RI + R2 Vin Virip = 1.25 (ne) v= 1.25 (1 (ior Wet wen ia) Figure 7. Adding Hysteresis to the Power-Fail Comparator +3V/43.3V Vcc PFI PFO - MAAXILAA MAX706P/R/S/T MAX708R/S/T GND = +3V/43.3V PFO ov } ViRip ov \- Voc - 1.25 _ 1.25 -Virip Ri ~ R2 NOTE: Virie IS NEGATIVE Figure 8. Monitoring a Negative Voltage MAAXIM+3V Voitage Monitoring, Low-Cost, uP Supervisory Circuits Tabie 1. Maxim uP Supervisory Products Nominal Mosel Watchdo Backu CE M | Low- | Acti Batt- Part Reset | puise | Timeout| Battery | Write | Power-Fail | poser | Watchdog [ing High | On Number | Threshold | width Period | Switch | Protect Comparator Input Output Output | Reset | Output (ms) (sec) | MAX690A 465 140 1.6 yes no yes no no no no no MAX691A 465 140/ad i 1.6/adj. yes yes yes no yes yes yes yes MAX692A 4.40 140 1.6 yes no yes j no no | no no no MAX693A 4.40 140/adj. 1.6/adj. yes yes yes no yes yes yes yes MAX696 adj. 35/adj. 1.6/ad). | yes no yes no yes yes yes yes MAX697 adj. 35/adj. 1.6/adj. no yes yes no yes {_yes yes no MAX700 4.65/adj. 200 NA no no no yes no no yes no MAX703 4.65 140 NA yes no yes yes no no no | no MAX704 4.40 140 NA j__ yes no yes yes no no no no MAX705 465 140 16 no no yes yes yes no no no Mare Paaaee 140 16 no no yes yes yes no no no MAX706P 2.63 140 1.6 no; no yes yes yes no yes no | MAX707 4.65 140 | NA no no yes yes no no yes no Mean 08 pana es 140 NA no no yes | yes no MAX7911 4.65 140 1 yes yes u yes yes yes MAX1232 | 4.50/4.75 | 250 O-18/0.60/) no no yes no MAX1259 NA | NA NA yes no yes no no PAAXLAN 5-65 L/S/480ZXVW L/S/d/d90ZXVINMAX706P/R/S/T, MAX708R/S/T +3V Voltage Monitoring, Low-Cost, uP Supervisory Circuits __. Ordering Information (continued) Typical Operating PART TEMP. RANGE PIN-PACKAGE Circuits (continued) MAX706RCPA 0C. to +70C 8 Plastic DIP UNREGULATED Dc MAX706RCSA OC. to + 70C 8s0 pce MAX706RC/D 0C to +70C Dice* WAX oye MAX706REPA -40C to +85C 8 Plastic DIP MAX706RESA _-40C to +85C 8SO MAX706RMJA -58C to +125C 8 CERDIP vec __ vec - - RESET RESET MAX706SCPA C. to +70C 8 Plastic DIP mr nese ie MAX706SCSA OC. to + 70C 8SO - - WA PFO |-*1 INTERRUPT MAX706SC/D 0C to +70C Dice | GND : MAX706SEPA _ -40C to +85C 8 Plastic DIP J DUSHBUTTON| an avaan MAX706SESA _-40C to +85C 8SO = ESN 2 MaxrOsnysiT MAX706SMJA 55C to +125C 8 CERDIP MAX706TCPA 0C. to + 70C 8 Plastic DIP MAX706TCSA __O'C to +70C 8SO ___ Pin Configurations (continued) MAX706TC/D OC to +70C Dice* MAX706TEPA -40C to +85'C 8 Plastic DIP =o _MAX7O6TESA __-40C to +85C aso WATT a senan fo! RESET ! MAX706TMJA -55C to +125C 8 CERDIP* Voc [2] MAX708R/S/T [7] RESET MAX708RCPA C. to + 70C 8 Plastic DIP GNO [3] re] NC MAX708RCSA OC to +70C 8SO PF [| a PFO MAX708RC/D OC to +70C Dice* MAX708REPA -40C to +85C 8 Plastic DIP DIP/SO ; MAX708RESA _-40C to +85C 8SO MAX708RMJA 55C to +125C 8 CERDIP* MAX708SCPA 0C. to + 70C 8 Plastic DIP MAX708SCSA OC to +70C 8SO MAX708SC/O OC to +70C Dice* MAX708SEPA -40C to +85C 6 Plastic DIP MAX708SESA __-40C to +85C 8SO MAX708SMJA -55C to + 125C 8 CERDIP** MAX708TCPA 0C. to + 70C 8 Plastic DIP MAX708TCSA 0C to +70C 8S0 MAX708TC/D OC to +70C Dice* MAX7O8TEPA -40C to +85C 8 Plastic DIP MAX708TESA -40C to +85C 8SO | MAX708TMJA 55C to +125C 8 CERDIP** * Dice are specified at Ta = +25C **Conitact factory for availability and processing to MIL-STD-883. 5-66 MAXIAN