MC74LVX245DTR2G - ON Semiconductor L.L.C.

May, 2011 − Rev. 4

1Publication Order Number:

MC74LVX245/D

MC74LVX245

Octal Bus Transceiver

With 5 V−Tolerant Inputs

The MC74LVX245 is an advanced high speed CMOS octal bus

transceiver.

It is intended for two−way asynchronous communication between

data buses. The direction of data transmission is determined by the

level of the T/R input. The output enable pin (OE) can be used to

disable the device, so that the buses are effectively isolated.

All inputs are equipped with protection circuits against static

discharge.

Features

•High Speed: tPD = 4.7 ns (Typ) at VCC = 3.3 V

•Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C

•Power Down Protection Provided on Inputs

•Balanced Propagation Delays

•Low Noise: VOLP = 0.8 V (Max)

•Pin and Function Compatible with Other Standard Logic Families

•Latchup Performance Exceeds 300 mA

•ESD Performance: Human Body Model > 2000 V;

Machine Model > 200 V

•These Devices are Pb−Free and are RoHS Compliant

Application Notes

•Do not force a signal on an I/O pin when it is an active output,

damage may occur

•All floating (high impedance) input or I/O pins must be fixed by

means of pullup or pulldown resistors or bus terminator ICs

•A parasitic diode is formed between the bus and VCC terminals.

Therefore, the LVX245 cannot be used to interface 5.0 V to 3.0 V

systems directly

Figure 1. 20−Lead Pinout (Top View)

1920 18 17 16 15 14

21 34567

VCC

OE B0 B1 B2 B3 B4 B5 B6 B7

T/R A0 A1 A2 A3 A4 A5 A6 A7 GND

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See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

MARKING

DIAGRAMS

SOIC−20

DW SUFFIX

CASE 751D

LVX245

AWLYYWWG

TSSOP−20

DT SUFFIX

CASE 948E

SOEIAJ−20

M SUFFIX

CASE 967

LVX245

AWLYWWG

LVX245 = Specific Device Code

A = Assembly Location

WL, L = Wafer Lot

Y = Year

WW, W = Work Week

G or G= Pb−Free Package

(Note: Microdot may be in either location)

LVX

245

ALYWG

MC74LVX245

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OE 19

T/R 1

Figure 2. Logic Diagram

Table 1. PIN NAMES

Pins Function

T/R

A0−A7

Bo−B7

Output Enable Input

Transmit/Receive Input

Side A 3−State Inputs or 3−State Outputs

Side B 3−State Inputs or 3−State Outputs

INPUTS OPERATING MODE

Non−Inverting

OE T/R

L L B Data to A Bus

L H A Data to B Bus

H X Z

H = High Voltage Level; L = Low Voltage Level; Z = High

Impedance State; X = High or Low Voltage Level and Transitions

are Acceptable; For ICC reasons, Do Not Float Inputs

ORDERING INFORMATION

Device Package Shipping†

MC74LVX245DWR2G SOIC−20

(Pb−Free)

1000 / Tape & Reel

MC74LVX245DTR2G TSSOP−20* 2500 / Tape & Reel

MC74LVX245MG SOEIAJ−20

(Pb−Free)

50 Units / Rail

MC74LVX245MELG SOEIAJ−20

(Pb−Free)

2000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

MC74LVX245

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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MAXIMUM RATINGS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎÎ

Value

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage

ÎÎÎÎÎÎÎ

–0.5 to +7.0

ÎÎÎ

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Input Voltage (T/R, OE)

ÎÎÎÎÎÎÎ

–0.5 to +7.0

ÎÎÎ

ÎÎÎÎ

VI/O

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Voltage

ÎÎÎÎÎÎÎ

–0.5 to VCC +0.5

ÎÎÎ

ÎÎÎÎ

IIK

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Diode Current

ÎÎÎÎÎÎÎ

−20

ÎÎÎ

ÎÎÎÎ

IOK

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Diode Current

ÎÎÎÎÎÎÎ

±20

ÎÎÎ

ÎÎÎÎ

Iout

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Current, per Pin

ÎÎÎÎÎÎÎ

±25

ÎÎÎ

ÎÎÎÎ

ICC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Current, VCC and GND Pins

ÎÎÎÎÎÎÎ

±75

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation

ÎÎÎÎÎÎÎ

180

ÎÎÎ

ÎÎÎÎ

Tstg

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Storage Temperature

ÎÎÎÎÎÎÎ

–65 to +150

ÎÎÎ

°C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit

values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,

damage may occur and reliability may be affected.

RECOMMENDED OPERATING CONDITIONS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage

ÎÎÎÎ

2.0

ÎÎÎÎ

3.6

ÎÎÎ

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Input Voltage (T/R, OE)

ÎÎÎÎ

5.5

ÎÎÎ

ÎÎÎÎ

VI/O

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Voltage

ÎÎÎÎ

VCC

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Operating Temperature, All Package Types

ÎÎÎÎ

−40

ÎÎÎÎ

+85

ÎÎÎ

°C

ÎÎÎÎ

Dt/DV

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Rise and Fall Time

ÎÎÎÎ

100

ÎÎÎ

ns/V

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC ELECTRICAL CHARACTERISTICS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎÎ

Test Conditions

ÎÎÎ

VCC

ÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎ

TA = − 40 to 85°C

ÎÎÎ

Unit

ÎÎÎ

Min

ÎÎ

Typ

ÎÎÎ

Max

ÎÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎÎ

VIH

ÎÎÎÎÎÎÎÎÎÎ

High−Level Input Voltage

ÎÎÎÎÎÎÎ

ÎÎÎ

2.0

3.0

3.6

ÎÎÎ

1.5

2.0

2.4

ÎÎ

ÎÎÎ

ÎÎÎÎ

1.5

2.0

2.4

ÎÎÎ

ÎÎÎÎ

VIL

ÎÎÎÎÎÎÎÎÎÎ

Low−Level Input Voltage

ÎÎÎÎÎÎÎ

ÎÎÎ

2.0

3.0

3.6

ÎÎÎ

ÎÎ

ÎÎÎ

0.5

0.8

ÎÎÎÎ

ÎÎÎ

0.5

0.8

ÎÎÎ

ÎÎÎÎ

VOH

ÎÎÎÎÎÎÎÎÎÎ

High−Level Output Voltage

(Vin = VIH or VIL)

ÎÎÎÎÎÎÎ

IOH = −50 mA

IOH = −4 mA

ÎÎÎ

2.0

3.0

ÎÎÎ

1.9

2.9

2.58

ÎÎ

2.0

3.0

ÎÎÎ

ÎÎÎÎ

1.9

2.9

2.48

ÎÎÎ

ÎÎÎÎ

VOL

ÎÎÎÎÎÎÎÎÎÎ

Low−Level Output Voltage

(Vin = VIH or VIL)

ÎÎÎÎÎÎÎ

IOL = 50 mA

IOL = 4 mA

ÎÎÎ

2.0

3.0

ÎÎÎ

ÎÎ

0.0

ÎÎÎ

0.1

0.36

ÎÎÎÎ

ÎÎÎ

0.1

0.44

ÎÎÎ

ÎÎÎÎ

Iin

ÎÎÎÎÎÎÎÎÎÎ

Input Leakage Current

ÎÎÎÎÎÎÎ

Vin = 5.5 V or GND

(T/R, OE)

ÎÎÎ

3.6

ÎÎÎ

ÎÎ

ÎÎÎ

±0.1

ÎÎÎÎ

ÎÎÎ

±1.0

ÎÎÎ

ÎÎÎÎ

IOZ

ÎÎÎÎÎÎÎÎÎÎ

Maximum 3−State Leakage Current

ÎÎÎÎÎÎÎ

Vin = VIL or VIH

Vout = VCC or GND

ÎÎÎ

3.6

ÎÎÎ

ÎÎ

ÎÎÎ

±0.2

ÎÎÎÎ

ÎÎÎ

±2.5

ÎÎÎ

ÎÎÎÎ

ICC

ÎÎÎÎÎÎÎÎÎÎ

Quiescent Supply Current

ÎÎÎÎÎÎÎ

Vin = VCC or GND

ÎÎÎ

3.6

ÎÎÎ

ÎÎ

ÎÎÎ

4.0

ÎÎÎÎ

ÎÎÎ

40.0

ÎÎÎ

MC74LVX245

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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎÎÎÎÎ

Test Conditions

ÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎ

TA = − 40 to 85°C

ÎÎÎ

Unit

ÎÎÎ

Min

ÎÎ

Typ

ÎÎÎ

Max

ÎÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎÎ

tPLH,

tPHL

ÎÎÎÎÎÎÎÎÎ

Propagation Delay

Input to Output

ÎÎÎÎÎÎÎÎÎÎ

VCC = 2.7 V CL = 15 pF

CL = 50 pF

ÎÎÎ

ÎÎ

6.1

8.6

ÎÎÎ

10.7

14.2

ÎÎÎÎ

1.0

ÎÎÎ

13.5

17.0

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

VCC = 3.3 ± 0.3 V CL = 15 pF

CL = 50 pF

ÎÎÎ

ÎÎ

4.7

7.2

ÎÎÎ

6.6

10.1

ÎÎÎÎ

1.0

ÎÎÎ

8.0

11.5

ÎÎÎÎ

tPZL,

tPZH

ÎÎÎÎÎÎÎÎÎ

Output Enable Time to

High and Low Level

ÎÎÎÎÎÎÎÎÎÎ

VCC = 2.7 V CL = 15 pF

RL = 1 kWCL = 50 pF

ÎÎÎ

ÎÎ

9.0

11.5

ÎÎÎ

16.9

20.4

ÎÎÎÎ

1.0

ÎÎÎ

20.5

24.0

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

VCC = 3.3 ± 0.3 V CL = 15 pF

RL = 1 kWCL = 50 pF

ÎÎÎ

ÎÎ

7.1

9.6

ÎÎÎ

11.0

14.5

ÎÎÎÎ

1.0

ÎÎÎ

13.0

16.5

ÎÎÎÎ

tPLZ,

tPHZ

ÎÎÎÎÎÎÎÎÎ

Output Disable Time From

High and Low Level

ÎÎÎÎÎÎÎÎÎÎ

VCC = 2.7 V CL = 50 pF

RL = 1 kW

ÎÎÎ

ÎÎ

11.5

ÎÎÎ

18.0

ÎÎÎÎ

1.0

ÎÎÎ

21.0

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

VCC = 3.3 ± 0.3 V CL = 50 pF

RL = 1 kW

ÎÎÎ

ÎÎ

9.6

ÎÎÎ

12.8

ÎÎÎÎ

1.0

ÎÎÎ

14.5

ÎÎÎÎ

tOSHL

tOSLH

ÎÎÎÎÎÎÎÎÎ

Output−to−Output Skew

(Note 1)

ÎÎÎÎÎÎÎÎÎÎ

VCC = 2.7 V CL = 50 pF

VCC = 3.3 ±0.3 V CL = 50 pF

ÎÎÎ

ÎÎ

ÎÎÎ

1.5

ÎÎÎÎ

ÎÎÎ

1.5

ÎÎÎ

1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.

The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter

guaranteed by design.

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

CAPACITIVE CHARACTERISTICS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎ

TA = − 40 to 85°C

ÎÎÎ

Unit

ÎÎÎ

Min

ÎÎ

Typ

ÎÎÎ

Max

ÎÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎÎ

Cin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Capacitance (T/R, OE)

ÎÎÎ

ÎÎ

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

CI/O

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Maximum 3−State I/O Capacitance

ÎÎÎ

ÎÎ

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

CPD

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation Capacitance (Note 2)

ÎÎÎ

ÎÎ

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC / 8 (per bit). CPD is used to determine the no−load

dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.

NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package)

Symbol Characteristic

TA = 25°C

Unit

Typ Max

VOLP Quiet Output Maximum Dynamic VOL 0.5 0.8 V

VOLV Quiet Output Minimum Dynamic VOL −0.5 −0.8 V

VIHD Minimum High Level Dynamic Input Voltage 2.0 V

VILD Maximum Low Level Dynamic Input Voltage 0.8 V

MC74LVX245

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Figure 3. Figure 4.

VCC

GND

Input

A or B

Output

B or A

50%

50% VCC

tPLH tPHL

SWITCHING WAVEFORMS

A or B

50% VCC

tPZL tPLZ

tPZH tPHZ

VCC

GND

HIGH

IMPEDANCE

VOL +0.3V

VOH -0.3V

HIGH

IMPEDANCE

VCC

GND

50%

T/R

50% VCC

*Includes all probe and jig capacitance

CL*

TEST POINT

DEVICE

UNDER

TEST

OUTPUT

*Includes all probe and jig capacitance

CL*

TEST POINT

DEVICE

UNDER

TEST

OUTPUT

CONNECT TO VCC WHEN

TESTING tPLZ AND tPZL.

CONNECT TO GND WHEN

TESTING tPHZ AND tPZH.

1 kW

TEST CIRCUITS

Figure 5. Propagation Delay Test Circuit Figure 6. 3−State Test Circuit

MC74LVX245

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PACKAGE DIMENSIONS

SOIC−20

CASE 751D−05

ISSUE G

B20X

H10X

18X A1

SEATING

PLANE

hX 45_

0.25 M

0.25 S

DIM MIN MAX

MILLIMETERS

A2.35 2.65

A1 0.10 0.25

B0.35 0.49

C0.23 0.32

D12.65 12.95

E7.40 7.60

e1.27 BSC

H10.05 10.55

h0.25 0.75

L0.50 0.90

q0 7

NOTES:

1. DIMENSIONS ARE IN MILLIMETERS.

2. INTERPRET DIMENSIONS AND TOLERANCES

PER ASME Y14.5M, 1994.

3. DIMENSIONS D AND E DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION

SHALL BE 0.13 TOTAL IN EXCESS OF B

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

SOEIAJ−20

CASE 967−01

ISSUE A

DIM MIN MAX MIN MAX

INCHES

--- 2.05 --- 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.15 0.25 0.006 0.010

12.35 12.80 0.486 0.504

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059

0.70 0.90 0.028 0.035

--- 0.81 --- 0.032

_10 _0

_10 _

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE

MOLD FLASH OR PROTRUSIONS AND ARE

MEASURED AT THE PARTING LINE. MOLD FLASH

OR PROTRUSIONS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

110

0.13 (0.005)

0.10 (0.004)

VIEW P

DETAIL P

MC74LVX245

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PACKAGE DIMENSIONS

TSSOP−20

CASE 948E−02

ISSUE C

DIM

MIN MAX MIN MAX

INCHES

6.60 0.260

MILLIMETERS

B4.30 4.50 0.169 0.177

C1.20 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.27 0.37 0.011 0.015

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

____

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION:

MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE

MOLD FLASH, PROTRUSIONS OR GATE

BURRS. MOLD FLASH OR GATE BURRS

SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION

SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08

(0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

ÍÍÍÍ

110

1120

PIN 1

IDENT

−T−

0.100 (0.004)

DGH

SECTION N−N

JJ1

−W−

SEATING

PLANE

−V−

−U−

0.10 (0.004) V S

20X REFK

L/2

U0.15 (0.006) T

DETAIL E

0.25 (0.010)

DETAIL E 6.40 0.252

--- ---

U0.15 (0.006) T

7.06

16X

0.36 16X

1.26

0.65

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT

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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

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MC74LVX245/D

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