19-0243; Rev 1; 9/94 3.0V/3.3V Microprocessor Supervisory Circuits ow ind tW se Re ail r-F r we to Po ara mp ail Co r-F we acy Po ccur A ery ld att h ho res p-B itc u Sw Th ck t Ba se Re t al Inpu ut nu Ma t t se np Re se Re MAX704 MAX802 MAX804 MAX805 MAX806 gI do tch igh ow e-L e-H tiv tiv Wa Ac Ac Part MAX690 4% 75mV 75mV 4% 2% 2% 2% 2% 4% 75mV 2% 2% ________________________Applications Battery-Powered Computers and Controllers Embedded Controllers Intelligent Instruments Automotive Systems Critical P Power Monitoring Portable Equipment __________________Pin Configuration ____________________________Features ---------- RESET and RESET Outputs Manual Reset Input Precision Supply-Voltage Monitor 200ms Reset Time Delay Watchdog Timer (1.6sec timeout) Battery-Backup Power Switching-- Battery Can Exceed VCC in Normal Operation 40A VCC Supply Current 1A Battery Supply Current Voltage Monitor for Power-Fail or Low-Battery Warning ---------- Guaranteed RESET Assertion to VCC = 1V 8-Pin DIP and SO Packages ______________Ordering Information PART** TEMP. RANGE PIN-PACKAGE MAX690_CPA 0C to +70C 8 Plastic DIP MAX690_CSA MAX690_C/D MAX690_EPA 0C to +70C 0C to +70C -40C to +85C 8 SO Dice* 8 Plastic DIP MAX690_ESA MAX690_MJA -40C to +85C -55C to +125C 8 SO 8 CERDIP Ordering Information continued on last page. * Contact factory for dice specifications. ** These parts offer a choice of reset threshold voltage. Select the letter corresponding to the desired nominal reset threshold voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into the blank to complete the part number. _________Typical Operating Circuits REGULATED +3.3V OR +3.0V VCC UNREGULATED DC 0.1F VCC RESET (RESET) R1 PFO PFI MAX690T/S/R WDI TOP VIEW VOUT 1 VCC 2 GND 3 PFI 4 MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R DIP/SO ( ) ARE FOR MAX804T/S/R, MAX805T/S/R < > ARE FOR MAX704T/S/R, MAX806T/S/R 8 VBATT 7 RESET (RESET) 6 WDI <MR> 5 R2 3.6V LITHIUM BATTERY MAX802T/S/R MAX804T/S/R MAX805T/S/R P RESET NMI I/O LINE GND BUS VOUT VBATT GND 0.1F PFO 0.1F VCC CMOS RAM GND ( ) ARE FOR MAX804T/S/R, MAX805T/S/R See last page for MAX704T/S/R, MAX806T/S/R. ________________________________________________________________ Maxim Integrated Products Call toll free 1-800-998-8800 for free samples or literature. 1 MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R _______________General Description These microprocessor (P) supervisory circuits reduce the complexity and number of components required for power-supply monitoring and battery-control functions in P systems. They significantly improve system reliability and accuracy compared to separate ICs or discrete components. These devices are designed for use in systems powered by 3.0V or 3.3V supplies. See the selector guide in the back of this data sheet for similar devices designed for 5V systems. The suffixes denote different reset threshold voltages: 3.075V (T), 2.925V (S), and 2.625V (R) (see Reset Threshold section in the Detailed Description). All these parts are available in 8-pin DIP and SO packages. Functions offered in this series are as follows: MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits ABSOLUTE MAXIMUM RATINGS Terminal Voltage (with respect to GND) VCC.........................................................................-0.3V to 6.0V VBATT ....................................................................-0.3V to 6.0V All Other Inputs ...................-0.3V to the higher of VCC or VBATT Continuous Input Current VCC ..................................................................................100mA VBATT ...............................................................................18mA GND ..................................................................................18mA Output Current ---------- ------ R E S E T , P F O ....................................................................18mA VOUT ................................................................................100mA Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 9.09mW/C above +70C) ..............727mW SO (derate 5.88mW/C above +70C) ...........................471mW CERDIP (derate 8.00mW/C above +70C) ...................640mW Operating Temperature Ranges MAX690_C_ _/MAX704_C_ _/MAX80_ _C_ _ ........0C to +70C MAX690_E_ _/MAX704_E_ _/MAX80_ _E_ _. .....-40C to +85C MAX690_M_ _/MAX704_M_ _/MAX80_ _M_ _...-55C to +125C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10sec) .............................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to 5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SYMBOL Operating Voltage Range, VCC, VBATT (Note 1) VCC Supply Current (excluding IOUT) VCC Supply Current in BatteryBackup Mode (excluding IOUT) ISUPPLY CONDITIONS MIN TYP MAX MAX690_C, MAX704_C, MAX80_ _C 1.0 5.5 MAX690_E/M, MAX704_E/M, MAX80_ _E/M 1.1 5.5 ---- M R = VCC (MAX704_/ MAX806_) ---- M R = VCC (MAX704_/ MAX806_) MAX690_C/E, MAX704_C/E, MAX80_ _C/E, VCC < 3.6V 40 50 MAX690_C/E, MAX704_C/E, MAX80_ _C/E, VCC < 5.5V 50 65 MAX690_M, MAX704_M, MAX80_ _M, VCC < 3.6V 40 55 MAX690_M, MAX704_M, MAX80_ _M, VCC < 5.5V 50 70 VCC = 2.0V, VBATT = 2.3V 25 50 MAX690_C/E, MAX704_C/E, MAX80_ _C/E 0.4 1 MAX690_M, MAX704_M, MAX80_ _M 0.4 10 Battery Leakage Current (Note 3) MAX690_C/E, MAX704_C/E, MAX80_ _C/E 0.01 0.5 MAX690_M, MAX704_M, MAX80_ _M 0.01 5 2 V A VBATT Supply Current, Any Mode (excluding IOUT) (Note 2) VOUT Output Voltage UNITS MAX690_C/E, MAX704_C/E, MAX80_ _C/E, IOUT = 5mA (Note 4) VCC 0.03 VCC 0.015 MAX690_C/E, MAX704_C/E, MAX80_ _C/E IOUT = 50mA VCC 0.3 VCC 0.15 MAX690_M, MAX704_M, MAX80_ _M IOUT = 5mA (Note 4) VCC 0.035 VCC 0.015 MAX690_M, MAX704_M, MAX80_ _M IOUT = 50mA VCC 0.35 VCC 0.15 IOUT = 250A, VCC > 2.5V (Note 4) VCC 0.0015 VCC 0.0006 _______________________________________________________________________________________ A A A V 3.0V/3.3V Microprocessor Supervisory Circuits (VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to 5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SYMBOL CONDITIONS IOUT = 250A, VBATT = 2.3V VOUT in Battery-Backup Mode MIN TYP VBATT - 0.1 VBATT - 0.034 VBATT - VCC, VSW > VCC > 1.75V (Note 5) VSW Battery Switch Threshold, VCC Rising (Note 7) VBATT > VCC (Note 6) mV 2.50 3.00 3.075 3.15 VCC rising 3.00 3.085 3.17 VCC falling 3.00 3.075 3.12 VCC rising 3.00 3.085 3.14 VCC falling 2.85 2.925 3.00 VCC rising 2.85 2.935 3.02 VCC falling 2.88 2.925 3.00 VCC rising 2.88 2.935 3.02 VCC falling 2.55 2.625 2.70 VCC rising 2.55 2.635 2.72 VCC falling 2.59 2.625 2.70 VCC rising 2.59 2.635 2.72 VCC < 3.6V 140 200 280 VCC - 0.3 VCC - 0.05 MAX690S/704S/805S VRST MAX802S/804S/806S MAX690R/704R/805R MAX802R/804R/806S tWP V V VCC falling MAX802T/804T/806T Reset Timeout Period 25 2.40 This value is identical to the reset threshold, VCC rising MAX690T/704T/805T Reset Threshold (Note 8) 65 2.30 UNITS V VBATT - 0.14 IOUT = 1mA, VBATT = 2.3V Battery Switch Threshold, VCC Falling MAX V ms ------ ---------- P F O , R E S E T Output Voltage VOH ISOURCE = 50A ------ ---------- P F O , R E S E T Output Short to GND Current (Note 4) IOS VCC = 3.3V, VOH = 0V 180 500 V ------ ---------- P F O , R E S E T , RESET Output Voltage VOL ISINK = 1.2mA; MAX690_/704_/802_/806_, VCC = VRST min; MAX804_/805_, VCC = VRST max 0.06 0.3 V 0.13 0.3 0.17 0.3 ------ ---------- P F O , R E S E T Output Voltage RESET Output Leakage Current (Note 9) VBATT = 0V, VCC = 1.0V, ISINK = 40A, MAX690_C, MAX704_C, MAX80_ _C VOL VBATT = 0V, VCC = 1.2V, ISINK = 200A, MAX690_E/M, MAX704_E/M, MAX80_ _E/M VBATT = 0V, VCC = VRST min; VRESET = 0V, VCC V MAX804_C, MAX805_C -1 1 MAX804_E/M, MAX805_E/M -10 10 V A _______________________________________________________________________________________ 3 MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R ELECTRICAL CHARACTERISTICS (continued) MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to 5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25C.) PARAMETER PFI Input Threshold SYMBOL VPFT PFI Input Current PFI Hysteresis, PFI Rising VPFH PFI Input Current CONDITIONS TYP MAX 1.212 1.237 1.262 MAX690_/MAX704_/MAX805_ 1.187 1.237 1.287 MAX690_C/E, MAX704_C/E, MAX80_ _C/E -25 2 25 MAX690_M, MAX704_M, MAX80_ _M -500 2 500 MAX690_C/E, MAX704_C/E, MAX80_ _C/E 10 20 MAX690_M, MAX704_M, MAX80_ _M 10 25 VCC < 3.6V VPFI falling VCC < 3.6V MAX690_C/E, MAX704_C/E, MAX80_ _C/E -25 2 25 MAX690_M, MAX704_M, MAX80_ _M -500 2 500 ---- M R Input Threshold VIH ---- M R Pulse Width ---- M R to Reset Delay ---- M R Pull-Up Current tMR MAX704_/MAX806_ only tMD MAX704_/MAX806_ only WDI Input Threshold VIL VIH VIL WDI Input Current Watchdog Timeout Period WDI Pulse Width Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: 4 MIN MAX802_C/E, MAX804_C/E, MAX806_C/E MAX704_/MAX806_ only ---- MAX704_/MAX806_ only, M R = 0V, VCC = 3V MAX690_/MAX802_/MAX804_/MAX805_ only 100 20 20 nA mV nA V ns 500 ns 60 350 A 0.7 x VCC 0.3 x VCC -1 0.01 1 MAX690_M, MAX802_M, MAX804_M, MAX805_M -10 0.01 10 MAX690/MAX802/MAX804/ MAX805 only 1.12 1.60 2.24 MAX690_/MAX802_/MAX804_/MAX805_ only 100 20 VCC < 3.6V V 60 MAX690_C/E, MAX802_C/E, MAX804_C/E, MAX805_C/E 0V< VCC < 5.5V tWD 0.7 x VCC 0.3 x VCC UNITS V A sec ns ---- VCC supply current, logic input leakage, watchdog functionality (MAX690_/802_/805_/804_), M R functionality ---------- (MAX704_/806_), PFI functionality, state of R E S E T (MAX690_/704_/802_/806_), and RESET (MAX804_/805_) tested at ---------- ------ VBATT = 3.6V, and VCC = 5.5V. The state of R E S E T or RESET and P F O is tested at VCC = VCC min. Tested at VBATT = 3.6V, VCC = 3.5V and 0V. The battery current will rise to 10A over a narrow transition window around VCC = 1.9V. Leakage current into the battery is tested under the worst-case conditions at VCC = 5.5V, VBATT = 1.8V and at VCC = 1.5V, VBATT= 1.0V. Guaranteed by design. When VSW > VCC > VBATT, VOUT remains connected to VCC until VCC drops below VBATT. The VCC-to-VBATT comparator has a small 25mV typical hysteresis to prevent oscillation. For VCC < 1.75V (typ), VOUT switches to VBATT regardless of the voltage on VBATT. When VBATT > VCC > VSW, VOUT remains connected to VCC until VCC drops below the battery switch threshold (VSW). VOUT switches from VBATT to VCC when VCC rises above the reset threshold, independent of VBATT. Switchover back to ---------- VCC occurs at the exact voltage that causes R E S E T to go high (on the MAX804_/805_, RESET goes low); however switchover occurs 200ms prior to reset. The reset threshold tolerance is wider for VCC rising than for VCC falling to accommodate the 10mV typical hysteresis, which prevents internal oscillation. The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance). _______________________________________________________________________________________ 3.0V/3.3V Microprocessor Supervisory Circuits VBATT-to-VOUT ON-RESISTANCE vs. TEMPERATURE VCC = 2.5V VCC = 3.3V 3 2 VCC = 5V 1 140 VBATT = 3V 100 VBATT = 3.3V 60 VCC = 5V VCC = 2.5V 20 40 60 80 100 120 140 -60 -40 -20 0 100 VBATT = 3V 1 212 VCC = 5V 208 RESET-COMPARATOR PROPAGATION DELAY vs. TEMPERATURE VBATT = 3.0V 204 200 VBATT = 2V 30 VBATT = 3.0V 100mV OVERDRIVE PROPAGATION DELAY (s) VBATT = 5V 216 RESET TIMEOUT PERIOD (ms) MAX690-806 TOC04 10,000 196 20 40 60 80 100 120 140 22 18 14 10 -60 -40 -20 0 20 40 60 80 100 120 140 -60 -40 -20 0 TEMPERATURE (C) PFI THRESHOLD vs. TEMPERATURE 1.238 VCC = 5V 1.236 VCC = 2.5V 1.234 1.232 VBATT = 3.0V 1.230 1.004 NORMALIZED RESET THRESHOLD (V) VCC = 3.3V NORMALIZED RESET THRESHOLD vs. TEMPERATURE MAX690-806 TOC07 1.240 20 40 60 80 100 120 140 TEMPERATURE (C) MAX690-806 TOC08 TEMPERATURE (C) PFI THRESHOLD (V) 26 VCC = 3.3V 0.1 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C) RESET TIMEOUT PERIOD vs. TEMPERATURE BATTERY SUPPLY CURRENT vs. TEMPERATURE 1000 35 VCC = 3.3V VBATT = 3V PFI = GND MR/WDI FLOATING TEMPERATURE (C) TEMPERATURE (C) VCC = 0V PFI = GND 40 25 -60 -40 -20 0 20 40 60 80 100 120 140 45 30 VBATT = 5V MAX690-806 TOC05 -60 -40 -20 0 BATTERY SUPPLY CURRENT (nA) 50 20 0 10 VBATT = 2V MAX690-806 TOC03 VCC = 0V MAX690-806 TOC06 4 180 SUPPLY CURRENT (A) MAX690-806 TOC01 VCC-to-VOUT ON-RESISTANCE () VBATT = 3.0V VBATT-to-VOUT ON-RESISTANCE () 5 SUPPLY CURRENT vs. TEMPERATURE MAX690-806 TOC02 VCC-to-VOUT ON-RESISTANCE vs. TEMPERATURE 1.002 1.000 0.998 0.996 VBATT = 3.0V 0.994 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C) -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C) _______________________________________________________________________________________ 5 MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R __________________________________________Typical Operating Characteristics (TA = +25C, unless otherwise noted.) MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits ______________________________________________________________Pin Description PIN MAX690 MAX704 MAX804 MAX802 MAX806 MAX805 NAME FUNCTION VOUT Supply Output for CMOS RAM. When VCC is above the reset threshold, VOUT is connected to VCC through a P-channel MOSFET switch. When VCC falls below VSW and VBATT, VBATT connects to VOUT. Connect to VCC if no battery is used. 1 1 1 2 2 2 VCC Main Supply Input 3 3 3 GND Ground 4 4 4 PFI 5 5 5 ------ PFO 6 -- 6 WDI -- 6 -- ---- MR ------ Power-Fail Input. When PFI is less than VPFT or when VCC falls below VSW, P F O goes ------ low; otherwise, P F O remains high. Connect to ground if unused. ------ Power-Fail Output. When PFI is less than VPFT, or VCC falls below VSW, P F O goes low; ------ otherwise, P F O remains high. Leave open if unused. Watchdog Input. If WDI remains high or low for 1.6sec, the internal watchdog timer runs out and reset is triggered. The internal watchdog timer clears while reset is asserted or when WDI sees a rising or falling edge. The watchdog function cannot be disabled. ---- Manual Reset Input. A logic low on M R asserts reset. Reset remains asserted as long as ---- ---- M R is low and for 200ms after M R returns high. This active-low input has an internal 70A pull-up current. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused. 7 7 -- -- -- 7 Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever ---- ---------- VCC is below the reset threshold or when M R is a logic low. It remains low for 200ms after RESET ---- either VCC rises above the reset threshold, the watchdog triggers a reset, or M R goes from low to high. ---------- RESET Active-High, Open-Drain Reset Output is the inverse of R E S E T . 8 8 8 VBATT Backup-Battery Input. When VCC falls below VSW and VBATT, VOUT switches from VCC to VBATT. When VCC rises above the reset threshold, VOUT reconnects to VCC. VBATT may exceed VCC. Connect to VCC if no battery is used. _______________Detailed Description Reset Output A microprocessor's (P's) reset input starts the P in a known state. These P supervisory circuits assert reset to prevent code execution errors during power-up, powerdown, brownout conditions, or a watchdog timeout. ---------- R E S E T is guaranteed to be a logic low for 0V < VCC < VRST, provided that VBATT is greater than 1V. Without ---------- a backup battery, R E S E T is guaranteed valid for VCC > 1V. Once V CC exceeds the reset threshold, an ---------- internal timer keeps R E S E T low for the reset timeout ---------- period; after this interval, R E S E T goes high (Figure 2). If a brownout condition occurs (VCC dips below the ---------- ---------- reset threshold), R E S E T goes low. Each time R E S E T is asserted, it stays low for the reset timeout period. Any time V CC goes below the reset threshold, the internal timer restarts. The watchdog timer can also initiate a reset. See the Watchdog Input section. The MAX804_/MAX805_ active-high RESET output is open drain, and the inverse of the MAX690_/MAX704_/ ---------- MAX802_/MAX806_ R E S E T output. 6 Reset Threshold The MAX690T/MAX704T/MAX805T are intended for 3.3V systems with a 5% power-supply tolerance and a 10% system tolerance. Except for watchdog faults, reset will not assert as long as the power supply remains above 3.15V (3.3V - 5%). Reset is guaranteed to assert before the power supply falls below 3.0V. The MAX690S/MAX704S/MAX805S are designed for 3.3V 10% power supplies. Except for watchdog faults, they are guaranteed not to assert reset as long as the supply remains above 3.0V (3.3V - 10%). Reset is guaranteed to assert before the power supply falls below 2.85V (VCC - 14%). The MAX690R/MAX704R/MAX805R are optimized for monitoring 3.0V 10% power supplies. Reset will not occur until VCC falls below 2.7V (3.0V - 10%), but is guaranteed to occur before the supply falls below 2.59V (3.0V - 14%). The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T are respectively similar to the MAX690R/S/T, MAX805R/S/T, and MAX704R/S/T, but with tightened reset and power-fail threshold tolerances. _______________________________________________________________________________________ 3.0V/3.3V Microprocessor Supervisory Circuits 3.0V OR 3.3V BATTERY SWITCHOVER CIRCUITRY VCC VRST VOUT VCC VSW BATTERY SWITCHOVER COMPARATOR 0V 3.0V OR 3.3V 1.237V RESET COMPARATOR VOUT MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VBATT = 3.6V VSW tWP 3.0V OR 3.3V RESET 1.237V * WDI * RESET GENERATOR WATCHDOG TIMER RESET (RESET) ** (RESET) MR PFI PFO POWER-FAIL COMPARATOR VPFT * MAX690T/S/R, MAX802T/S/R, MAX804T/S/R, MAX805T/S/R ONLY ** MAX704T/S/R, MAX806T/S/R ONLY ( ) MAX804T/S/R, MAX805T/S/R ONLY Figure 1. Block Diagram PFO VBATT = PFI = 3.6V IOUT = 0mA ( ) MAX804T/S/R, MAX805T/S/R ONLY, RESET EXTERNALLY PULLED UP TO VCC Figure 2. Timing Diagram Watchdog Input (MAX690_/802_/804_/805_) The watchdog circuit monitors the P's activity. If the P does not toggle the watchdog input (WDI) within 1.6sec, a reset pulse is triggered. The internal 1.6sec timer is cleared by either a reset pulse or by a transition (low-tohigh or high-to-low) at WDI. If WDI is tied high or low, a ---------- R E S E T pulse is triggered every 1.8sec (tWD plus tRS). As long as reset is asserted, the timer remains cleared and does not count. As soon as reset is deasserted, the timer starts counting. Unlike the 5V MAX690 family, the watchdog function cannot be disabled. Power-Fail Comparator The PFI input is compared to an internal reference. If ------ PFI is less than VPFT, P F O goes low. The power-fail comparator is intended for use as an undervoltage detector to signal a failing power supply. However, the comparator does not need to be dedicated to this function because it is completely separate from the rest of the circuitry. ------ The power-fail comparator turns off and P F O goes low when VCC falls below VSW on power-down. The powerfail comparator turns on as V CC crosses V SW on power-up. If the comparator is not used, connect PFI to ------ ------ ground and leave ---- P F O unconnected. P F O may be connected to M R on the MAX704_/MAX806_ so that a low voltage on PFI will generate a reset (Figure 5b). _______________________________________________________________________________________ 7 MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R VBATT MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits Backup-Battery Switchover In the event of a brownout or power failure, it may be necessary to preserve the contents of RAM. With a backup battery installed at VBATT, the devices automatically switch RAM to backup power when V CC falls. This family of P supervisors (designed for 3.3V and 3V systems) doesn't always connect VBATT to VOUT when VBATT is greater than VCC. VBATT connects to VOUT (through a 140 switch) when VCC is below VSW and VBATT is greater than V CC, or when VCC falls below 1.75V (typ) regardless of the VBATT voltage. This is done to allow the backup battery (e.g., a 3.6V lithium cell) to have a higher voltage than VCC. Switchover at VSW (2.40V) ensures that battery-backup mode is entered before VOUT gets too close to the 2.0V minimum required to reliably retain data in CMOS RAM. Switchover at higher VCC voltages would decrease backup-battery life. When VCC recovers, switchover is deferred until V CC rises above the reset threshold (VRST) to ensure a stable supply. VOUT is connected to VCC through a 3 PMOS power switch. Manual Reset ---- A logic--- low - on M R asserts reset. Reset remains ----asserted while M R is low, and for tWP (200ms) after MR returns high. This input has an internal 70A ---- pull-up current, so it can be left open if it is not used. M R can be driven with TTL or CMOS logic levels, or with open-drain/collector outputs. ---- Connect a normally open momentary switch from M R to GND to create a manual-reset function; external debounce circuitry is not required. Table 1. Input and Output Status in Battery-Backup Mode PIN NAME VOUT VCC Disconnected from VOUT PFI The power-fail comparator is disabled when VCC < VSW ------ PFO 8 STATUS Connected to VBATT through an internal 140 switch Logic low when VCC < VSW or PFI < VPFT WDI ---- MR ---------- RESET The watchdog timer is disabled RESET High impedance VBATT Connected to VOUT Disabled Low logic __________Applications Information These P supervisory circuits are not short-circuit protected. Shorting VOUT to ground--excluding powerup transients such as charging a decoupling capacitor--destroys the device. Decouple both VCC and VBATT pins to ground by placing 0.1F capacitors as close to the device as possible. Using a SuperCap as a Backup Power Source SuperCapsTM are capacitors with extremely high capacitance values (e.g., order of 0.47F) for their size. Figure 3 shows two ways to use a SuperCap as a backup power source. The SuperCap may be connected through a diode to the 3V input (Figure 3a) or, if a 5V supply is also available, the SuperCap may be charged up to the 5V supply (Figure 3b) allowing a longer backup period. Since VBATT can exceed VCC while VCC is above the reset threshold, there are no special precautions when using these P supervisors with a SuperCap. Operation without a Backup Power Source These P supervisors were designed for batterybacked applications. If a backup battery is not used, connect both VBATT and V OUT to V CC , or use a different P supervisor such as the MAX706T/S/R or MAX708T/S/R. Replacing the Backup Battery The backup power source can be removed while VCC remains valid, if VBATT is decoupled with a 0.1F capacitor to ground, without danger of triggering ---------- RESET/ R E S E T . As long as V CC stays above V SW , battery-backup mode cannot be entered. Adding Hysteresis to the Power-Fail Comparator The power-fail comparator has a typical input hysteresis of 10mV. This is sufficient for most applications where a power-supply line is being monitored through an external voltage divider (see the section Monitoring an Additional Power Supply). If additional noise margin is desired, connect a resistor ------ between P F O and PFI as shown in Figure 4a. Select the ratio of R1 and R2 such that PFI sees 1.237V (VPFT) when V IN falls to its trip point (VTRIP ). R3 adds the hysteresis and will typically be more than 10 times the value of R1 or R2. The hysteresis window extends both above (VH) and below (VL) the original trip point (VTRIP). TM SuperCap is a trademark of Baknor Industries. _______________________________________________________________________________________ 3.0V/3.3V Microprocessor Supervisory Circuits +5V VCC 1N4148 VBATT MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VOUT 3.0V OR 3.3V TO STATIC RAM RESET (RESET) TO P VBATT MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VOUT RESET (RESET) TO STATIC RAM TO P 0.47F 0.47F GND GND a VCC 1N4148 ( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY b ( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY Figure 3. Using a SuperCap as a Backup Power Source Connecting an ordinary signal diode in series with R3, as shown in Figure 4b, causes the lower trip point (VL) to coincide with the trip point without hysteresis (VTRIP), so the entire hysteresis window occurs above VTRIP. This method provides additional noise margin without compromising the accuracy of the power-fail threshold when the monitored voltage is falling. It is useful for accurately detecting when a voltage falls past a threshold. The current through R1 and R2 should be at least 1A to ensure that the 25nA (max over extended temperature range) PFI input current does not shift the trip point. R3 should be larger than 10k so it does not load down the ------ P F O pin. Capacitor C1 adds additional noise rejection. Monitoring an Additional Power Supply These P supervisors can monitor either positive or negative supplies using a resistor voltage divider to ------ PFI. P F O can be used to generate--- an - interrupt to the ------ P (Figure 5). Connecting P F O to M R on the MAX704 and MAX806 causes reset to assert when the monitored supply goes out of tolerance. Reset remains ---- ------ asserted as long as P F O holds MR low, and for 200ms ------ after P F O goes high. Interfacing to Ps with Bidirectional Reset Pins Ps with bidirectional reset pins, such as the Motorola 68HC11 series, can contend with the MAX690_/ ---------- MAX704_/MAX802_/MAX806_ R E S E T output. If, for ---------- example, the R E S E T output is driven high and the P wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7k resistor ---------- between the R E S E T output and the P reset I/O, as in ---------- Figure 6. Buffer the R E S E T output to other system components. Negative-Going VCC Transients While issuing resets to the P during power-up, powerdown, and brownout conditions, these supervisors are relatively immune to short-duration negative-going VCC transients (glitches). It is usually undesirable to reset the P when VCC experiences only small glitches. Figure 7 shows maximum transient duration vs. resetcomparator overdrive, for which reset pulses are not generated. The graph was produced using negativegoing VCC pulses, starting at 3.3V and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). The graph shows the maximum pulse width a negative-going V CC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a V CC transient that goes 100mV below the reset threshold and lasts for 40s or less will not cause a reset pulse to be issued. A 100nF bypass capacitor mounted close to the VCC pin provides additional transient immunity. _______________________________________________________________________________________ 9 MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R 3.0V OR 3.3V MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits VIN VIN R1 VCC R1 PFI R2 R3 C1* PFO MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VCC R2 MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R PFO GND R3 C1* GND *OPTIONAL TO P PFI *OPTIONAL TO P PFO PFO 0V VL 0V VTRIP = VPFT VTRIP ( R R+ R ) 1 VTRIP = VPFT 2 ( VTRIP 0V 2 ( R1 ) 1 1 + R2 R3 1 1 1 1 VCC + + - R3 R1 R2 R3 VH = (VPFT + VPFH) (R1) VL = R1 VPFT 0V VIN VH + WHERE VPFT = 1.237V VPFH = 10mV Figure 4. a) Adding Additional Hysteresis to the Power-Fail Comparator ( R1 + 1 1 1 + R2 R3 VIN VCC R2 2 2 CC - VD) R3 3.0V OR 3.3V VCC R1 MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R ) - (V b) Shifting the Additional Hysteresis above VPFT 3.0V OR 3.3V PFI 1 WHERE VPFT = 1.237V VPFH = 10mV VD = DIODE FORWARD VOLTAGE DROP VL = VTRIP b R1 (R R+ R ) VH = R1 (VPFT + VPFH) ) a VIN VH PFO PFI R2 MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R PFO MR * GND GND VVCC VCC PFO PFO VL VTRIP = R2 (VPFT + VPFH) VL = R2 (VPFT) a ( 1 1 ( R1 + R2 ) - 1 1 + R 1 R2 ) VCC - R1 VTRIP VCC R1 V- VTRIP 0V VTRIP = VPFT WHERE VPFT = 1.237V VPFH = 10mV ( R1 + R2 R2 VH = (VPFT + VPFH) NOTE: VTRIP IS NEGATIVE ( VH ) R1 + R2 R2 * MAX704T/S/R, MAX806T/S/R ONLY ) b Figure 5. Using the Power-Fail Comparator to Monitor an Additional Power Supply 10 VIN ______________________________________________________________________________________ 3.0V/3.3V Microprocessor Supervisory Circuits _Typical Operating Circuits (cont.) 3.0V OR 3.3V VOUT VCC VCC VCC MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX806T/S/R P 4.7k 0.1F RESET RESET 3.6V 0.1F MAX704T/S/R MAX806T/S/R RESET MR GND GND RAM VBATT 0.1F P PFI GND Figure 6. Interfacing to Ps with Bidirectional Reset I/O DS690-806 fig7 MAXIMUM TRANSIENT DURATION (s) 100 80 VCC = 3.3V TA = +25C 60 40 20 0 10 100 1000 RESET COMPARATOR OVERDRIVE (VRST - VCC) (mV) Figure 7. Maximum Transient Duration without Causing a Reset Pulse vs. Reset Comparator Overdrive ______________________________________________________________________________________ 11 MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R BUFFERED RESET TO OTHER SYSTEM COMPONENTS MAX690T/S/R, 704T/S/R, 802T/S/R, 804-806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits _Ordering Information (continued) PART** TEMP. RANGE ___________________Chip Topography V OUT PIN-PACKAGE MAX704_CPA 0C to +70C 8 Plastic DIP MAX704_CSA MAX704_C/D MAX704_EPA 0C to +70C 0C to +70C -40C to +85C 8 SO Dice* 8 Plastic DIP MAX704_ESA MAX704_MJA MAX802_CPA -40C to +85C -55C to +125C 0C to +70C 8 SO 8 CERDIP 8 Plastic DIP MAX802_CSA MAX802_C/D MAX802_EPA 0C to +70C 0C to +70C -40C to +85C 8 SO Dice* 8 Plastic DIP MAX802_ESA MAX802_MJA MAX804_CPA -40C to +85C -55C to +125C 0C to +70C 8 SO 8 CERDIP 8 Plastic DIP MAX804_CSA MAX804_C/D MAX804_EPA 0C to +70C 0C to +70C -40C to +85C 8 SO Dice* 8 Plastic DIP MAX804_ESA MAX804_MJA MAX805_CPA -40C to +85C -55C to +125C 0C to +70C 8 SO 8 CERDIP 8 Plastic DIP MAX805_CSA MAX805_C/D MAX805_EPA 0C to +70C 0C to +70C -40C to +85C 8 SO Dice* 8 Plastic DIP MAX805_ESA MAX805_MJA MAX806_CPA -40C to +85C -55C to +125C 0C to +70C 8 SO 8 CERDIP 8 Plastic DIP MAX806_CSA MAX806_C/D MAX806_EPA 0C to +70C 0C to +70C -40C to +85C 8 SO Dice* 8 Plastic DIP MAX806_ESA MAX806_MJA -40C to +85C -55C to +125C 8 SO 8 CERDIP VBATT V CC 0.110" (2.794mm) GND RESET (RESET) WDI [MR] PFI PFO 0.080" (2.032mm) ( ) ARE FOR MAX804T/S/R, MAX805T/S/R. [ ] ARE FOR MAX704T/S/R, MAX806T/S/R. TRANSISTOR COUNT: 802; SUBSTRATE IS CONNECTED TO THE HIGHER OF V CC OR VBATT, AND MUST BE FLOATED IN ANY HYBRID DESIGN. * Contact factory for dice specifications. ** These parts offer a choice of reset threshold voltage. Select the letter corresponding to the desired nominal reset threshold voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into the blank to complete the part number. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1994 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.