MAX21003+T - Maxim Integrated

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

General Description

The MAX21003 is a low power, low noise, dual-axis angu-

lar rate sensor that delivers unprecedented accuracy and

sensitivity over temperature and time. It operates with

a supply voltage as low as 1.71V for minimum power

consumption. It includes a sensing element and an IC

interface that provides the measured angular rate to the

external world through a digital interface (I2C/SPI).

The IC has a full scale of ±31.25/±62.50/±125/±250/

±500/±1000 degrees per second (dps) and measures

rates with a finely tunable user-selectable bandwidth. The

high ODR and the large BW, the low noise at highest FS,

together with the low phase delay, make the IC suitable

for optical image stabilization (OIS) applications.

The IC is a highly integrated solution available in a com-

pact 3mm x 3mm x 0.9mm plastic land grid array (LGA)

package and does not require any external components

other than supply bypass capacitors. It can operate over

the -40°C to +85°C temperature range.

Applications

● OpticalImageStabilization

● GPSNavigationSystems

● AppliancesandRobotics

Features and Benets

● Minimum Overall Footprint

• Industry’sSmallestandThinnestPackagefor

Portable Devices (3mm x 3mm x 0.9mm LGA)

• NoExternalComponents

● UniqueLow-PowerCapabilities

• Low Operating Current Consumption (5.1mA typ)

• EcoModeAvailableat100Hzwith3.0mA(typ)

• 1.71V(min)SupplyVoltage

• StandbyModeCurrent2.7mA(typ)

• 8.5µA(typ)Power-DownModeCurrent

• HighPSRRandDC-DCConverterOperation

• 45msTurn-OnTimefromPower-DownMode

• 5msTurn-OnTimefromStandbyMode

● OIS Suitability

• MinimumPhaseDelay(~3°at10Hz)

• HighBandwidth(400Hz)

• HighODR(10kHz)

• LowNoise(7mdps/√Hztyp)

● UnprecedentedAccuracy

• EmbeddedDigital-OutputTemperatureSensor

• AutomaticTemperatureCompensation

• Ultra-StableOverTemperatureandTime

• FactoryCalibrated

● High-SpeedInterface

• I2CStandand(100kHz),Fast(400kHz),and

High-Speed(3.4MHz)SerialInterface

• 10MHzSPIInterface

• ReducesAPLoad

• EnablesUI/OISSerialInterfaceMultiplexing

● FlexibleEmbeddedFIFO

• Size:512Bytes(256x16bits)

• Single-ByteReadingAvailable

• FourDifferentFIFOModesAvailable

• ReducesAPLoad

● HighConfigurability

• IntegratedDigitallyProgrammableLow-and

HighpassFilters

• IndependentlySelectableDataODRandInterrupt

ODR

• 6SelectableFullScales

(31.25/62.5/125/250/500/1000 dps)

• 256-SelectableODR

● Flexible Interrupt Generator

• TwoDigitalOutputLines

• 2IndependentInterruptGenerators

• 8MaskableInterruptSourcesEach

• ConfigurableasLatched/Unlatched/Timed

• EmbeddedIndependentAngularRateComparators

• IndependentThresholdandDuration

• Level/PulseandOD/PPOptionsAvailable

● Flexible Data Synchronization Pin

• ExternalWakeup

• InterruptGeneration

• SingleDataCaptureTrigger

• MultipleDataCaptureTrigger

• LSBDataMapping

● Unique48-BitSerialNumberasDieID

● High-ShockSurvivability(10,000G-Shock)

19-6645; Rev 0; 6/13

Ordering Information appears at end of data sheet.

For related parts and recommended products to use with this part, refer

to www.maximintegrated.com/MAX21003.related.

EVALUATION KIT AVAILABLE

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

www.maximintegrated.com Maxim Integrated

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Electrical Characteristics

(VDD = VDDIO = 2.5V, , TA = -40°C to +85°C, INT1, INT2, SDA, and SCL are unconnected, unless otherwise noted. Typical values

are at TA = +25°C).

Note 1: PackagethermalresistanceswereobtainedusingthemethoddescribedinJEDECspecificationJESD51-7,usingafour-layer

board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

VDD .......................................................................-0.3V to +6.0V

VDDIO ................................................ -0.3V to Min (VDD + 0.3V)

INT1,INT2,SDA_SDI_O,SA0_SDO,

SCL_CLK,CS,DSYNC ..................... -0.3V to (VDDIO + 0.3V)

IVDD Continuous Current .................................................100mA

IVDDIO Continuous Current ..............................................100mA

Junction Temperature ...................................................... +150°C

Operating Temperature Range ........................... -40°C to +85°C

Storage Temperature Range ............................ -40°C to +150°C

Lead Temperature (soldering, 10s) .................................+260°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these

or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

Drops onto hard surfaces can cause shocks of greater than 10,000 g and can exceed the absolute maximum rating of the device. Exercise care in handling to avoid damage.

Package Thermal Characteristics (Note 1)

LGA

Junction-to-CaseThermalResistance(θJC) ........... 31.8°C/W Junction-to-AmbientThermalResistance(θJA) ........... 160°C/W

Absolute Maximum Ratings

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SUPPLY AND CONSUMPTION

VDD Supply Voltage VDD 1.71 2.5 3.6 V

VDDIO (Note2) VDDIO 1.71 2.5 VDD +

0.3V V

IDD Current Consumption

NormalMode IVDDN 5.1 mA

IDD Current Consumption Standby

Mode(Note3) IVDDS 2.7 mA

IDD Current Consumption

EcoMode(Note4) IVDDT

200HzODR 3.3 mA

100HzODR 3.0 mA

IDD Current Consumption

Power Down Mode IVDDP 8.5 µA

TEMPERATURE SENSOR

Temperature Sensor Output

Change vs. Temperature TSDR

8 bit 1 digit/°C

16 bit 256 digit/°C

Temperature BW TBW 1Hz

Temperature Sensor Bias TBIAS

At 25°C, 8 bit 25 digit

At 25°C, 16 bit 6400

GYROSCOPE

Gyro Full-Scale Range GFSR Userselectable

±31.25

dps

±62.5

±125

±250

±500

±1000

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

www.maximintegrated.com Maxim Integrated

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Electrical Characteristics (continued)

(VDD = VDDIO = 2.5V, TA = -40°C to +85°C, INT1, INT2, SDA, and SCL are unconnected, unless otherwise noted. Typical values

are at TA = +25°C).

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

GyroRateNoiseDensity GRND For all the fS and over the whole VDD

including 1.8V 0.007

dps/√Hz

GyroRateNoiseDensityin

EcoMode GSPRND For all the FS and over the whole VDD

including1.8Vat200HzODR 0.020

dps/√Hz

Gyro Bandwidth (Lowpass)

(Note5) GBWL 2 400 Hz

GyroBandwidth(Highpass)

(Note6) GBWH 0.1 100 Hz

Phase Delay GPDL

At10Hz,400Hzbandwidth,10kHzODR 2.9 3.7 deg

At10Hz,400Hzbandwidth,10kHzODR 1.0 1.6

Output Data Rate (Note7) GODR 5 10k Hz

SensitivityError GSE ±2 %

Sensitivity GSO

GFSR = 31.25 960

digit/

dps

GFSR = 62.5 480

GFSR = 125 240

GFSR = 250 120

GFSR = 500 60

GFSR = 1000 30

Sensitivity Drift Over Temperature GSD Maximum delta from TA = +25°C ±2 %

ZeroRateLevelError GZRLE ±0.5 dps

Zero Rate Level Drift Over

Temperature GZRLD Maximum delta from TA = +25°C ±2 dps

Startup Time from Power Down GTUPL 45 ms

Startup Time from Standby Mode GTUPS GODR=10kHz,

GBWL=400Hz 5 ms

Nonlinearity GNLN 0.2 %fS

Angular Random Walk (ARW) GARW 0.45 °/√hr

In-Run Bias Stability GIBS At 1000s 4 °/hr

Cross Axis GXX 1 %

Self-Test Output STOR For GRSR = 125, 250, 500, 1000 dps,

axis X, Z +fS/2 dps

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

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Electrical Characteristics (continued)

(VDD = VDDIO = 2.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C).

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

IO DC SPECIFICATIONS (Note 9)

Input Threshold Low VIL TA = +25°C +0.3 x

VDDIO

InputThresholdHigh VIH TA = +25°C 0.7 x

VDDIO

HysteresisofSchmittTriggerinput VHYS TA = +25°C 0.05 x

VDDIO

Output Current

(Note8) IOH/IOL

I2C_CFG[3:2]=00 3 mA

I2C_CFG[3:2]=01 6 mA

I2C_CFG[3:2]=11 12 mA

SPI SLAVE TIMING VALUES (Note 10)

CLKFrequency fC_CLK 10 MHz

CS Setup Time tSU_CS 10 ns

CSHoldTime tH_CS 15 ns

SDI Input Setup Time tSU_SI 10 ns

SDIInputHoldTime tH_SI 15 ns

CLKFalltoSDOValidOutputTime tV_SDO 50 ns

SDOOutputHoldTime TH_SO 10 ns

I2C TIMING (Note 9)

SCL Clock Frequency fSCL

Standard mode 0 100 kHz

Fast mode 0 400

HoldTime(Repeated)START

Condition tHD;STA

Standard mode 4.0 µs

Fast mode 0.6

Low Period of SCL Clock tLOW

Standard mode 4.7 µs

Fast mode 1.3

HighPeriodofSCLClock tHIGH

Standard mode 4.0 µs

Fast mode 0.6

Setup Time for a Repeated START

Condition tSU;STA

Standard mode 4.7 µs

Fast mode 0.6

DataHoldTime tHD;DAT

Standard mode 0 µs

Fast mode 0

Data Setup Time tSU;DAT

Standard mode 250 ns

Fast mode 100

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

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Electrical Characteristics (continued)

(VDD = VDDIO = 2.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C).

Note 2: VDDIO must be lower or equal than VDD analog.

Note 3: In standby mode, only the drive circuit is powered on. In this condition, the outputs are not available. In this condition, the

startup time depends only on the filters responses.

Note 4: In eco mode, the sensor has higher rate noise density, but lower current consumption. In this condition, the selectable out-

putdatarate(ODR)iseither25Hz,50Hz,100Hz,or200Hz.

Note 5: Userselectable.Gyrobandwidthaccuracyis10%.

Note 6: Enable/disablewithuserselectablebandwidth.Gyrobandwidthaccuracyis10%.

Note 7: Userselectablewith256possiblevaluesfrom10kHzdownto5Hz.ODRaccuracyis±10%.

Note 8:UsercanchoosethebestoutputcurrentbasedonhisPCB,interfacespeed,load,andconsumption.

Note 9: Based on characterization results, not tested in production.

Note 10:Basedoncharacterizationresults,nottestedinproduction.TestconditionsareI2C_CFG[3:0]=1111.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Setup Time for STOP Condition tSU;STO

Standard mode 4.0 ns

Fast mode 0.6

Bus Free Time Between a STOP

and a START Condition tBUF

Standard mode 4.7 ns

Fast mode 1.3

Data Valid Time tVD;DAT

Standard mode 3.45 ns

Fast mode 0.9

Data Valid Acknowledge Time tVD;ACK

Standard mode 3.45 ns

Fast mode 0.9

ESD PROTECTION

HumanBodyModel HBM ±2 kV

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

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SPI Timing Diagrams

tSU_CS tCSW

tC_CLK

tSU_SI

tH_CS

1 2 8 9 10 11 16

CLK

SDI

SDO HI-Z HI-Z

tH_SI tH_SO tV_SDO

tSU_CS tCSW

tC_CLK

tSU_SI

tH_CS

1 2 8 9 10 11 16

CLK

SDI

SDO HI-Z HI-Z

tH_SI tV_SDI

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

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I2C Timing Diagram in Standard Mode

tSU;DAT

tVD;DAT

tHD;DAT

tHD;STA

tSU;STA

VIL = 0.3VDD

VIH = 0.7VDD

tLOW

tBUF

tSU;STO

tVD;ACK

9th CLOCK

9th CLOCK 002aac938

1/fSCL

1st CLOCK CYCLE

tHIGH

70%

30%

70%

30%

70%

30%

70%

30%

70%

30%

70%

Sr SP

SCL

SDA

30%

30% cont.

cont.

tFtR

tHD;STA

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

Maxim Integrated

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Typical Operating Characteristics

(VDD = VDDIO = 2.5V, TA = +25°C, unless otherwise noted.)

X-AXIS DIGITAL OUTPUT

vs. ANGULAR RATE

MAX21003 toc01

ANGULAR RATE (dps)

DIGITAL OUTPUT (LSb)

1k0-1k

-20k

-10k

10k

20k

30k

-30k

-2k 2k

TA = +25°C

TA = -40°C

TA = +85°C

MAGNITUDE RESPONSE

MAX21003 toc03

FREQUENCY (Hz)

MAGNITUDE (dB)

10010

-40

-30

-20

-10

-50

1 1k

BW = 100Hz

BW = 10Hz

BP_LPFbit = 1

BW = 400Hz

Z-AXIS DIGITAL OUTPUT

vs. ANGULAR RATE

MAX21003 toc02

ANGULAR RATE (dps)

DIGITAL OUTPUT (LSb)

1k0-1k

-20k

-10k

10k

20k

30k

-30k

-2k 2k

TA = +25°C

TA = -40°C

TA = +85°C

PHASE RESPONSE

MAX21003 toc04

FREQUENCY (Hz)

PHASE (deg)

400300200100

-80

-70

-60

-50

-40

-30

-20

-10

-90

0 500

BW = 100Hz

BW = 10Hz

BP_LPFbit = 1

BW = 400Hz

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

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Pin Description

Pin Conguration

PIN NAME FUNCTION

1 VDD_IO Interface and Interrupt Pad Supply Voltage

2, 3, 16 N.C. NotInternallyConnected

4SCL_CLK SPI and I2C Clock. When in I2Cmode,theIOhasselectableantispikelteranddelaytoensure

correct hold time.

5GND Power-Supply Ground.

6SDA_SDI_O SPI In/Out Pin and I2C Serial Data. When in I2Cmode,theIOhasselectableantispikelterand

delay to ensure correct hold time.

7SA0_SDO SPI Serial Data Out or I2C Slave Address LSB

8 CS SPI Chip Select/Serial Interface Selection

9INT2 Second Interrupt Line

10 RESERVED MustBeConnectedtoGND

11 INT1 First Interrupt Line

12 DSYNC DataSynchronizationPin.UsedtowakeuptheMAX21003frompower-down/standbyand

synchronize data with GPS/camera.

13 RESERVED LeaveUnconnected

14 VDD AnalogPowerSupply.BypasstoGNDwitha0.1µFcapacitorandone1µFcapacitor.

15 VDD Must be tied to VDD in the application.

LGA

(3mm x 3mm)

MAX21003

TOP VIEW

VDDIO

N.C.

SCL_CLK

GND

SDA_SDI_O

SA0_SDO

RESERVED

DSYNC

INT1

678

16 15 14

N.C.

VDD

RESERVED

INT2

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

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Functional Diagram

Detailed Description

The MAX21003 is a low power, low voltage, small package

dual-axis angular rate sensor able to provide unprecedent-

ed accuracy and sensitivity over temperature and time.

TheICisalsotheindustry’sfirstgyroscopeavailableina

3mm x 3mm package and capable of working with a sup-

ply voltage as low as 1.71V.

It includes a sensing element and an IC interface that

provides the measured angular rate to the external world

through a digital interface (I2C/SPI).

The IC has a full scale of ±31.25/±62.5/±125/±250/±500/

±1000 dps for OIS. It measures rates with a user-select-

able bandwidth.

The IC is available in a 3mm x 3mm x 0.9 mm plastic land

grid array (LGA) package and operates over the -40°C to

+85°C temperature range.

Denitions

Power supply (V): This parameter defines the operating

DCpower-supplyvoltagerangeoftheMEMSgyroscope.

Although it is always a good practice to keep VDD clean

with minimum ripple, unlike most of the competitors, who

require an ultra-low noise, low-dropout regulator to power

theMEMSgyroscope,theMAX21003cannotonlyoperate

at 1.71V, but that supply can also be provided by a switch-

ing regular to minimize the system power consumption.

Power-supply current (mA): This parameter defines the

typicalcurrentconsumptionwhentheMEMSgyroscope

is operating in normal mode.

Power-supply current in standby mode (mA): This

parameter defines the current consumption when the

MEMS gyroscope is in standby mode. To reduce power

consumption and have a faster turn-on time, in standby

mode only an appropriate subset of the sensor is turned off.

Power supply current in eco mode (mA): This param-

eter defines the current consumption when the MEMS

gyroscope is in a special mode named eco mode. Whilst

in eco mode, the MAX21003 significantly reduces the

power consumption at the price of a slightly higher rate

noise density.

Power-supply current in power-down mode (µA):

This parameter defines the current consumption when

the MEMS gyroscope is powered down. In this mode,

both the mechanical sensing structure and reading chain

are turned off. Users can configure the control register

through the I2C/SPI interface for this mode. Full access

A AFE

GYRO

SENSE

FILTERING

MAX21003

MEMS

REGISTERS

AND

FIFO

TIMER

SYNC

GYRO

DRIVE

CONTROL

AFE

INTERRUPTS

VDD

GND VDD_IO

RING

OSCILLATOR

DSYNC

AFE

SCL_CLK

SDA_SDI_O

SA0_SDO

SPI/I2C

SLAVE

INT1

INT2

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to the control registers through the I2C/SPI interface is

guaranteed also in power-down mode.

Full-scale range (dps): This parameter defines the mea-

surement range of the gyroscope in degrees per second

(dps). When the applied angular velocity is beyond the

full-scale range, the gyroscope output signal is saturated.

Zero-rate level (dps): This parameter defines the zero

rate level when there is no angular velocity applied to the

gyroscope.

Sensitivity (digit/dps): Sensitivity (digit/dps) is the rela-

tionship between 1 LSB and dps. It can be used to

convert a digital gyroscope’s measurement in LSBs to

angular velocity.

Sensitivity change vs. temperature (%): This parameter

defines the sensitivity change in percentage (%) over the

operating temperature range specified in the data sheet.

Zero-rate level change vs. temperature (dps): This

parameter defines the zero-rate level change in dps over

the operating temperature range.

Nonlinearity (% FS): This parameter defines the maxi-

mum error between the gyroscope‘s outputs and the best-

fit straight line in percentage with respect to the full-scale

(FS) range.

System bandwidth (Hz): This parameter defines the

frequency of the angular velocity signal from DC to the

built-in bandwidth (BW) that the gyroscopes can measure.

A dedicated register can be modified to adjust the gyro-

scope’sbandwidth.

Rate noise density (dps/√Hz): This parameter defines

the standard resolution that users can get from the gyro-

scopes outputs together with the BW parameter.

MAX21003 Architecture

The MAX21003 comprises the following key blocks and

functions:

● Dual-axis MEMS rate gyroscope sensor with 16-bit

ADCs and signal conditioning

● Primary I2C and SPI serial communications

interfaces

● Sensor data registers

● FIFO

● Synchronization

● Interrupt generators

● Digital output temperature sensor

● Self-test

Dual-Axis MEMS Gyroscope with 16-Bit ADCs and

Signal Conditioning

The IC consists of a single-drive vibratory MEMS gyro-

scope that detects rotations around the X and Z axes.

When the gyroscope rotates around any of the sensing

axes, the Coriolis Force determines a displacement,

which can be detected as a capacitive variation. The

resulting signal is then processed to produce a digital

stream proportional to the angular rate. The analog-to-

digital conversion uses 16-bit ADC converters. The gyro

full-scale range can be digitally programmed to ±31.25/±

62.5/±125/±250/±500/±1000 dps.

Interrupt Generators

The MAX21003 offers two completely independent inter-

rupt generators to ease the SW management of the inter-

rupt generated. For instance, one line could be used to

signalaDATA_READYeventwhilsttheotherlinemight

be used, for instance, to notify the completion of the inter-

nal startup sequence.

Interrupt functionality can be configured through the

Interrupt Configuration registers. Configurable items

include the INT pin level and duration, the clearing

method, as well as the required triggers for the interrupts.

The interrupt status can be read from the Interrupt Status

Registers. The event that has generated an interrupt is

availableintwoforms:latchedandunlatched.

Interrupt sources can be enabled/disabled and cleared indi-

vidually. The list of possible interrupt sources includes the

followingconditions:DATA_READY,FIFO_READY,FIFO_

THRESHOLD,FIFO_OVERRUN,RESTART,DSYNC.

The interrupt generation can also be configured as

latched, unlatched, or timed with programmable length.

When configured as latched, the interrupt can be cleared

by reading the corresponding status register (clear-on-

read) or by writing an appropriate mask to the status

Digital-Output Temperature Sensor

A digital output temperature sensor is used to measure

the IC die temperature. The readings from the ADC can

be accessed from the Sensor Data registers.

The temperature data is split over 2 bytes. For faster and

less accurate reading, accessing the MSB allows to read

the temperature data as an absolute value expressed in

Celsius degrees (°C). By reading the LSB, the accuracy

is greatly increased, up to 256 digit/°C.

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Power Modes

The IC features four power modes, allowing selecting the

appropriate tradeoff between power consumption, accu-

racy, and turn-on time.

The transition between power modes can be controlled

by software, by explicitly setting a power mode in the

Configuration register, or by enabling the automatic power

modetransitionbasedontheDSYNCpin.

Normal Mode

In normal mode, the IC is operational with minimum noise

level.

Eco Mode

The eco mode reduces power consumption with the same

sensor accuracy at the price of a higher rate noise density.

This unique feature can be activated with four ODRs:

25Hz,50Hz,100Hz,and200Hz.

Standby Mode

To reduce power consumption and have a shorter turn-on

time, the IC features a standby mode. In standby mode,

the IC does not generate data, as a significant portion of

the signal processing resources is turned off to save power.

Still, this mode enables a much quicker turn-on time.

Power-Down Mode

In power-down mode, the IC is configured to minimize the

power consumption. In power-down mode, registers can still

be read and written, but the gyroscope cannot generate new

data. Compared to the standby mode, it takes longer to acti-

vate the IC and to start collecting data from the gyroscope.

Digital Interfaces

The registers embedded inside the IC can be accessed

through both the I2C and SPI serial interfaces. The latter

can be SW-configured to operate either in 3-wire or 4-wire

interface mode.

The serial interfaces are mapped onto the same pins. To

select/exploit the I2C interface, CS line must be tied high

(i.e., connected to VDDIO).

I2C Interface

I2C is a two-wire interface comprised of the signals

serial data (SDA) and serial clock (SCL). In general, the

lines are open-drain and bidirectional. In a generalized

I2C interface implementation, attached devices can be

a master or a slave. The master device puts the slave

address on the bus, and the slave device with the match-

ing address acknowledges the master.

The IC always operates as a slave device when commu-

nicating to the system processor, which thus acts as the

master. SDA and SCL lines typically need pullup resistors

to VDDIO.Themaximumbusspeedis3.4MHz(I2CHS);

this reduces the amount of time the system processor is

kept busy in supporting the exchange of data.

The slave address of the IC is b101100X, which is 7 bits

long. The LSb of the 7-bit address is determined by the

logic level on pin SA0. This allows two MAX21003s to be

connected on the same I2C bus. When used in this con-

figuration, the address of one of the two devices should

Table 1. Power Modes

Table 2. Digital Interface Pin Description

Table 3. I2C Address

NAME DESCRIPTION

Normal Device is operational with maximum

performances.

Eco Device operates to reduce the average

current consumption.

Standby

In standby mode, the current consumption is

reduced by 50% with a shorter turn-on time

of 5ms.

Power-Down This is the minimum power consumption

mode, at the price of a longer turn-on time.

NAME DESCRIPTION

CS SPI enable and I2C/SPI mode selection

(1:I2Cmode,0:SPIenabled)

SCL/CLK

SPI and I2C clock. When in I2C mode, the IO

hasselectableanti-spikelteranddelayto

ensure correct hold time.

SDA/SDI/

SDO

SPI in/out pin and I2C serial data. When in

I2C mode, the IO has selectable anti-spike

lteranddelaytoensurecorrectholdtime.

SDO/SA0 SPI serial data out or I2C slave address LSB

I2C BASE

ADDRESS

SA0/SDO

PIN R/W BIT RESULTING

ADDRESS

0x2C (6 bit) 0 0 0xB0

0x2C 0 1 0xB1

0x2C 1 0 0xB2

0x2C 1 1 0xB3

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beb1011000(pinSA0_SD0isset tologic-low)andthe

addressoftheothershouldbeb1011001(pinSA0_SD0

is set to logic-high).

SPI Interface

TheIC’sSPIcanoperateupto20MHz,inboth3-wires

(half duplex) and 4-wires mode (full duplex).

ItisrecommendedtosettheI2C_DISABLEbitataddress

0x15 if the IC is used together with other SPI devices to

avoid the possibility to switch inadvertently into I2C mode

when traffic is detected with the CS unasserted.

The IC operates as an SPI slave device. Both the read

clock pulses, or in multiples of 8 in case of multiple read/

write bytes. Bit duration is the time between two falling

edgesofCLK.

Thefirstbit(bit0)startsatthefirstfallingedgeofCLK

after the falling edge of CS while the last bit (bit 15, bit 23,

etc.)startsatthelastfallingedgeofCLKjustbeforethe

rising edge of CS.

Bit 0: RWbit.When0,thedataDI[7:0]iswrittentothe

IC.When1,thedataDO[7:0]fromthedeviceisread.In

the latter case, the chip drives SDO at the start of bit 8.

Bit 1: MS bit. Depending on the configuration of

IF_PARITY,this bit caneitherbe used tooperate in

multi-addressing standard mode or to check the parity

with the register address.

If used as MS bit, when 1, the address remains

unchanged in multiple read/write commands. When 0,

the address is autoincremented in multiple read/write

commands.

Bits 2–7:AddressAD[5:0].Thisistheaddressfieldof

the indexed register.

Bits 8–15:DataDI[7:0](writemode).Thisisthedata

that is written to the device (MSb first).

Bits 8–15:DataDO[7:0](readmode).Thisisthedata

that is read from the device (MSb first).

SPI Half- and Full-Duplex Operation

The IC can be programmed to operate in half-duplex (a

bidirectional data pin) or full-duplex (one data-in and one

data-out pin) mode. The SPI master sets a register bit called

SPI_3_WIRE into ITF_OTP to 0 for full-duplex, and 1 for

half-duplex operation. Full duplex is the power-on default.

Full-Duplex Operation

The IC is put into full-duplex mode at power-up, or when

the SPI master clears the SPI_3_WIRE bit, the SPI

interface uses separate data pins, MOSI and MISO to

transfer data. Because of the separate data pins, bits can

be simultaneously clocked into and out of the IC. The IC

makes use of this feature by clocking out 8 output data

bits as the command byte is clocked in.

Reading from the SPI Slave Interface (MOSI)

The SPI master reads data from the IC slave interface

usingthefollowingsteps:

1) When CS is high, the IC is unselected and three-states

the MISO output.

2)After driving SCL_CLK to its inactive state, the SPI

master selects the IC by driving CS low.

3) The SPI master simultaneously clocks the command

byte into the IC The SPI Read command is performed

with 16 clock pulses. Multiple byte read command is

performed adding blocks of 8 clock pulses at the previ-

ous one.

Bit 0: READbit.Thevalueis1.

Bit 1: MS bit. When 1, do not increment address.

When 0, increment address in multiple reading.

Bits 2–7:addressAD[5:0].Thisistheaddressfieldof

the indexed register.

Bits 8–15:dataDO[7:0](readmode).Thisisthedata

that is read from the device (MSb first).

Bits 16–... : data DO[...–8]. Further data in multiple

byte reading.

4) After 16 clock cycles, the master can drive CS high to

deselect the IC, causing it to three-state its MISO out-

put. The falling edge of the clock puts the MSB of the

next data byte in the sequence on the MISO output.

5) By keeping CS low, the master clocks register data

bytesoutoftheICbycontinuingtosupplySCL_CLK

pulses (burst mode). The master terminates the trans-

fer by driving CS high. The master must ensure that

SCL_CLKisinitsinactivestateatthebeginningofthe

next access (when it drives CS low).

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Writing to the SPI Slave Interface (SDI)

The SPI master writes data to the IC slave interface

throughthefollowingsteps:

1) The SPI master sets the clock to its inactive state.

When CS is high, the master can drive the MOSI input.

2) The SPI master selects the IC by driving CS low.

3) The SPI master simultaneously clocks the command

byte into the IC. The SPI write command is performed

with 16 clock pulses. Multiple byte write command is

performed adding blocks of 8 clock pulses at the previ-

ous one.

Bit 0:WRITEbit.Thevalueis0.

Bit 1: MS bit. When 1, do not increment address,

when 0, increment address in multiple writing.

Bits 2–7:addressAD[5:0].Thisistheaddressfieldof

the indexed register.

Bits 8–15:dataDI[7:0](writemode).Thisisthedata

that is written inside the device (MSb first).

Bits 16–... :dataDI[...–8].Furtherdatainmultiplebyte

writing.

4) By keeping CS low, the master clocks data bytes into

theICbycontinuingtosupplySCL_CLKpulses(burst

mode). The master terminates the transfer by driving

CS high. The master must ensure that SCL_CLK is

inactive at the beginning of the next access (when it

drives CS low). In full-duplex mode, the IC outputs

data bits on MISO during the first 8 bits (the command

byte), and subsequently outputs zeros on MISO as the

SPI master clocks bytes into MOSI.

Half-Duplex Operation

WhentheSPImastersetsSPI_3_WIRE=1,theICisput

into half-duplex mode. In half-duplex mode, the IC three-

states its MISO pin and makes the MOSI pin bidirectional,

saving a pin in the SPI interface. The MISO pin can be

left unconnected in half-duplex operation. The SPI master

must operate the MOSI pin as bidirectional. It accesses a

ICregisterasfollows:theMOSImastersetstheclockto

its inactive state. While CS is high, the master can drive

the SDI pin to any value.

1) The SPI master selects the IC by driving CS low and

placing the first data bit (MSB) to write on the SDI

input.

2) The SPI master turns on its output driver and clocks the

command byte into the IC. The SPI read command is

performedwith16clockpulses:

Bit 0:READbit.Thevalueis1.

Bit 1: MS bit. When 1, do not increment address.

When 0, increment address in multiple readings.

Bit 2–7:AddressAD[5:0].Thisistheaddressfieldof

the indexed register.

Bit 8–15:dataDO[7:0](readmode).Thisisthedata

that is read from the device (MSb first). Multiple read

command is also available in 3-wire mode.

Sensor Data Registers

The sensor data registers contain the latest gyroscope

and temperature measurement data.

They are read-only registers and are accessed through

the serial interface. Data from these registers can be read

anytime.However,theinterruptfunctioncanbeusedto

determine when new data is available.

FIFO

The IC embeds a 256-slot of a 16-bit data FIFO for each

ofthethreeoutputchannels:yawandpitch.Thisallowsa

consistent power saving for the system since the host pro-

cessor does not need to continuously poll data from the

sensor, but it can wake up only when needed and burst

the significant data out from the FIFO. When configured in

Snapshot mode, it offers the ideal mechanism to capture

the data following a Rate Interrupt event.

Thisbuffercanworkaccordingtofourmainmodes:off,

normal, interrupt, and snapshot.

Both Normal and Interrupt modes can be optionally

configured to operate in overrun mode, depending on

whether, in case of buffer under-run, newer or older data

are lost.

Various FIFO status flags can be enabled to generate

interrupteventsonINT1/INT2pin.

FIFO Off Mode

Inthismode,theFIFOisturnedoff;dataarestoredonly

in the data registers and no data are available from the

FIFO if read.

When the FIFO is turned off, there are essentially two

options to use the device: synchronous and asynchro-

nous reading.

Synchronous Reading

In this mode, the processor reads the data set (e.g., 4

bytes for a 2 axes configuration) generated by the IC

everytimethatDATA_READYisset.Theprocessormust

read once and only once the data set in order to avoid

data inconsistencies.

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Benefits of using this approach include the perfect recon-

struction of the signal coming from the gyroscope and

minimum data traffic.

Asynchronous Reading

In this mode, the processor reads the data generated by

theICregardlessthestatusoftheDATA_READYflag.To

minimize the error caused by different samples being read

a different number of times, the access frequency to be

used must be much higher than the selected ODR (e.g.,

10x). This approach normally requires a much higher BW.

FIFO Normal Mode

Overrun = false

● FIFO is turned on.

● FIFO is filled with the data at the selected output

data rate (ODR).

● When FIFO is full, an interrupt can be generated.

● When FIFO is full, all the new incoming data is dis-

charged. Reading only a subset of the data already

stored into the FIFO keeps locked the possibility

for new data to be written.

● Only if all the data are read, the FIFO restarts sav-

ing data.

● If communication speed is high, data loss can be

prevented.

● To prevent a FIFO-full condition, the required con-

dition is to complete the reading of the data set

beforethenextDATA_READYoccurs.

● If this condition is not guaranteed, data can be lost.

Figure 1. FIFO Normal Mode, Overrun = False

255

THRESHOLD THRESHOL

HRESHOLD

255

LEVEL INCREMENTS WITH NEW

SAMPLES STORED AND DECREMENTS

WITH NEW READINGS.

FIFO_OVTHOLD INTERRUPT

GENERATED.

FIFO_FULL INTERRUPT GENERATED.

NO NEW DATA STORED UNTIL

THE ENTIRE FIFO IS READ.

(WP-RP)

LEVEL

(WP-RP)

LEVEL

(WP-RP)

LEVEL

255

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Overrun = true

● FIFO is turned on.

● FIFO is filled with the data at the selected ODR.

● When FIFO is full, an interrupt can be generated.

● When FIFO is full, the oldest data is overwritten-

with the new ones.

● If communication speed is high, data integrity can

be preserved.

● TopreventaDATA_LOSTcondition,therequired

condition is to complete the reading of the data set

beforethenextDATA_READYoccurs.

● If this condition is not guaranteed, data can be

overwritten.

● When an overrun condition occurs the reading

pointer is forced to writing pointer -1 to ensure only

older data are discarded and newer data have a

chance to be read.

Interrupt Mode

Overrun = false

● FIFO is initially disabled. Data are stored only in

the data registers.

● Whenarateinterrupt(eitherORorAND)isgener-

ated, the FIFO is turned on automatically. It stores

the data at the selected ODR.

● When FIFO is full, all the new incoming data is dis-

charged. Reading only a subset of the data already

stored into the FIFO keeps locked the possibility

for new data to be written.

● Only if all the data are read, the FIFO restarts sav-

ing data.

● If communication speed is high, data loss can be

prevented.

● To prevent a FIFO-full condition, the required con-

dition is to complete the reading of the data set

beforethenextDATA_READYoccurs.

● If this condition is not guaranteed, data can be lost.

Figure 2. FIFO Normal Mode, Overrun = True

THRESHOLD

THRESHOLD THRESHOLD

FIFO USED AS

CIRCULAR BUFFER

FIFO USED AS

CIRCULAR BUFFER

FIFO USED AS

CIRCULAR BUFFER

WP-RP INCREMENTS WITH NEW

SAMPLES STORED AND DECREMENTS

WITH NEW READINGS.

FIFO_OVTHOLD INTERRUPT

GENERATED.

FIFO_FULL INTERRUPT GENERATED.

NEW INCOMING DATA WOULD

OVERWRITE THE OLDER ONES.

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Figure 3. FIFO Interrupt Mode, Overrun = False

THRESHOLD THRESHOLD THRESHOLD

LEVEL

MAX

(WP-RP)

LEVEL

(WP-RP)

LEVEL

(WP-RP)

LEVEL

MAX MAX

FIFO INITIALLY OFF.

WHEN THE

PROGRAMMED RATE

INTERRUPT OCCURS,

TURN FIFO ON.

LEVEL INCREMENTS WITH NEW

SAMPLES STORED AND DECREMENTS

WITH NEW READINGS.

FIFO_OVTHOLD INTERRUPT

GENERATED.

FIFO_FULL INTERRUPT GENERATED.

NO NEW DATA STORED UNTIL THE

ENTIRE FIFO IS READ.

MAX

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Figure 4. FIFO Interrupt Mode, Overrun = True

Overrun = true

● FIFO is initially disabled. Data are stored only in

the data registers.

● WhenaRateInterrupt(eitherORorAND)is

generated, the FIFO is turned on automatically. It

stores the data at the selected ODR.

● When FIFO is full, an interrupt can be generated.

● When FIFO is full, the oldest data is overwritten

with the new ones.

● If communication speed is high, data integrity can

be preserved.

● InordertopreventaDATA_LOSTcondition,the

required condition is to complete the reading of the

datasetbeforethenextDATA_READYoccurs.

● If this condition is not guaranteed, data can be

overwritten.

● When an overrun condition occurs, the reading

pointer is forced to writing pointer -1 to ensure only

older data are discarded and newer data have a

chance to be read.

THRESHOLD THRESHOLD

FIFO INITIALLY OFF.

WHEN THE

PROGRAMMED RATE

INTERRUPT OCCURS,

TURN FIFO ON.

LEVEL

MAX

WP = RP

THRESHOLD

WP-RP INCREMENTS WITH NEW

SAMPLES STORED AND DECREMENTS

WITH NEW READINGS.

FIFO_OVTHOLD INTERRUPT

GENERATED.

FIFO_FULL INTERRUPT GENERATED.

NEW INCOMING DATA WOULD

OVERWRITE THE OLDER ONES.

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Figure 5. FIFO Snapshot Mode

Snapshot Mode

● FIFO is initially in normal mode with overrun

enabled.

● WhenaRateInterrupt(eitherORorAND)isgen-

erated, the FIFO switches automatically to not-

overrun mode. It stores the data at the selected

ODR until the FIFO becomes full.

● When FIFO is full, an interrupt can be generated.

● When FIFO is full, all the new incoming data is dis-

charged. Reading only a subset of the data already

stored into the FIFO keeps locked the possibility

for new data to be written.

● Only if all the data are read the FIFO restarts sav-

ing data.

● If communication speed is high, data loss can be

prevented.

● TopreventaFIFO_FULLcondition,therequired

condition is to complete the reading of the data set

beforethenextDATA_READYoccurs.

● If this condition is not guaranteed, data can be lost.

THRESHOLD

THRESHOLD THRESHOLD

MAX

FIFO USED AS

CIRCULAR BUFFER

FIFO USED AS

CIRCULAR BUFFER

FIFO USED AS

CIRCULAR BUFFER

MAX

THRESHOLD

MAX

THRESHOLD

SNAPSHOT CAPTURED

RATE INTERRUPT

(WP-RP)

LEVEL

(WP-RP)

LEVEL

(WP-RP)

LEVEL

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Bias Instability and Angular Random Walk

Bias instability is a critical performance parameter for

gyroscopes. The IC provides a typical bias instability of

4°/houroneachaxisandanARWof0.45°/√hour,mea-

sured using the Allan Variance method.

Data Synchronization

The DSYNC pin enables a number of synchronization

options.

Wake-Up Feature

TheDSYNCpincanbeusedtowake-uptheICfromthe

power-down or suspend mode. Repeatedly changing

DSYNCfromactivetonotactiveandvice-versacanbe

used to control the power mode of the MAX21003 using

an external controlling device, be it a microprocessor,

another sensor or a different kind of device.

DSYNCcan beconfigured toactiveeitherHighorLow

and on either edge or level. This feature is controlled by a

specificbitintheDSYNC_CFGregister.

Data Capture Feature

AnotherwaytousetheDSYNCpinisasdatacapturetrig-

ger. The IC can be configured to stop generating data until

a given edge occur on DSYNC. Once the programmed

active edge occurs, the IC collects as many data as speci-

fiedintheDSYNC_CNTregister.

DSYNC Mapping on Data

DSYNCcanalsobeoptionallymappedontotheLSBof

the sensor data to perform synchronization afterwards.

The mapping occurs on every enabled axis of the gyro-

scope. This feature is controlled by a specific bit in the

DSYNC_CFGregister.

DSYNC Interrupt Generation

TheDSYNCpincanalsobeusedasaninterruptsource

to determine a different kind of data synchronization

based on the software management performed by an

external processor.

The DSYNC-based wake-up, data capture, data map-

ping, and interrupt generation features can be combined

together.

Unique Serial Number

EachICisuniquelyidentifiedby48bitsthatcanbeused

to track the history of the sample, including manufactur-

ing, assembly, and testing information.

Revision ID

The IC has a register used to identify the revision ID

of the device and to identify the specific part number.

Eventhoughdifferentpartnumbersmaysharethesame

WHO_AM_Ivalue,theywouldstillbeidentifiedbymeans

of different Revision ID values.

Clocking

The on-chip PLL locked to the gyroscope allows maintain-

ing the ODR within 2.5%.

Self-Test

For digital gyroscopes, there are two dedicated bits in a

control register to enable the self-test. This feature can be

used to verify if the gyroscope is working properly with-

out physically rotating the gyroscope. That may be used

either before or after it is assembled on a PCB. If the gyro-

scope’soutputsarewithinthespecifiedself-testvaluesin

the data sheet, then the gyroscope is working properly.

Therefore, the self-test feature is an important consider-

ationinauser’send-productmassproductionline.

The embedded self-test in Maxim’s 3-axis digital gyro-

scope is an additional key feature that allows the gyro-

scope to be tested during final product assembly without

requiring physical device movement.

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Table 4. Common Bank

The register file is organized per banks. On the common

bank are mapped addresses from 0x20 to 0x3F and

these registers are always available. It is possible to map

on addresses 0x00 to 0x1F two different user banks by

properly programming address 0x21. The purpose of this

structure is to limit the management of the register map

addresses in the 0x00 to 0x3F range even though the

number of physical registers is in excess of 64.

Common Bank

The common is the bank whose locations are always

available regardless the register bank selection.

This bank contains all the registers most commonly used,

including data registers and the FIFO data.

NAME REGISTER

ADDRESS TYPE DEFAULT VALUE COMMENT

WHO_AM_I 0x20 R 1011 0001 Device ID

BANK_SELECT 0x21 R/W 0000 0000 Register bank selection

SYSTEM_STATUS 0x22 R 0000 0000 System Status register

GYRO_X_H 0x23 R Data Bits[15:8]ofXmeasurement

GYRO_X_L 0x24 R Data Bits[07:0]ofXmeasurement

GYRO_Z_H 0x25 R Data Bits[15:8]ofZmeasurement

GYRO_Z_L 0x26 R Data Bits[07:0]ofZmeasurement

RFU 0x27 R

RFU 0x28 R

TEMP_H 0x29 R Data Bits[15:8]ofTmeasurement

TEMP_L 0x2A R Data Bits[07:8]ofTmeasurement

RFU 0x2B R 0000 0000

RFU 0x2C R 0000 0000

RFU 0x2D R 0000 0000

RFU 0x2E R 0000 0000

RFU 0x2F R 0000 0000

RFU 0x30 R 0000 0000

RFU 0x31 R 0000 0000

RFU 0x32 R 0000 0000

RFU 0x33 R 0000 0000

RFU 0x34 R 0000 0000

RFU 0x35 R 0000 0000

RFU 0x36 R 0000 0000

RFU 0x37 R 0000 0000

RFU 0x38 R 0000 0000

RFU 0x39 R 0000 0000

RFU 0x3A R 0000 0000

HP_RST 0x3B RW 0000 0000 Highpasslterreset

FIFO_COUNT 0x3C R 0000 0000 Available FIFO samples for data set

FIFO_STATUS 0x3D R 0000 0000 FIFOstatusags

FIFO_DATA 0x3E R Data FIFO data to be read in burst mode

PAR_RST 0x3F W and reset 0000 0000 Parity reset (reset on write)

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User Bank 0

Userbank0istheregisterusedtoconfiguremostofthefeaturesoftheIC,withtheexceptionoftheinterrupts,which

are part of the user bank 1.

Table 5. User Bank 0

NAME REGISTER

ADDRESS TYPE DEFAULT VALUE COMMENT

POWER_CFG 0x00 RW 0000 0111 Powermodeconguration

SENSE_CFG1 0x01 RW 0010 1000 Senseconguration:LPandOIS

SENSE_CFG2 0x02 RW 0010 0011 Senseconguration:ODR

SENSE_CFG3 0x03 RW 0000 0000 Senseconguration:HP

RFU 0x04 R 0000 0000

RFU 0x05 R 0000 0000

RFU 0x06 R 0000 0000

RFU 0x07 R 0000 0000

RFU 0x08 R 0000 0000

RFU 0x09 R 0000 0000

RFU 0x0A R 0000 0000

RFU 0x0B R 0000 0000

RFU 0x0C R 0000 0000

RFU 0x0D R 0000 0000

RFU 0x0E R 0000 0000

RFU 0x0F R 0000 0000

RFU 0x10 R 0000 0000

RFU 0x11 R 0000 0000

RFU 0x12 R 0000 0000

DR_CFG 0x13 RW 0000 0001 Datareadyconguration

IO_CFG 0x14 RW 0000 0000 Input/outputconguration

I2C_CFG 0x15 RW 0000 0100 I2Cconguration

ITF_OTP 0x16 RW 0000 0000 InterfaceandOTPconguration

FIFO_TH 0x17 RW 0000 0000 FIFOthresholdconguration

FIFO_CFG 0x18 RW 0000 0000 FIFOmodeconguration

RFU 0x19 R 0000 0000

DSYNC_CFG 0x1A R 0000 0000 DATA_SYNCconguration

DSYNC_CNT 0x1B R 0000 0000 DATA_SYNCcounter

RFU 0x1C R 0000 0000

RFU 0x1D R 0000 0000

RFU 0x1E R 0000 0000

RFU 0x1F R 0000 0000

MAX21003 Ultra-Accurate, Low Power,

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│

User Bank 1

UserBank1isprimarilydevotedtotheconfigurationoftheinterrupts.Italsocontainstheuniqueserialnumber.

Table 6. User Bank 1

NAME REGISTER

ADDRESS TYPE DEFAULT VALUE COMMENT

INT_REF_X 0x00 RW 0000 0000 Interrupt reference for X axis

INT_REF_Z 0x01 RW 0000 0000 Interrupt reference for Z axis

RFU 0x02 0000 0000

INT_DEB_X 0x03 RW 0000 0000 Interrupt debounce, X

INT_DEB_Z 0x04 RW 0000 0000 Interrupt debounce, Z

RFU 0x05 0000 0000

INT_MSK_X 0x06 RW 0000 0000 Interrupt mask, X axis zones

INT_MSK_Z 0x07 RW 0000 0000 Interrupt mask, Z axis zones

RFU 0x08 0000 0000

INT_MASK_AO 0x09 RW 0000 0000 Interruptmasks,AND/OR

INT_CFG1 0x0A RW 0000 0000 Interruptconguration1

INT_CFG2 0x0B RW 0010 0100 Interruptconguration2

INT_TMO 0x0C RW 0000 0000 Interrupt timeout

INT_STS_UL 0x0D R 0000 0000 Interrupt sources, unlatched

INT1_STS 0x0E R 0000 0000 Interrupt 1 status, latched

INT2_STS 0x0F R 0000 0000 Interrupt 2 status, latched

INT1_MSK 0x10 RW 1000 0000 Interrupt 1 mask

INT2_MSK 0x11 RW 0000 0010 Interrupt 2 mask

RFU 0x12 R 0000 0000

RFU 0x13 R 0000 0000

RFU 0x14 R 0000 0000

RFU 0x15 R 0000 0000

RFU 0x16 R 0000 0000

RFU 0x17 R 0000 0000

RFU 0x18 R 0000 0000

RFU 0x19 R 0000 0000

SERIAL_0 0x1A R Variable Uniqueserialnumber,byte0

SERIAL_1 0x1B R Variable Uniqueserialnumber,byte1

SERIAL_2 0x1C R Variable Uniqueserialnumber,byte2

SERIAL_3 0x1D R Variable Uniqueserialnumber,byte3

SERIAL_4 0x1E R Variable Uniqueserialnumber,byte4

SERIAL_5 0x1F R Variable Uniqueserialnumber,byte5

MAX21003 Ultra-Accurate, Low Power,

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Orientation of Axes

The diagram below shows the orientation of the axis of

sensitivityandthepolarityofrotation.Notethepin1iden-

tifier (U) in Figure 6.

Soldering Information

Visit www.maximintegrated.com/21000.related for solder-

ing recommendations.

Application Notes

Bypass VDD and VDDIOtothegroundplanewith0.1µF

ceramic chip capacitors on each pin as close as possible

to the IC to minimize parasitic inductance.

Depending on the specific application, add at least one

bulk 1µF decoupling capacitor to VDD and VDDIO per

PCB. For best performance, bring a VDD power line in on

the analog interface side of the IC and an VDDIO power

line from the digital interface side of the device.

Table 7. Bill of Materials for External

Components

Figure 6. Orientation of Axis

COMPONENT LABEL SPECIFICATION QUANTITY

VDD/VDDIO

bypass capacitor C1 Ceramic, X7R,

0.1µF±10%,4V 1

VDD/VDDIO

bypass capacitor C2 Ceramic, X7R,

1µF±10%,4V 1

ΩZ

ΩX

MAX21003 Ultra-Accurate, Low Power,

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Ordering Information

Chip Information

PROCESS:BiCMOS

+Denotes lead(Pb)-free/RoHS-compliant package.

T = Tape and reel.

Package Information

For the latest package outline information and land patterns

(footprints), go to www.maximintegrated.com/packages.Note

thata“+”,“#”,or“-”inthepackagecodeindicatesRoHSstatus

only. Package drawings may show a different suffix character, but

thedrawingpertainstothepackageregardlessofRoHSstatus.

Typical Application Circuit

PART TEMP RANGE PIN-PACKAGE

MAX21003+ -40°C to +85°C 16 LGA

MAX21003+T -40°C to +85°C 16 LGA

A AFE

GYRO

SENSE

FILTERING

MAX21003

REGISTERS

AND

FIFO

TIMER

SYNC

GYRO

DRIVE

CONTROL

AFE

INTERRUPTS

RING

OSCILLATOR

DSYNC

AFE

SCL_CLK

SDA_SDI_O

SA0_SDO

SPI/I2C

SLAVE

INT1

INT2

100nF

VDD

GND VDD_IO

PMIC

MEMS

1µF

MAX21003 Ultra-Accurate, Low Power,

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│

Package Information

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.Notethata“+”,

“#”,or“-”inthepackagecodeindicatesRoHSstatusonly.Packagedrawingsmayshowadifferentsuffixcharacter,butthedrawing

pertainstothepackageregardlessofRoHSstatus.

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

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Package Information (continued)

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.Notethata“+”,

“#”,or“-”inthepackagecodeindicatesRoHSstatusonly.Packagedrawingsmayshowadifferentsuffixcharacter,butthedrawing

pertainstothepackageregardlessofRoHSstatus.

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses

are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)

shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.

MAX21003 Ultra-Accurate, Low Power,

Dual-Axis Digital Output Gyroscope

│

Revision History

REVISION

NUMBER

REVISION

DATE DESCRIPTION PAGES

CHANGED

0 6/13 Initial release —

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