1. General description
The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device
features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the st ate of
their corresponding Dn inputs that meet the set-up and hold time requirements on the
LOW-to- HIGH clock (CP) transition. A LOW on MR forces the outpu ts LOW inde pendently
of clock and data inputs. Inputs include clamp diodes. This enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Input levels:
For 74HC273: CMOS level
For 74HCT273: TTL level
Common clock and master reset
Eight positive edge-triggered D-type flip-flops
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
3. Ordering information
74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Rev. 5 — 26 February 2016 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC273D 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
74HCT273D
74HC273DB 40 C to +125 C SSOP20 plastic shrink small outlin e package; 20 leads; body width
5.3 mm SOT339-1
74HCT273DB
74HC273PW 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body
width 4.4 mm SOT360-1
74HCT273PW
74HC273BQ 40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 20 terminals;
body 2.5 4.5 0.85 mm
SOT764-1
74HCT273BQ
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 2 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
4. Functional diagram
Fig 1. Functional diagram Fig 2. Logic symbol Fig 3. IEC logic symbol
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74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 3 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Fig 4. Logic diagra m
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74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 4 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration SO20, SSOP20 and
TSSOP20 Fig 6. Pin configuration DHVQFN20
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Table 2. Pin de scription
Symbol Pin Description
MR 1 master reset input (active LOW)
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 2, 5, 6, 9, 12, 15, 16, 19 flip-flop output
D0, D1, D2, D3, D4, D5, D6, D7 3, 4, 7, 8, 13, 14, 17, 18 data input
GND 10 ground (0 V)
CP 11 clock input (LOW-to-HIGH, edge-triggered)
VCC 20 supply voltage
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 5 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
6. Functional description
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;
X = don’t care;
= LOW-to-HIGH clock transition.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO20 package: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN20 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
Table 3. Function table[1]
Operating modes Inputs Outputs
MR CP Dn Qn
reset (clear) L X X L
load “1” H hH
load “0” H lL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI>V
CC +0.5V [1] -20 mA
IOK output clamping current VO < 0.5 V or VO>V
CC +0.5V [1] -20 mA
IOoutput current 0.5 V < VO< VCC +0.5V - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO20, SSOP20, TSSOP20 and
DHVQFN20 package [2] -500mW
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 6 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions 74HC273 74HCT273 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0-V
CC V
VOoutput voltage 0 - VCC 0-V
CC V
Tamb ambient temperature 40 - +125 40 - +125 C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74HC273
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 1.2 - 1 .5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4 .2 - 4.2 - V
VIL LOW-level
input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI = VCC or GND;
VCC =6.0V --0.1 - 1-1A
ICC supply current VI = VCC or GND; IO=0A;
VCC =6.0V - - 8.0 - 80 - 160 A
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 7 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
10. Dynamic characteristics
CIinput
capacitance -3.5- - - - -pF
74HCT273
VIH HIGH-level
input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level
input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage VI = VIH or VIL; VCC = 4.5 V
IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V
IO = 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level
output voltage VI = VIH or VIL; VCC = 4.5 V
IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 5.2 mA; VCC = 5.5 V - 0.15 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI = VCC or GND;
VCC =5.5V --0.1 - 1-1A
ICC supply current VI = VCC or GND; IO=0A;
VCC =5.5V - - 8.0 - 80 - 160 A
ICC additional
supply current per input pin;
VI=V
CC 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
MR input - 100 360 - 450 - 490 A
CP input - 175 630 - 787.5 - 857.5 A
Dn input - 15 54 - 67.5 - 73.5 A
CIinput
capacitance -3.5- - - - -pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
Table 7. Dynamic characteristics
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74HC273
tpd propagation
delay CP to Qn; see Figure 7 [1]
VCC = 2.0 V - 41 150 - 185 - 225 ns
VCC = 4.5 V - 15 3 0 - 37 - 45 ns
VCC = 5.0 V; CL=15pF - 15 - - - - - ns
VCC = 6.0 V - 13 2 6 - 31 - 38 ns
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 8 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
tPHL HIGH to LOW
propagation
delay
MR to Qn; see Figure 8
VCC = 2.0 V - 44 150 - 185 - 225 ns
VCC = 4.5 V - 16 3 0 - 37 - 45 ns
VCC = 5.0 V; CL=15pF - 15 - - - - - ns
VCC = 6.0 V - 14 2 6 - 31 - 38 ns
tttransition time Qn output; see Figure 7 [2]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 15 - 19 ns
tWpulse width CP input HIGH or LOW;
see Figure 7
VCC = 2.0 V 80 14 - 100 - 120 - ns
VCC = 4.5 V 16 5 - 20 - 24 - ns
VCC = 6.0 V 14 4 - 17 - 20 - ns
MR input LOW;
see Figure 8
VCC = 2.0 V 60 17 - 75 - 90 - ns
VCC = 4.5 V 12 6 - 15 - 18 - ns
VCC = 6.0 V 10 5 - 13 - 15 - ns
trec recovery time MR to CP; see Figure 8
VCC = 2.0 V 50 6 - 65 - 75 - ns
VCC = 4.5 V 10 2 - 13 - 15 - ns
VCC = 6.0 V 9 2- 11 - 13 - ns
tsu set-up time Dn to CP; see Figure 9
VCC = 2.0 V 60 11 - 75 - 90 - ns
VCC = 4.5 V 12 4 - 15 - 18 - ns
VCC = 6.0 V 10 3 - 13 - 15 - ns
thhold time Dn to CP; see Figure 9
VCC = 2.0 V 3 6- 3 - 3 - ns
VCC = 4.5 V 3 2- 3 - 3 - ns
VCC = 6.0 V 3 2- 3 - 3 - ns
fmax maximum
frequency CP input; see Figure 7
VCC = 2.0 V 6 20.6 - 4.8 - 4 - MHz
VCC = 4.5 V 30 103 - 24 - 20 - MHz
VCC = 5.0 V; CL=15pF - 66 - - - - - MHz
VCC = 6.0 V 35 122 - 28 - 24 - MHz
CPD power
dissipation
capacitance
per package;
VI=GNDtoV
CC
[3] -20- - - - - pF
Table 7. Dynamic characteristics …continued
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 9 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
(CL VCC2 fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
74HCT273
tpd propagation
delay CP to Qn; see Figure 7 [1]
VCC = 4.5 V - 16 3 0 - 38 - 45 ns
VCC = 5.0 V; CL=15pF - 15 - - - - - ns
tPHL HIGH to LOW
propagation
delay
MR to Qn; see Figure 8
VCC = 4.5 V - 23 3 4 - 43 - 51 ns
VCC = 5.0 V; CL=15pF - 20 - - - - - ns
tttransition time Qn output; see Figure 7 [2]
VCC = 4.5 V - 7 15 - 19 - 22 ns
tWpulse width CP input; see Figure 7
VCC = 4.5 V 16 9 - 20 - 24 - ns
MR input LOW;
see Figure 8
VCC = 4.5 V 16 8 - 20 - 24 - ns
trec recovery time MR to CP; see Figure 8
VCC = 4.5 V 10 2 - 13 - 15 - ns
tsu set-up time Dn to CP; see Figure 9
VCC = 4.5 V 12 5 - 15 - 18 - ns
thhold time Dn to CP; see Figure 9
VCC = 4.5 V 3 4- 3 - 3 - ns
fmax maximum
frequency CP input; see Figure 7
VCC = 4.5 V 30 56 - 24 - 20 - MHz
VCC = 5.0 V; CL=15pF - 36 - - - - - MHz
CPD power
dissipation
capacitance
per package;
VI=GNDtoV
CC 1.5 V [3] -23- - - - - pF
Table 7. Dynamic characteristics …continued
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 10 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
11. Waveforms
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. Propagation delay clock input (CP) to output (Qn), clock (CP) pulse width, output transition time and the
maximum clock pulse freq uency
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VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8. Propagation delay master reset (MR) to outp ut (Qn), pulse width master reset (MR) and recovery time
master reset (MR) to clock (CP)
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74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 11 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 9. Dat a set-u p an d hold times data input (Dn)
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Type Input Output
VIVMVM
74HC273 VCC 0.5VCC 0.5VCC
74HCT273 3 V 1.3 V 1.3 V
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 12 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch
Fig 10. Test circuit for measuring switching times
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Type Input Load S1 position
VItr, tfCLRLtPHL, tPLH
74HC273 VCC 6ns 15pF, 50 pF 1kopen
74HCT273 3V 6ns 15pF, 50 pF 1kopen
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 13 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
12. Package outline
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74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 14 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Fig 12. Package outline SOT339-1 (SSOP20)
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74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 15 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Fig 13. Package outline SOT360-1 (TSSOP20)
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74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 16 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Fig 14. Package outline SOT764-1 (DHVQFN20)
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74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 17 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT273 v.5 20160226 Product data sheet - 74HC_HCT273 v.4
Modifications: •Type numbers 74HC273N and 74HCT273N (SOT146-1) removed.
74HC_HCT273 v.4 20130610 Product data sheet - 74HC_HCT273 v.3
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
74HC_HCT273 v.3 20060124 Product data sheet - 74HC_HCT273_CNV v.2
74HC_HCT273_CNV v.2 19970827 Product specification - -
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 18 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulat ive liability toward s
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, lif e-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for t he customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the applica tion or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 5 — 26 February 2016 19 of 20
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qual ified,
the product is not suitable for automo tive use. It i s neit her qualif ied nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such au tomotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconduct ors for an y
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
© NXP Semiconductors N.V. 2016. All rig hts reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 26 February 2016
Document identifier: 74HC_HCT273
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Functional description . . . . . . . . . . . . . . . . . . . 5
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Recommended operating conditions. . . . . . . . 6
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 17
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
16 Contact information. . . . . . . . . . . . . . . . . . . . . 19
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
