CXA1124BS/BQ CXA1534S/Q US Audio Multiplexing Decoder IC Description CXA1124/CXA1534 is an IC designed for the MTS decoding systems. This device contains a stereo signal demodulator, a SAP (Second Audio Program) signal demodulator and a dbx-TV noise reduction decoder, The Main 100% reference input level of the CXA1124 (CXA1534) is 245mVrms (100mVrms). Features * All functions of the MTS decoding system included on a chip * Minimized external components using integrated active filtering technique * Reduced adjustment points using optimized filter characteristics, a quasi-sine wave stereo demodulator and a SAP demodulator * Has a sub output which allows independent setting of a mode * Allows automatic changeover between ON and OFF in the SAP mode when SAP broadcasting is OFF * Adjustment-free pilot cancel circuit * Wide operating voltage range (4.7 to 10V) Structure Bipolar silicon monolithic IC CXA1124BS/CXA1534S 42 pin SDIP (Plastic) CXA1124BS 42 pin SDIP (Plastic) CXA1124BQ/CXA1534Q 48 pin QFP (Plastic) Absolute Maximum Ratings (Ta = 25C) * Supply voltage VCC 12 V * LED drive current IO 25 (max.) mA * Allowable power dissipation PD 2200 (42pin SDIP) mW 600 (48pin QFP) mW * Operating temperature Topr -20 to +75 C * Storage temperature Tstg -55 to +150 C Operating Conditions Supply voltage VCC 4.7 to 10.0 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E91402C79 CXA1124BS/BQ, CXA1534S/Q LFLT VCO VE VE OUT VCA IN VCA TC VCA WGT VE TC MAIN IN VE WGT 32 31 30 29 28 27 26 25 24 23 22 ST IN VCC GND 36 35 1/4 34 33 I TIME SUB OUT MA OUT PL INT1 38 37 40 39 VRS 42 41 PL INT2 PC INT2 PC INT1 SAP BPF CXA1124BS COMP IN Block Diagram and Pin Configuration 1/2 NR.SN LFLT DE.EN VE LPF LPF LPF VCC/2 DE.EN LPF HPF RMS DET LPF RMS DET ST. IND SAP VCO BPF VCA LPF BPF MODE DISPLAY 21 NR BPF SAP IN VCA TC 20 VCA IN S OUT L OUT 17 18 19 VE OUT E SAP 16 VE I SAP I VCO MUTE 15 I LPF FSAP 14 GND 13 VCC 11 12 SMD FMONO 10 VRS 9 M2 M1 8 I TIME VC SAP 7 SAP OUT LED G 6 SUB OUT 5 MA OUT 4 PL INT2 3 MATRIX NC CXA1124BQ 2 SAP LED SAP TC 1 ST LED IREF R OUT SAP IND 36 35 34 33 32 31 30 29 28 27 26 25 VCC/2 PL INT1 37 24 VCA WGT 23 VE TC COMP IN 38 LFLT VCO 1/4 1/2 PC INT2 39 22 ST IN FLT LPF PC INT1 40 21 LPF De-Em SAP BPF 41 LPF De-Em VE VCA RMS DET RMS DET MAIN IN 20 VE WGT ST IND HPF 19 GND1 NC 42 SAP VCO BPF LPF 18 SAP IN GND2 43 NOISE BPF SW LPF LPF SAP TC 44 17 NR BPF SAP IND ST LED 45 Matrix LED DRIVE SAP LED 46 16 S OUT 15 L OUT LED G 47 14 NC IREF Mode Display 13 R OUT 1 2 3 4 5 6 7 8 9 10 11 12 SAP OUT M1 M2 FMONO SMD FSAP NC MUTE I SAP I LPF I VCO E SAP VC SAP 48 -2- CXA1124BS/BQ, CXA1534S/Q Pin Description and Equivalent Circuit Pin No. SDIP QFP Symbol (Ta = 25C, VCC = 9V) Voltage (Typ.) Equivalent circuit Description VCC Sets the time constant of the SAP carrier detection circuit. 1 1 44 SAP TC 3.4V 8k 1k 10k 25A 12A GND VCC Drives LED when stereo broadcasting is on. Open collector output. 2 2 45 ST LED 0.2V 68k 15k LED G VCC 3 3 46 SAP LED 0.2V Drives LED when SAP broadcasting is on. 68k 15k LED G 4 47 GND of LED. LED G VCC 5 40k 5 48 VC SAP 4.5V 20k 20k 10k 50A GND Control pin of SAP VCO oscillation frequency. SAP VCO oscillating frequency can be varied by applying DC voltage to this pin. Normally a resistance or a variable resistance is connected. VCC 500 6 1 SAP OUT 4.5V Output pin of SAP FM detector. 6 147 500 GND -3- CXA1124BS/BQ, CXA1534S/Q Pin No. SDIP QFP Symbol Voltage (Typ.) Equivalent circuit 100k 7 2 M1 L: GND to 0.8V H: 2.0V to VCC Description VCC 100k Mode control switch pin. This pin is used in conjunction with M2 of Pin 8. 7 147 GND 100k 8 3 M2 L: GND to 0.8V H: 2.0V to VCC VCC 100k Mode control switch pin. This pin is used in conjunction with M1 of pin 7. 8 147 GND VCC 100k 9 4 FMONO L: GND to 0.8V M: 2.0V to VCC - 2.0 H: VCC - 0.5 to VCC Mode control switch pin. Has 3 ranges of input, sets forced monoral mode and also controls ST.LED. 147 9 GND VCC 100k 10 5 SMD L: GND to 0.8V H: 2.0V to VCC Mode control switch pin. Controls SOUT pin output. 147 10 GND VCC Mode control switch pin. This pin's control voltage is different from that of other mode control switch pins. 50k 11 6 FSAP L: GND H: VCC 100k 11 GND -4- CXA1124BS/BQ, CXA1534S/Q Pin No. SDIP QFP Symbol Voltage (Typ.) Equivalent circuit Description VCC 100k 12 8 MUTE L: GND to 0.8V H: 2.0V to VCC Mode control switch pin. By setting this pin to H level all outputs turn to mute. 147 12 GND VCC 30k 13 9 I SAP 1.3V 30k 13 147 11A Sets the reference current of SAP filters. By adjusting the current that flows into this pin the cut off frequency can be changed. GND VCC 30k 14 10 I LPF 1.3V 30k 14 147 11A Sets the reference current of stereo and dbx-TV NR filters. By adjusting the current that flows into this pin the respective cut off frequency can be changed. GND VCC 30k 15 11 I VCO 1.3V 30k 15 147 11A Sets the reference current of stereo VCO and SAP VCO. By adjusting the current that flows into this pin the respective oscillation frequency can be changed. GND VCC 16 12 E SAP 4.5V Inputs SAP signal from the external dbx-TV NR (option). 147 16 47k GND -5- CXA1124BS/BQ, CXA1534S/Q Pin No. SDIP QFP Symbol Voltage (Typ.) Equivalent circuit Description VCC 500 15k 17 13 R OUT 4.5V 17 Rch output pin. 147 500 GND VCC 500 15k 18 15 L OUT 4.5V 18 Lch output pin. 147 500 GND VCC Optional output pin. From this pin monaural or SAP (only when the external dbx-TV NR is connected) is output. 500 19 16 S OUT 4.5V 19 147 500 GND VCC 15k 20 17 NR BPF 4.5V 15k 20 Pin for the filter monitor of dbx-TV block. 147 9.7p 25p GND VCC 21 18 SAP IN 4.5V Inputs the signal from SAP OUT of pin 6. 147 21 47k GND -6- CXA1124BS/BQ, CXA1534S/Q Pin No. SDIP QFP Symbol Voltage (Typ.) Equivalent circuit Description VCC 500 22 20 VE WGT 4.5V Weighting pin of the variable de-emphasis control RMS value detection circuit. 22 147 500 GND VCC 23 21 MAIN IN 4.5V Inputs (L + R) signal from MAIN OUT of pin 36. 147 23 47k GND VCC 500 24 22 ST IN 4.5V 147 Inputs (L - R) signal from SUB OUT of pin 35. 24 47k GND VCC 1k 25 23 VE TC 2V 25 20k GND Determines the recovery time constant of the variable de-emphasis control RMS value detection circuit. By connecting a 3.3F capacitance, normal recovery time constant can be obtained. VCC 500 26 24 VCA WGT 4.5V Weighting pin of VCA control RMS value detection circuit. 26 147 500 GND -7- CXA1124BS/BQ, CXA1534S/Q Pin No. SDIP QFP Symbol Voltage (Typ.) Equivalent circuit Description VCC Determines the recovery time constant of VCA control RMS value detection circuit. By connecting a 10F capacitance, normal recovery time constant can be obtained. 1k 27 25 VCA TC 27 2V 20k GND VCC 47k VCA input pin. Through a coupling capacitor, input the variable de-emphasis output signal of pin 29. 20k 28 26 VCA IN 4.5V 28 GND VCC 500 10k 29 27 VE OUT 4.5V Variable de-emphasis output pin. 29 147 500 GND VCC 7.5k 30 28 VE 4.5V Variable de-emphasis integral pin. 30 147 1.25k GND 31 29 GND -- 19 GND1 GND -- 43 GND2 GND 32 30 VCC VCC 10k 33 31 VRS 4.5V 33 10k 26A GND -8- Reference potential pin of the signal. Voltage becomes half that of the supply voltage. CXA1124BS/BQ, CXA1534S/Q Pin No. Symbol Voltage (Typ.) Equivalent circuit Description SDIP QFP VCC 30k 34 32 I TIME 1.3V 30k 34 147 11A Input pin for the timing current of the RMS value detection. The timing current determines the normal time constant of the detection circuit and the variable de-emphasis characteristics. GND VCC 500 35 33 SUB OUT 4.5V 35 Output pin of L - R signal. 147 500 GND VCC 15k 36 34 MA OUT 4.5V 36 Output pin of L + R signal. 147 200A GND VCC 50A For stereo: 5.5V 37 35 45k 147 147 37 2.7k PL INT2 For monaural: 3.5V 2k GND Integral pin of the pilot cancel circuit loop filter. VCC 147 38 37 PL INT1 4.5V 38 30k 10A GND -9- CXA1124BS/BQ, CXA1534S/Q Pin No. SDIP QFP Symbol Voltage (Typ.) Equivalent circuit Description VCC 147 39 38 COMP IN 4.5V 39 1 / 2VCC 18A GND 50k Audio multiplex signals are input through this pin. VCC 147 40 39 PC INT2 4.5V 40 10k 10k 50A 2k GND Integral pin of the stereo block PLL loop filter. VCC 147 41 41 40 PC INT1 4.5V 30k 10A GND VCC 147 42 42 41 SAP BPF 4.5V SAP BPF monitor pin. 2k GND - 10 - CXA1124BS/BQ, CXA1534S/Q Electrical Characteristics (Unless otherwise specified, Ta = 25C, VCC = 9V, 0dB = 100% modulation level, FH = 15.734kHz) 100% modulation level Main (L + R) level = -10dBm (245mVrms) (Pre-Emphasis On) (Reference level) Sub (L - R) level = -4dBm (490mVrms) (dbx-TV OFF) Pilot level = -24.0dBm (49mVrms) SAP level = -14.4dBm (147mVrms) (10kHz peak deviation, dbx-TV OFF) The reference input levels of the CXA1534 (at Pin 39) are 1/2.45 times the equivalent values at the head of this page. The Main level is 100mVrms. Stereo section (Including operation supply voltage and consumption circuit) No. Item Symbol Condition Mode Input Output Others Min. Typ. Max. Unit 10.0 V 1 Operating supply voltage VCC -- -- -- No signal 4.7 2 Consumption current ICC ST. -- -- No signal 17 25 33.0 mA 3 Main output level Vmain ST. Pin 39 Main 1kHz, 0dB, Pin 17 75s, pre-emphasis Pin 18 ON -5.0 -4.0 -3.0 dBm 4 De-emphasis frequency response FCdeem ST. Pin 39 Main 5kHz, Pin 17 -10dB, 75s, Pin 18 pre-emphasis ON -1.0 0 1.0 dB 5 Main LPF frequency response FCmain ST. Pin 39 Main 12kHz, Pin 17 -20dB, 75s, Pin 18 pre-emphasis ON -3.0 -1.0 1.0 dB 6 Main distortion ratio THDm Main 1kHz, 0dB, Pin 17 75s, ST. Pin 39 Pin 18 pre-emphasis ON 15kHz LPF used -- 0.1 0.5 % 7 Main Max. output level Vmmax Main 1kHz, Pin 17 THD = 3%, ST. Pin 39 Pin 18 75s, pre-emphasis ON 2.0 9.0 -- dBm 8 Main noise Vnmain ST. -- -73 -65 dBm 9 Sub output level Vsub -- Pin 39 Pin 35 Sub 1kHz, 0dB -10.5 -9.0 -5.5 dBm FCsub -- Pin 39 Pin 35 Sub 12kHz, -10dB -3.0 -0.4 1.0 dB -- 0.1 1.0 % -2.0 6.0 -- -75 -65 dBm -- -53 -40 dBm -9.5 -6.5 -4.0 dB Sub LPF 10 frequency response -- Pin 17 No signal Pin 18 15kHz LPF used 11 Sub distortion ratio THDsub -- Pin 39 Pin 35 Sub 1kHz, 0dB, 15kHz LPF used 12 Sub Max. output level Vsmax -- Pin 39 Pin 35 Sub 1kHz, THD = 3% 13 Sub noise level Vsubn -- PCsub -- 14 Sub pilot cancel 15 Stereo On level THst -- -- Pin 35 No signal 15kHz LPF used Pilot: fH Pin 39 Pin 35 (-24dBm) fH BPF used Pin 39 -- Varies Pilot input. Tests the level where LED lights up. Turns Pin 9 (FMONO) to L or M. - 11 - dBm CXA1124BS/BQ, CXA1534S/Q SAP section No. Item 16 SAP output level Symbol Condition Mode Input Output Others Min. Typ. Max. Unit Vsap -- Pin 39 Pin 6 1kHz, 0dB -10.5 -9.4 -7.5 dBm -3.0 -0.6 +2.0 dB 17 SAP frequency characteristics FCsap -- Pin 39 Pin 6 10kHz, -10dB 18 SAP distortion ratio THDsap -- Pin 39 Pin 6 1kHz, 0dB, 15kHz LPF used -- 2.5 6.0 % VNsap -- Pin 39 Pin 6 Input 5fH (-14.4dBm) 15kHz LPF used -- -65 -40 dBm Pin 39 Varies SAP carrier (no demodulation) input level. Tests level where Pin 3 LED lights up. -14.0 -10.0 -7.0 dB 19 SAP noise level 20 SAP ON level THsap -- dbx-TV section Note) To test the dbx-TV timing current of other than pin 34 input pilot to COMP IN (Pin 39) and turn it to ST mode. Also, turn MAIN IN (Pin 23) open. No. Item Symbol Condition Mode Input Output Others Min. Typ. Max. Unit 4.5 dBm dbx-TV decode 21 characteristics 300Hz, -5dB Vdc-1 ST. Pin 24 Pin 17 Pin 18 300Hz, -17dBm 1.5 3.0 dbx-TV decode 22 characteristics 300Hz, -15dB Vdc-2 ST. Pin 24 Pin 17 Pin 18 300Hz, -27dBm -18.5 -17.0 -15.5 dBm dbx-TV decode 23 characteristics 300Hz, -30dB Vdc-3 ST. Pin 24 Pin 17 Pin 18 300Hz, -42dBm -48.5 -47.0 -45.5 dBm dbx-TV decode 24 characteristics 1kHz, 0dB Vdc-4 ST. Pin 24 Pin 17 Pin 18 1kHz, -12dBm -2.7 -0.7 +1.3 dbx-TV decode 25 characteristics 1kHz, -10dB Vdc-5 ST. Pin 24 Pin 17 Pin 18 1kHz, -22dBm -23.4 -21.4 -19.4 dBm dbx-TV decode 26 characteristics 1kHz, -20dB Vdc-6 ST. Pin 24 Pin 17 Pin 18 1kHz, -32dBm -43.6 -41.6 -39.6 dBm dbx-TV decode 27 characteristics 8kHz, 0dB Vdc-7 ST. Pin 24 Pin 17 Pin 18 8kHz, -12dBm -8.3 -5.8 -3.3 - 12 - dBm dBm CXA1124BS/BQ, CXA1534S/Q No. Item Symbol Condition Mode Input Output Others Min. Typ. Max. Unit dbx-TV decode 28 characteristics 8kHz, -10dB Vdc-8 ST. Pin 24 Pin 17 Pin 18 8kHz, -22dBm -34.9 -32.4 -29.9 dBm dbx-TV decode 29 characteristics 8kHz, -15dB Vdc-9 ST. Pin 24 Pin 17 Pin 18 8kHz, -27dBm -49.2 -46.7 -44.2 dBm THDnr ST. Pin 24 Pin 17 Pin 18 1kHz, -15dBm -- 0.3 0.8 % dbx-TV Max. 31 output level 300Hz Vnrmax L ST. Pin 24 Pin 17 Pin 18 THD = 3% 2.0 9.0 -- dBm dbx-TV Max. 32 output level 8kHz Vnrmax H ST. Pin 24 Pin 17 Pin 18 THD = 3% 2.0 8.0 -- dBm Vnnr ST. Pin 17 Pin 18 15kHz LPF used -- -88 -80 dBm Applies 3V voltage to pins 25 and 27 and tests respective input current 7.1 7.5 7.9 A Min. Typ. Max. Unit 2.0 VCC V 0.8 V 30 33 dbx-TV distortion ratio dbx-TV Noise level dbx-TV 34 Timing current Itime -- -- -- -- Mode Matrix Control Voltage section No. Item Symbol Condition Mode Input Output Others Control 35 voltage 1 H level V-HC1 Control 36 voltage 1 L level V-LC1 -- -- -- GND Control 37 voltage 2 H level V-HC2 -- -- -- VCC - 0.5 -- VCC V Control 38 voltage 2 M level V-MC2 -- -- -- 2.0 -- VCC - 2.0 V Control 39 voltage 2 L level V-LC2 -- -- -- 0.8 V -- -- -- Pin 7, 8, 10, 12 Control voltage for pin 9 (FMONO) only - 13 - GND CXA1124BS/BQ, CXA1534S/Q Electrical Characteristics Test Circuit AUDIO SG VR1 10k SG R4 43k (METAL) C3 4.7 C4 0.47 40 SW1 C13 1000p (TANTAL) C9 10 R6 (TANTAL) 3.9k VCC = 9V R2 100k C1 5600p R3 1M 41 R4 600 R1 600 C2 0.012 42 R7 C17 100k 4.7 39 38 37 36 35 C5 47 33 34 C6 100 C7 3300p 32 31 3V R5 C9 2.7k C8 10 4.7 30 29 C14 C15 4.7 4.7 C10 SW2 1 27 26 28 VR2 5k C16 1 SW3 25 24 23 22 19 20 21 CXA1124BS/CXA1534S 1 C18 0.47 2 R8 820 3 R9 820 4 5 6 13 9 12 10 8 14 15 7 11 SW4 SW5 SW6 SW7 SW8 SW9 R10 R11 R12 47k 47k 47k SW11 R18 10k R19 10k MODE CONTROL SW LED1 LED2 R14 2.7k C23 4.7 VR3 VR4 VR5 47k 47k 47k R12 100k 16 17 18 C22 4.7 C19 C20 C21 4.7 4.7 4.7 SW10 R15 100k R16 R17 100k 100k FILTER MEASUREMENT Instructions for test filter 15kHz LPF: 13kHz (-3dB) 15kHz (-46dB) fH BPF : 2fH (15.734kHz) Band width 1.5kHz R15 7.5k Adjustment Procedure (1) Adjustment of stereo and dbx filters Input 1.5fH (23.6kHz: -10dBm) sine wave to pin 39 (COMP IN) and monitor pin 36 (MAIN OUT). Adjust the variable resistor of pin 14 (I LPF) to reduce the output to a minimum. (2) Adjustment of SAP filter Input 6.2fH (97.55kHz: -14.4dBm) sine wave to pin 39 and monitor pin 42 (SAP BPF). Adjust the variable resistor of pin (I SAP) to reduce the output to a minimum. (3) VCO adjustment Adjust pin 15 (I VCO) volume so as to obtain an identical value whether Pin 40 (PC INT2) DC value has input pilot (fH = 15.734kHz: -24dBm) or not. Note) At this point, check to see that the ST.LED of pin 2 is ON. If the LED is OFF, turn up the variable resistor until the ST.LED lights up. (4) Adjustment of stereo seperation 1. Create the stereo mode (by causing the 1 pin (pin 7) to be H and the M2 pin (pin 8) to be L) and input Lch-only signal (30% modulation depth and 300Hz frequency) to pin 39. Then adjust the variable resistor of pin 35 (SUB OUT) to reduce the Rch output to a minimum. 2. Then change only the frequency of the input signal to 3kHz and adjust the variable resistor of pin 22 (VE WGT) to reduce the Rch output to a minimum. 3. Repeat Steps 1 and 2 described above until an optimum separation is achieved. The adjustment frequency is a combination of either 300Hz and 3kHz or 400Hz and 2kHz. - 14 - CXA1124BS/BQ, CXA1534S/Q Mode Matrix No.1 FSAP GND (SAP discrimination Automatic select mode) Broadcast Mode Pin LED ST. SAP M1 M2 FMONO FSAP* LOUT ROUT OFF OFF L L -- GND L+R L+R L H -- L+R L+R H L -- L+R L+R H H -- MUTE MUTE L L -- L+R SAP L H -- SAP SAP H L -- L+R L+R H H -- MUTE MUTE L L L L R ON L L L+R L+R OFF L L M H L+R L+R ON L H L L R ON L H L+R L+R OFF L H M H L+R L+R ON H L L L R ON H L L+R L+R OFF H L M H L+R L+R ON H H MUTE MUTE OFF H H L, M H MUTE MUTE L L L L+R SAP ON L L L+R SAP OFF L L M H L+R SAP ON L H L SAP SAP ON L H SAP SAP OFF L H M H SAP SAP ON H L L L R ON H L L+R L+R OFF H L M H L+R L+R ON H H MUTE MUTE OFF H H L, M H MUTE MUTE MONO OFF ON MONO + SAP ON STEREO ON STEREO + SAP Output OFF ON GND GND GND H; VCC - 0.5 to VCC - 15 - CXA1124BS/BQ, CXA1534S/Q Mode Matrix No.2 FSAP VCC (SAP discrimination fixing mode) Broadcast Mode Pin LED ST. SAP M1 M2 FMONO OFF OFF L L -- VCC L H -- MUTE MUTE H L -- L+R L+R H H -- MUTE MUTE L L -- L+R SAP L H -- SAP SAP H L -- L+R L+R H H -- MUTE MUTE L L L L+R MUTE ON L L L+R MUTE OFF L L M H L+R MUTE ON L H L MUTE MUTE ON L H MUTE MUTE OFF L H M H MUTE MUTE ON H L L L R ON H L L+R L+R OFF H L M H L+R L+R ON H H MUTE MUTE OFF H H L, M H MUTE MUTE L L L L+R SAP ON L L L+R SAP OFF L L M H L+R SAP ON L H L SAP SAP ON L H SAP SAP OFF L H M H SAP SAP ON H L L L R ON H L L+R L+R OFF H L M H L+R L+R ON H H MUTE MUTE OFF H H L, M H MUTE MUTE MONO OFF ON MONO + SAP ON STEREO ON STEREO + SAP Output FSAP OFF ON VCC VCC VCC H: VCC - 0.5 to VCC - 16 - LOUT ROUT L+R MUTE CXA1124BS/BQ, CXA1534S/Q Mode Matrix No.3 SMD, FMONO pin mode control function SMD * FUNCTION Broadcast Mode SAP LED Pin Output SMD FSAP SOUT L VCC H VCC L+R Ext L GND L+R H GND L+R L VCC H VCC L+R SAP L GND H GND * MONO OFF * STEREO * MONO + SAP ON * STEREO + SAP L+R SAP SAP: When external dbx-TV (Option) is connected EXT: Signal input to pin16 (ESAP) MUTE * FUNCTION Pin Output MUTE LOUT ROUT SOUT L Mute OFF H Mute ON - 17 - CXA1124BS/BQ, CXA1534S/Q Description of Operation The U.S. dbx system has the base band spectrum shown in Fig. 1. PEAK DEV kHz 50 AM-DSB-SC L-R dbx-TV NR 25 PILOT 25 50 15 SAP dbx-TV NR FM 10kHz 50 - 10kHz L+R 5 50 - 15kHz fH 2fH 3fH 4fH 5fH TELEMETRY FM 3kHz 3 6fH 6.5fH f fH = 15.734kHz Fig. 1. Base band spectrum 2fH 0 fH 90 fH 0 PLL VCO 8fH (COMP IN) STEREO LPF ST. LED DRIVE MODE CONTROL PILOT DET MAIN LPF DE. EM (MAIN OUT) (MAIN IN) 36 L+R 23 PILOT CANCEL 39 SUB LPF (SUB OUT) L-R (DSB) DET SAP BPF 4.7 SAP (FM) DET 35 L-R 10k MATRIX (ST IN) 24 (L-OUT) 17 NR SW 4.7 (A) SUP LPF (SAP OUT) INJ. LOCK dbx-TV BLOCK (B) (R-OUT) 18 (S-OUT) 19 6 (SAP IN) 21 4.7 SAP DET (E SAP) SAP LED DRIVE MODE CONTROL EXT dbx-TV MODE CONTROL 16 Fig. 2. Whole block diagram (See Fig. 3 for dbx-TV block) 24 NR SW (A) FIXED VARIABLE DEEMPHASIS DEEMPHASIS (VE OUT) (VCA IN) 28 29 4.7 21 HPF RMS DET LPF LPF RMS DET Fig. 3. dbx-TV block - 18 - (B) VCA TO MATRIX CXA1124BS/BQ, CXA1534S/Q (1) L + R (MAIN) The dbx signal is input from pin 39 (COMP IN) and led to the STEREO LPF which suppresses the SAP and telemetry signals. Then the pilot signal is cannceled. In the last stage the L - R and SAP signals are removed by the MAIN LPF and the frequency response made flat by the de-emphasis before the L + R signal is input to the matrix. (2) L - R (SUB) The L - R signal follows the same route as does the L + R signal before the pilot signal is canceled. The L - R signal has no carrier signal, as it is a suppressed-carrier double-sideband amplitude-modulated (DSBAM) signal. For this reason, the pilot signal is used to regenerate the carrier signal (quasi-sine wave) to be used for demodulation of the L - R signal. In the last stage the residual high frequency components are removed by the SUB LPF before the L - R signal is input through the NRSW circuit to the dbx-TV block. (3) SAP The SAP, as shown in Fig. 1, is an FM signal using 5fH as carrier. The SAP signal alone is first extracted, then FM components are detected. Finally, residual high-frequency components are removed by the SAPLPF, the f characteristics are flattened, and the SAP signal is input through the NRSW circuit to the dbxTV block. If there is no SAP signal, the output from Pin 6 is muted. (4) Mode discrimination Stereo mode is identified by detecting the pilot signal amplitude. SAP mode is identified by detecting the 5fH carrier and noise around 20kHz after FM detection. (5) dbx-TV block The SAP and L - R signals respectively input to pin 24 (ST IN) and pin 21 (SAP IN) are fed to the NRSW circuit where either one of them is selected by the mode control and is input to the dbx-TV block. The input signal to the block is passed through the fixed de-emphasis circuit and is applied to the variable de-emphasis circuit. The output from the circuit is passed through an externally mounted capacitance and applied to the VCA (Voltage Controlled Amplifier). The output from VCA is converted from a current to a voltage by the operational amplifier before it is input to the matrix. The transfer function of the variable de-emphasis circuit and the gain of the VCA are controlled by the respective RMS detector circuits. Each of the RMS detector circuits passes the input signal through a predetermined filter to properly weight it befor detecting the rms value of the weighted signal to provide a control signal. - 19 - CXA1124BS/BQ, CXA1534S/Q Application Circuit 1 VCC = 4.7 to 10V C3 0.012 COMP IN R2 100k C2 5600p R3 1M 42 R17 5.6k C5 C4 0.47 4.7 41 40 39 37 38 R8 43k (METAL) C7 2700p R7 5k 36 35 C6 47 33 34 32 31 R10 C8 3.3k 4.7 30 R15 3.9k C9 10 C13 3.3 (TANTAL) (TANTAL) C11 1 C15 C16 4.7 4.7 27 26 25 24 23 22 14 15 16 R12 R14 47k 47k 17 18 19 20 C14 4.7 21 29 28 R16 4.7k C18 0.047 CXA1124BS/CXA1534S 1 C1 0.47 to 4.7 2 R1 820 3 R4 820 6 5 4 R17 100k D1 D2 7 8 M1 M2 R6 2.7k 9 10 11 12 13 SMD MUTE FMONO F SAP R9 44.2k MODE CONTROL SW R5 7.5k dbx-TV CXA1011 C10 C12 4.7 4.7 C17 4.7 R OUT S OUT L OUT R11 22k R13 47k R12 ; (METAL) R9 ; 47k (METAL) //750k (CARBON) Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. Precautions in usage of application circuit 1 1) Use VCC at 4.7 to 10V. (recommended value: 9V) 2) Adjustment of stereo and SAP filters is executed simultaneously. Adjustment is performed through the stereo filter (Pin 14 (I LPF) volume). Here, to obtain the most suitable stereo separation, set the adjustment signal frequency to 22.9kHz. 3) dbx-TV connected between Pin 6 (SAP OUT) and Pin 16 (E SAP) is an option. Connect a dbx-TV system LSI (CXA1011 for example). Then SAP or L + R signal can be output from Pin 19 (S OUT). 4) Pin 1 capacity value determines mute (or Stereo automatic select) speed when SAP carrier is OFF and SAP discriminating stability at a low intensity electric field. Shrinking the capacitance raises MUTE speed to minimize the switching noise. However discriminating stability is adversely affected. Inversely, when the capacitance is increased it improves stability whereas switching noise grows bigger. 5) Pin 5 is used for fine adjustment of the free-running frequency of the SAP VCC. It is used under normal open conditions if the DC offset at Pin 6 (SAP OUT) causes problems, with the SAP carrier either there or not, connect a resistor of about 100k between Pin 6 and GND. 6) Use a nonpolarized capacitor for C5. 7) If a noise channel is received is at Pin 6 (SAP OUT) noise of several tens of mVp-p will be output (because of soft mute). - 20 - CXA1124BS/BQ, CXA1534S/Q Application Circuit 2 (When SAP is not used) VCC = 4.7 to 10V C3 0.012 COMP IN R2 100k C2 5600p R3 1M 42 R14 5.6k C5 C4 0.47 4.7 41 40 39 38 37 R5 43k (METAL) R4 5k 36 R7 C8 3.3k 4.7 C7 2700p 35 C6 47 33 34 32 31 30 29 R12 3.9k C9 10 C13 3.3 (TANTAL) (TANTAL) C11 1 26 25 15 17 16 R9 R11 C10 47k 47k 4.7 18 28 27 C14 C15 4.7 4.7 24 23 22 19 20 21 R13 4.7k C16 0.047 CXA1124BS/CXA1534S 1 2 R1 820 D1 3 4 5 6 7 8 9 10 11 12 FMONO MUTE MODE CONTROL SW 13 R6 47k R8 47k 14 R10 47k C12 4.7 R OUT L OUT Note) Use a nonpolarized capacitor for C5. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. - 21 - CXA1124BS/BQ, CXA1534S/Q Examples of Representative Characteristics LINE OUT input vs. Distortion characteristics 1 (Mono) Input signal Mono (Pre-Emphasis ON) 1kHz 0dB = 100% Modulation level VCC = 9V, 30kHz LPF ON, ST. mode 10.0 T.H.D. [%] 1.0 T.H.D. [%] LINE OUT input vs. Distortion characteristics 2 (stereo) 0.1 Standard level (100%) 0.01 -10 0 Input level [dB] Input signal Stereo L = -R (dbx-TVNR ON) 1kHz 0dB = 100% Modulation level VCC = 9V, 15KHz LPF ON, ST. mode 1.0 Standard level (100%) 0.1 10 -10 LINE OUT input vs. Distortion characteristics 3 (SAP) 10 Stereo LPF Frequency characteristics 10.0 10 Input signal SAP (dbx-TVNR ON) 1kHz 0dB = 100% Modulation level VCC = 9V, 30kHz LPF ON, SAP mode 5 Gain [dB] T.H.D. [%] 0 Input level [dB] 1.0 0 -5 Standard level (100%) 0.1 -10 0 Input level [dB] -10 10 0 Main LPF Frequency characteristics Sub LPF 20 40 60 80 Frequency [kHz] 100 SAP Frequency characteristics and Group delay 100 30 90 20 5fH 0 -10 80 Gain 10 Gain [dB] Gain FC main [dB] & FC sub 10 70 60 50 0 40 -20 30 -10 -30 20 Group delay -40 -20 3.8fH 6.2fH -50 1 2 5 7 10 20 Frequency [kHz] 50 70 100 - 22 - 20 40 60 80 Frequency [kHz] 100 10 0 120 Group delay [s] 20 CXA1124BS/BQ, CXA1534S/Q Package Outline Unit: mm CXA1124BS/CXA1534S + 0.1 - 0.05 42PIN SDIP (PLASTIC) 600mil 0.25 + 0.4 37.8 - 0.1 42 + 0.3 13.0 - 0.1 15.24 0.25 22 0 to 15 21 1 + 0.4 4.6 - 0.1 3.0 MIN 0.5 MIN 1.778 0.25 0.5 0.1 0.9 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE SDIP-42P-02 LEAD TREATMENT SOLDER PLATING EIAJ CODE SDIP042-P-0600-A LEAD MATERIAL COPPER / 42 ALLOY PACKAGE WEIGHT 4.4g JEDEC CODE CXA1124BS + 0.1 05 0.25 - 0. 42PIN SDIP (PLASTIC) 600mil + 0.4 36.6 - 0.1 42 0 to 15 + 0.3 13.2 - 0.1 15.24 0.25 22 21 1 0.5 0.1 0.9 0.15 + 0.4 4.5 - 0.1 3.0 MIN 0.51 MIN 1.778 0.25 PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE SDIP-42P-04 LEAD TREATMENT SOLDER PLATING EIAJ CODE SDIP042-P-0600-C LEAD MATERIAL COPPER / 42 ALLOY PACKAGE WEIGHT 4.4g JEDEC CODE - 23 - CXA1124BS/BQ, CXA1534S/Q CXA1124BQ/CXA1534Q 48PIN QFP (PLASTIC) 15.3 0.4 + 0.1 0.15 - 0.05 + 0.4 12.0 - 0.1 36 25 0.15 24 48 13 13.5 37 12 0.8 + 0.15 0.3 - 0.1 0.12 M 0.9 0.2 1 + 0.2 0.1 - 0.1 + 0.35 2.2 - 0.15 PACKAGE STRUCTURE SONY CODE QFP-48P-L04 EIAJ CODE QFP048-P-1212-B JEDEC CODE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER / PALLADIUM PLATING LEAD MATERIAL COPPER / 42 ALLOY PACKAGE WEIGHT 0.7g NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). - 24 -