IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 1
Rev.B, 09/11/2012
20VP-P CHARGE PUMP CERAMIC SPEAKER DRIVER September 2012
GENERAL DESCRIPTION
The IS31AP4915 features a mono power amplifier
with an integrated charge-pump power supply
specifically designed to drive the high capacitance of
a ceramic loudspeaker.
The IS31AP4915 maximizes battery life by offering
high performance efficiency.
The IS31AP4915 is ideally suited to deliver the high
output-voltage swing required to drive
ceramic/piezoelectric speakers.
The device utilizes comprehensive click-and-pop
suppression and shutdown control. The IS31AP4915
is fully specified over the -40°C to +85°C extended
temperature range and is available in small lead-free
16-pin QFN (4mm × 4mm) packages.
TYPICAL APPLICATION CIRCUIT
FEATURES
Integrated charge-pump power supply - no
inductor required
Thermal protection
Pop reduction circuitry
20VP-P voltage swing into piezoelectric speaker
QFN-16, 4mm × 4mm
APPLICATIONS
CD/MP3 players
Smart phones
Cellular phones
PDAs
Handheld gaming
10 uF
10 uF
33nF
1 uF
SHUTDOWN
2. 5 - 5. 5V
OUT +
PGND
C1P
IN
SGND SVSS
PVSS
C1N
PVDD
SVDD
SD OUT -
FB
200K
5K
100K
10K
10K
10ohm
10ohm
220pF
Figure 1 Typical Application Circuit
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 2
Rev.B, 09/11/2012
PIN CONFIGURATION
Package Pin Configuration (Top View)
QFN-16
1
2
3
4
16
9
10
11
15
14
13
5
6
7
8
12
NC
SVSS
OUT-
SVDD
OUT+
FB
SD
IN
C1N
PVSS
PGND
NC
SGND
SD
PVDD
C1P
PIN DESCRIPTIO N
No. Pin Description
1 C1P Charge pump flying capacitor positive terminal.
2 PGND Power ground, connect to ground.
3 C1N Charge pump flying capacitor negative terminal.
4 PVSS Output from charge pump.
5, 13 NC No connection.
6 SVSS Amplifier negative supply, connect to PVSS.
7 OUT- Negative output signal.
8 SVDD Amplifier positive supply, connect to PVDD.
9 OUT+ Positive output signal.
10 FB Feed back.
11, 15 SD
______ Shutdown, active low logic.
12 IN Audio input signal.
14 SGND Signal ground, connect to ground.
16 PVDD Charge pump supply voltage, connect to positive supply.
Thermal Pad Connect to GND.
Copyright©2012IntegratedSiliconSolution,Inc.Allrightsreserved.ISSIreservestherighttomakechangestothisspecificationanditsproductsatany
timewithoutnotice.ISSIassumesnoliabilityarisingoutoftheapplicationoruseofanyinformation,productsorservicesdescribedherein.Customersare
advisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonanypublishedinformationandbeforeplacingordersforproducts.
IntegratedSiliconSolution,Inc.doesnotrecommendtheuseofanyofitsproductsinlifesupportapplicationswherethefailureormalfunctionofthe
productcanreasonablybeexpectedtocausefailureofthelifesupportsystemortosignificantlyaffectitssafetyoreffectiveness.Productsarenot
authorizedforuseinsuchapplicationsunlessIntegratedSiliconSolution,Inc.receiveswrittenassurancetoitssatisfaction,that:
a.)theriskofinjuryordamagehasbeenminimized;
b.)theuserassumeallsuchrisks;and
c.)potentialliabilityofIntegratedSiliconSolution,Incisadequatelyprotectedunderthecircumstances
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 3
Rev.B, 09/11/2012
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No. Package QTY/Reel
IS31AP4915-QFLS2-TR QFN-16, Lead-free 3000
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 4
Rev.B, 09/11/2012
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VDD -0.3V ~ +6.5V
Voltage at any input pin -0.3V ~ VDD+0.3V
Maximum junction temperature, TJMAX 150°C
Storage temperature range, TSTG -65°C ~ +150°C
Operating temperature range, TA 40°C ~ +85°C
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIO NS
Symbol Parameter Min. Max. Unit
SVDD, PVDD Supply voltage 2.5 6.5 V
VIH High level input voltage 1.5 V
VIL Low level input voltage 0.5 V
ELECTRICAL CHARACTERISTICS
TA=25°C. (Note 1)
Symbol Parameter Condition Min. Typ. Max. Unit
|VOS| Output Offset Voltage 6 mV
IDD Supply Current
VDD = 3V, SD
______ = VDD 6.0 8.0
mA
VDD = 5V, SD
______ = VDD 8.5 10.5
Shutdown mode, VDD = 2.5V ~ 6.5V 1 µA
ELECTRICAL CHARACTERISTICS
VDD = 3.6V, TA = 25°C (unless otherwise noted) (Note 2)
Symbol Parameter Condition Min. Typ. Max. Unit
VOUT Output voltage
f = 1kHz
THD+N = 10%
ZL= 1F+10
Vcc = 5V 7.9
VRMS
Vcc = 3.6V 5.7
Vcc = 2.7V 4.3
THD+N Total harmonic distortion
plus noise
ZL= 1F+10,VOUT = 1kHz/2VRMS 0.01 %
ZL= 1F+10,VOUT = 1kHz/4VRMS 0.01
Vn Noise output voltage 10 µVRMS
fosc Charge pump switching
frequency 320 kHz
tON Start-up time from shutdown 450 µs
SNR Signal-to-noise ratio 100 dB
Thermal shutdown Threshold 160 °C
Hysteresis 15 °C
Note 1: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over other
temperature range, are guaranteed by design, characterization and process control.
Note 2: Guaranteed by design.
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 5
Rev.B, 09/11/2012
TYPICAL OPERATING CHARACTERISTICS
Vcc = 2.7V
Vout = 3Vrms
Vout = 1.25Vrms
Figure 2 THD+N vs. Frequency(RL = 1µF+10)
Vcc = 3.6V
Vout = 4Vrms
Vout = 2Vrms
Figure 4 THD+N vs. Frequency(RL = 1µF+10)
Vcc = 5V
Vout = 6Vrms
Vout = 3Vrms
Figure 6 THD+N vs. Frequency(RL = 1µF+10)
Vcc = 2.7V
fIN = 1kHz
Figure 3 THD+N vs. Output Voltage(RL = 1µF+10)
Vcc = 3.6V
fIN = 1kHz
Figure 5 THD+N vs. Output Voltage(RL = 1µF+10)
Vcc = 5 V
fIN = 1kHz
Figure 7 THD+N vs. Output Voltage(RL = 1µF+10)
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 6
Rev.B, 09/11/2012
012345
0
25
Vcc = 3.6V
fIN = 1kHz
Figure 8 Power Consumption vs. Output Voltage(RL = 1µF+10)
2
3
4
5
6
7
8
2.5 3 3.5 4 4.5 5 5.5
Figure 10 Supply Current vs. Supply Voltage(RL = 1µF+10)
01 2 34 567
Vcc = 5V
fIN = 1kHz
Figure 9 Power Consumption vs. Output Voltage(RL = 1µF+10)
0
10
20
30
40
50
60
70
01 2 3 4 5 67
Vcc = 5V
fIN = 1kHz
Figure 11 Supply Current vs. Output Voltage(RL = 1µF+10)
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 7
Rev.B, 09/11/2012
FUNCTIONAL BLOCK DIAGRAM
Bias
IN
SDB
C1P
OUT+
SVCC Click-and-pop
Suppression UVLO &
SD Control Charge Pump
C1N
OUT-
PVCC
SGND
PGND
FB
SVSS
PVSS
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 8
Rev.B, 09/11/2012
APPLICATION INFORMATION
INPUT-BLOCKING CAPACITORS
DC input-blocking capacitors are required to be added
in series with the audio signal into the input pin of the
IS31AP4915. This capacitor block the DC portion of
the audio source and allow the IS31AP4915 inputs to
be properly biased to provide maximum performance.
These capacitors form a high-pass filter with the input
impedance of the IS31AP4915. The cutoff frequency
is calculated using Equation 1. For this calculation, the
capacitance used is the input-blocking capacitor and
the resistance is the input impedance of the
IS31AP4915. Because the gains of both the
IS31AP4915 is fixed, the input impedance remains a
constant value. Using the input impedance value from
the operating characteristics table, the frequency
and/or capacitance can be determined when one of
the two values is given.
1
CHARGE PUMP FLYING CAPACITOR AND PVSS
CAPACITOR
The charge pump flying capacitor serves to transfer
charge during the generation of the negative supply
voltage. The PVSS capacitor must be at least equal to
the charge pump capacitor in order to allow maximum
charge transfer. Low ESR capacitors are an ideal
selection, and a value of 10F is typical. Capacitor
values that are smaller than 10F can be used, but
the maximum output power is reduced and the device
may not operate to specifications
DECOUPLING CAPACITORS
The IS31AP4915 require adequate power supply
decoupling to ensure that the noise and total harmonic
distortion (THD) are low. A good low
equivalent-series-resistance (ESR) ceramic capacitor,
typically 1F, placed as close as possible to the device
VDD lead works best. Placing this decoupling capacitor
close to the IS31AP4915 is important for the
performance of the amplifier. For filtering lower
frequency noise signals, a 10F or greater capacitor
placed near the audio power amplifier would also help,
but it is not required in most applications because of
the high PSRR of this device.
LAYOUT RECOMMENDATIONS
The SGND and PGND pins of the IS31AP4915 must
be routed separately back to the decoupling capacitor
in order to provide proper device operation. If the
SGND and PGND pins are connected directly to each
other, the part functions without risk of failure, but the
noise and THD performance do not meet the
specifications.
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 9
Rev.B, 09/11/2012
CLASSIFICATION REFLOW PROFI LES
Profile Feature Pb-Free Assembly
Preheat & So ak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp) 3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)* Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc) Max 30 seconds
Average ramp-down rate (Tp to Tsmax) 6°C/second max.
Time 25°C to peak temperature 8 minutes max.
Figure 12 Classification Profile
IS31AP4915
Integrated Silicon Solution, Inc. – www.issi.com 10
Rev.B, 09/11/2012
PACKAGE INFORMATION
QFN-16
Note: All dimensions in millimeters unless otherwise stated.