PE95420-1 - Peregrine Semiconductor Corp.

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The PE95420 is an RF SPDT (single pole double throw) switch

and is available in a hermetically sealed ceramic package. The

PE95420 is designed to cover a broad range of applications

from near DC to 8500 MHz for use in various Hi-Rel industries

and applications requiring broadband performance. It uses

Peregrine’s UltraCMOS™ process and features HaRP™

technology enhancements to deliver high linearity and

exceptional harmonics performance. HaRP technology is an

innovative feature of the UltraCMOS™ process providing

upgraded linearity performance.

The PE95420 is an absorptive/non-reflective switch design

which is an ideal termination method for RF elements in a

system design. A single-pin 2.2V CMOS logic control in a

single chip solution reduces the number of control lines.

Preliminary Specification

RF SPDT Switch

Hermetically sealed ceramic package

DC – 8500 MHz

Product Description

Figure 1. Functional Diagram

PE95420

Features

• HaRP™-Technology-Enhanced

• Eliminates Gate and Phase Lag

• No insertion loss or phase drift

• High linearity 60 dBm IIP3

• Low insertion loss:

• 0.8 dB at 100 MHz

• 1.4 dB at 3000 MHz

• 1.5 dB at 6000 MHz

• High isolation

• 65 dB at 100 MHz

• 42 dB at 3000 MHz

• 40 dB at 6000 MHz

• 1 dB compression point of +30 dBm

• Single-pin 3.3 V CMOS logic control

• ESD tolerant to 2000 V HBM

• Absorptive/Non-Reflective

• Offered in a 7-lead Hermetic CSOIC

Surface-Mount Package and in DIE form

Figure 2. Package Type

7-lead CSOIC

• Medical

• Automotive

• Telecom Infrastructure

• Test Instrumentation

• Down-hole oil/gas

• Military

• Screening available for commercial

space applications

Typical Industries

RF1 RF2

CTRLLS

RFC

50Ω50Ω

CMOS Control

Driver

ESD ESD

V

DD

V

SS

Preliminary Specification

PE95420

Page 2 of 7

Table 2. Pin Descriptions Figure 3. Pin Layout (Top View)

Pin No. Pin Name Description

1 RFC1 RF Common

2 RF11 RF Port 1

3 VDD Nominal 3.3 V supply connection

4 LS

Selects the RF1 to RFC path

(See Table 5)

5 CTRL

Selects the RF2 to RFC path

(See Table 5)

6 VSS Negative power supply. Apply nominal –

3.3 V supply

7 RF21 RF Port 2

RFC

RF1 RF2

LSV

DD

V

SS

CTRL

Pin 1

Pin 2

Pin 3

Pin 7

456

Note 1: No DC voltage should be applied at RF ports.

Table 1. Electrical Specifications @ +25°C, VDD = 3.3 V

Parameter Conditions Typical Units

Operation Frequency MHz

Insertion Loss

100 MHz, 0 dBm

3000 MHz, 0 dBm

6000 MHz, 0 dBm

8500 MHz, 0 dBm

0.8

1.2

1.5

1.7

dB

Isolation – RF1 to RF2

100 MHz

3000 MHz

6000 MHz

8500 MHz

82

48

35

30

dB

Return Loss ON State

100 MHz

3000 MHz

6000 MHz

8500 MHz

20

21

16

9

dB

Switching Time 50% CTRL to 0.1 dB final value 2 µs

Input 1 dB Compression 6000 MHz 33 dBm

Input IP3 6000 MHz 60 dBm

Min

DC

Max

8500

Isolation - RFC to RF1/RF2

100 MHz

3000 MHz

6000 MHz

8500 MHz

74

46

42

33

dB

Return Loss OFF State

100 MHz

3000 MHz

6000 MHz

8500 MHz

19

18

15

10

dB

Preliminary Specification

PE95420

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Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS™ de vice, observe the

same precautions that you would use with other ESD-

sensitive devices. Although this device contains

circuitry to protect it from damage due to ESD,

precautions should be taken to avoid exceeding the

rate specified.

Exposed Solder Pad Connection

The exposed solder pad on the bottom of the package

must be grounded for proper device operation.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS™

devices are immune to latch-up.

Switching Frequency

The PE95420 has a maximum 25 kHz switching rate.

Table 5. Truth Table

LS CTRL RFC-RF1 RFC-RF2

0 0 off off

0 1 off on

1 0 on off

1 1 on on

Table 4. Absolute Maximum Ratings

Table 3. Operating Ranges

Exceeding absolute maximum ratings may cause permanent

damage. Operation should be restricted to the limits in the

Operating Ranges table. Operation between operating

range maximum and absolute maximum for extended

periods may reduce reliability.

Symbol Parameter/Conditions Min Max Units

VDD Power supply voltage -0.3 4.0 V

VC1 Voltage on LS input -0.3 VDD+

0.3 V

VC2 Voltage on CTRL input -0.3 VDD+

0.3 V

TST Storage temperature range -65 150 °C

VESD ESD voltage (Human Body

Model) 2000 V

Parameter Min Typ Max Units

VDD Positive Power

Supply Voltage 3.0 3.3 3.6 V

VDD Negative Power

Supply Voltage -3.6 -3.3 -3.0 V

IDD Power Supply Current

(VDD = 3.3V, LS or CTRL =

3.3V) 100 µA

Control Voltage High 0.7xVDD V

Control Voltage Low 0.3xVDD V

RF Power In:

20 MHz ≤ 8.5 GHz

24

dBm

Operating temperature

range -40 85 °C

Figure 5. Isolation, OFF-State

Performance Plots

Figure 4. Isolation, RFC-RF1, VDD=3.3V across

Temperature

Preliminary Specification

PE95420

Page 4 of 7

Figure 6. Insertion Loss

Figure 7. Return Loss, RFC ON

Figure 8. Return Loss, RFC OFF

Preliminary Specification

PE95420

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Figure 10. Evaluation Kit Schematic

Peregrine Specification 102-0417

Figure 9. Evaluation Board Layouts

Peregrine Specification 101-0345 The SPDT switch EK Board was designed to ea se

customer evaluation of Peregrine’s PE95420. The RF

common port is connected through a 50 Ω transmission

line via the top SMA connector, J1. RF1 and RF2 are

connected through 50 Ω tra nsmission lines vi a SMA

connectors J2 and J3, respectively. A through 50 Ω

transmission is available via SMA connectors J5 and

J6. This transmission line can be used to estimate the

loss of the PCB over the environmental condition s

being evaluated.

The evaluation kit board is constructed of four metal

layers. The dual clad top RF layer is Ro gers RO4003

material with an 8 mil RF core and er = 3.55. The other

two dielectric layers are FR4 for DC control and overal l

board strength with an cumulative board thickness of

62 mils. The RF transmission line s we re designed

using a Grounded co-planar waveguide with a linewidth

of 15 mils and gap of 7 mils.

Evaluation Boards

Through Line

TH ERMA L SLU G

SOCKET MOUNTING HOLE

SOCKET M O UNTI NG H O LE

SOCKET MOUNTING HOLE

1

2

J5

142-0761-881/891

1

2

J1

142 -0761 -881 /891

1

2

J3

142-0761-881/891

1

13

35

57

7

22

44

66

88

10 10

12 12

14 14 13

13

9

911

11

J4

HEADER 14

1

2

J2

142-0761-881/891

C1

22pF

C2

22pF

C3

22pF

1

2

J6

142-0761-881/891

R1

DNI

C4

22pF

2RF1

3VDD

4LS

5CTRL

6VSS

7

RF2

1

RFC

8

GND

9

10

11

12

U1

PE95420

RFC

RF2RF1

VSS

CTRL

VDD

LS

VDD

CTR

LS

Preliminary Specification

PE95420

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Table 6. Ordering Information

Order Code Part Marking Description Package

Shipping

Method

95420-01 9542001 PE95420-7CSOIC-50B Engineering Samples 7-lead CSOIC 50 Count Trays

95420-11 9542011 PE95420-7CSOIC-50B Production Units 7-lead CSOIC 50 Count Trays

95420-00 PE95420-EK PE95420 Evaluation Kit Evaluation Board 1 / Box

95420-99 Production Die Die 400 Units/Waffle Pack

Figure 11. Package Drawing

7-lead CSOIC

PE95420

NOTES:

1. PACKAGE BODY MATERIAL: WHITE ALUMINA 92%

2. CONDUCTOR TRACES MATERIAL: THICK FILM TUNGSTEN

3. LEAD IS Fe-Ni-Co ALLOY

4. BASE IS Cu-W

5. PLATING: ELECTROLYTIC GOLD 50 MICRO-INCHES MIN, OVER ELECTROLYTIC NICKEL

75 MICRO-INCHES MIN.

6. ALL DIMENSIONS ARE IN INCHES [MILLIMETERS]

7. TOLERANCES: ±.005 [0.13] UNLESS OTHERWISE SPECIFIED.

8. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND.

Preliminary Specification

PE95420

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Sales Offices

The Americas

Peregrine Semiconductor Corporation

9380 Carroll Park Drive

San Diego, CA 92121

Tel: 858-731-9400

Fax: 858-731-9499

Europe

Peregrine Semiconductor Europe

Bâtiment Maine

13-15 rue des Quatre Vents

F-92380 Garches, France

Tel: +33-1-4741-9173

Fax : +33-1-4741-9173

For a list of representatives in your area, please refer to our Web site at: www.psemi.com

Data Sheet Identification

Advance Information

The product is in a formative or design stage. The data

sheet contains design target specifications for product

development. Specifications and features may change in

any manner without notice.

Preliminary Specification

The data sheet contains preli m inary data. Additional data

may be added at a later date. Peregrine reserves the right

to change specifications at any time without notice in order

to supply the best possible product.

Product Specification

The data sheet contains final data. In the event Peregrine

decides to change the specifications, Peregrine will notify

customers of the intended changes by issuing a DCN

(Document Change Notice).

The information in this data sheet is beli eved to be reliable.

However, Peregrine assumes no li ability for the use of this

information. Use shall be entirely at the user ’s own risk.

No patent rights or licenses to any circuits describe d in this

data sheet are implied or gran ted to any third party.

Peregrine’s products are not designed or intended for use in

devices or systems intended for surgical implant, or in other

applications intended to supp ort or sustain life, or in any

application in which the failure of the Peregrine product could

create a situation in which personal injury or death might occur.

Peregrine assumes no li ability for damages, including

consequential or incidental da mages, arising out of the use of

its products in such applications.

The Peregrine name, logo, and UTSi are registered trademarks

and UltraCMOS and HaRP ar e trademarks of Peregrine

Semiconductor Corp.

Hi-Rel Products

Americas:

Tel: 858-731-9453

Europe, Asia Pacific:

180 Rue Jean de Guiram and

13852 Aix-En-Provence Cedex 3, France

Tel: +33-4-4239-3361

Fax: +33-4-4239-7227

Peregrine Semiconductor, Asia Pacific (APAC)

Shanghai, 200040, P.R. China

Tel: +86-21-5836-8276

Fax: +86-21-5836-7652

Peregrine Semiconductor, Korea

#B-2607, Kolon Tripolis, 210

Geumgok-dong, Bundang- gu, Seongnam-si

Gyeonggi-do, 463-943 South Korea

Tel: +82-31-728-3939

Fax: +82-31-728-3940

Peregrine Semiconductor K.K., Japan

Teikoku Hotel Tower 10B-6

1-1-1 Uchisaiwai-cho, Chiyoda-ku

Tokyo 100-0011 Japan

Tel: +81-3-3502-5211

Fax: +81-3-3502-5213