Low Distortion, 1.5 W Audio
Power Amplifier
Data Sheet
SSM2211
Rev. G Document Feedback
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FEATURES
1.5 W output with THD + N < 1%
Differential bridge-tied load output
Single-supply operation: 2.7 V to 5.5 V
Functions down to 1.75 V
Wide bandwidth: 4 MHz
Highly stable phase margin: >80°
Low distortion: 0.2% THD + N at 1 W output
Excellent power supply rejection
APPLICATIONS
Portable computers
Personal wireless communicators
Hands-free telephones
Speaker phones
Intercoms
Musical toys and talking games
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The SSM22111 is a high performance audio amplifier that
delivers 1 W rms of low distortion audio power into a bridge-
connected 8 Ω speaker load (or 1.5 W rms into a 4 Ω load).
The SSM2211 operates over a wide temperature range and is
specified for single-supply voltages between 2.7 V and 5.5 V.
When operating from batteries, it continues to operate down to
1.75 V. This makes the SSM2211 the best choice for unregulated
applications, such as toys and games.
Featuring a 4 MHz bandwidth and distortion below 0.2% total
harmonic distortion plus noise (THD + N) at 1 W, superior
performance is delivered at higher power or lower speaker load
impedance than competitive units. Furthermore, when the
ambient temperature is at 25°C, THD + N < 1%, and VS = 5 V
on a 4-layer printed circuit board (PCB), the SSM2211 delivers
a 1.5 W output.
The low differential dc output voltage results in negligible
losses in the speaker winding and makes high value dc blocking
capacitors unnecessary. The battery life is extended by using
shutdown mode, which typically reduces quiescent current
drain to 100 nA.
The SSM2211 is designed to operate over the −40°C to +85°C
temperature range. The SSM2211 is available in 8-lead SOIC
(narrow body) and LFCSP (lead frame chip scale) surface-
mount packages. The advanced mechanical packaging of the
LFCSP models ensures lower chip temperature and enhanced
performance relative to standard packaging options.
Applications include personal portable computers, hands-free
telephones and transceivers, talking toys, intercom systems, and
other low voltage audio systems requiring 1 W output power.
1 Protected by U.S. Patent No. 5,519,576.
VOUTB
IN–
IN+
SHUTDOWN
BYPASS
VOUTA
V– (GND)
BIAS
00358-001
SSM2211
SSM2211 Data Sheet
Rev. G | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 4
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution .................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 15
Thermal Performance—LFCSP ................................................ 15
Applications Information .............................................................. 16
Bridged Output vs. Single-Ended Output Configurations ... 16
Speaker Efficiency and Loudness ............................................. 16
Power Dissipation....................................................................... 16
Output Voltage Headroom ........................................................ 18
Automatic Shutdown-Sensing Circuit ..................................... 18
Shutdown-Circuit Design Example ......................................... 19
Start-Up Popping Noise ............................................................. 19
SSM2211 Amplifier Design Example .................................. 19
Single-Ended Applications ........................................................ 20
Driving Two Speakers Single-Endedly .................................... 20
LFCSP PCB Considerations ...................................................... 21
Outline Dimensions ....................................................................... 22
Ordering Guide .......................................................................... 22
REVISION HISTORY
5/16—Rev. F to Rev. G
Changed Electrical Characteristics Section Heading to
Specifications Section Heading....................................................... 4
Changes to Table 5 ............................................................................ 6
Changes to Figure 3 .......................................................................... 7
Changed Product Overview Section Heading to Theory of
Operation Section Heading ........................................................... 15
Changed Typical Applications Section Heading to Applications
Information Section Heading ....................................................... 16
Updated Outline Dimensions ....................................................... 22
Changes to Ordering Guide .......................................................... 22
12/13—Rev. E to Rev. F
Changes to Table 5 ............................................................................ 5
Added Exposed Pad Notation, Pin Configurations and Function
Descriptions Section ........................................................................ 6
Deleted Evaluation Board Section ................................................ 20
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 22
4/08—Rev. D to Rev. E
Changes to Features .......................................................................... 1
Changes to General Description .................................................... 1
Changes to Supply Current in Table 1 and Table 2 ...................... 3
Changes to Supply Current in Table 3 ........................................... 4
Changes to Absolute Maximum Ratings ....................................... 5
Changes to Figure 41 ...................................................................... 14
Changes to Equation 7, Equation 8, and Equation 10 ............... 16
Changes to Figure 47 ...................................................................... 17
Changes to Automatic Shutdown-Sensing Circuit Section ...... 18
Changes to SSM2211Amplifier Design Example Section ......... 19
Changes to Driving Two Speakers Single Endedly Section ...... 20
Changes to Figure 50...................................................................... 20
Changes to Evaluation Board Section.......................................... 20
Changes to Figure 51...................................................................... 20
Changes to Ordering Guide .......................................................... 22
11/06—Rev. C to Rev. D
Updated Format .................................................................. Universal
Changes to General Description ..................................................... 1
Changes to Electrical Characteristics ............................................. 3
Changes to Absolute Maximum Ratings ........................................ 5
Added Table 6 .................................................................................... 6
Changes to Figure 32...................................................................... 11
Changes to the Product Overview Section ................................. 14
Changes to the Output Voltage Headroom Section................... 17
Changes to the Start-Up Popping Noise Section........................ 18
Changes to the Evaluation Board Section ................................... 20
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 21
10/04—Rev. B to Rev. C
Updated Format .................................................................. Universal
Changes to General Description ..................................................... 1
Changes to Table 5 ............................................................................. 4
Deleted Thermal Performance—SOIC Section ........................... 8
Changes to Figure 31...................................................................... 10
Changes to Figure 40...................................................................... 12
Changes to Thermal Performance—LFCSP Section ................. 13
Deleted Figure 52, Renumbered Successive Figures .................. 14
Deleted Printed Circuit Board Layout—SOIC Section ............. 14
Changes to Output Voltage Headroom Section ......................... 16
Data Sheet SSM2211
Rev. G | Page 3 of 24
Changes to Start-Up Popping Noise Section ............................... 17
Changes to Ordering Guide ........................................................... 20
10/02—Rev. A to Rev. B
Deleted 8-Lead PDIP ......................................................... Universal
Updated Outline Dimensions ........................................................ 15
5/02—Rev. 0 to Rev. A
Edits to General Description ........................................................... 1
Edits to Package Type ....................................................................... 3
Edits to Ordering Guide ................................................................... 3
Edits to Product Overview ............................................................... 8
Edits to Printed Circuit Board Layout Considerations .............. 13
Added section Printed Circuit Board Layout
Considerations—LFCSP ................................................................ 14
SSM2211 Data Sheet
Rev. G | Page 4 of 24
SPECIFICATIONS
VDD = 5.0 V, TA = 25°C, RL = 8 Ω, CB = 0.1 µF, VCM = VDD/2, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS
Differential Output Offset Voltage VOOS AVD = 2, −40°C ≤ TA ≤ +85°C 4 50 mV
Output Impedance ZOUT 0.1 Ω
SHUTDOWN CONTROL
Input Voltage High VIH ISY = <100 mA 3.0 V
Input Voltage Low VIL ISY = normal 1.3 V
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 4.75 V to 5.25 V 66 dB
Supply Current ISY VOUTA = VOUTB = 2.5 V, −40°C ≤ TA ≤ +85°C 9.5 20 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD (see Figure 32), −40°C ≤ TA ≤ +85°C 0.1 1 µA
DYNAMIC PERFORMANCE
Gain Bandwidth Product GBP 4 MHz
Phase Margin ΦM 86 Degrees
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N P = 0.5 W into 8 Ω, f = 1 kHz 0.15 %
Total Harmonic Distortion THD + N P = 1.0 W into 8 Ω, f = 1 kHz 0.2 %
Voltage Noise Density en f = 1 kHz 85 nV√Hz
VDD = 3.3 V, TA = 25°C, RL = 8 Ω, CB = 0.1 µF, VCM = VDD/2, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS
Differential Output Offset Voltage VOOS AVD = 2, −40°C ≤ TA ≤ +85°C 5 50 mV
Output Impedance ZOUT 0.1 Ω
SHUTDOWN CONTROL
Input Voltage High VIH ISY = <100 µA 1.7 V
Input Voltage Low VIL ISY = normal 1 V
POWER SUPPLY
Supply Current ISY VOUTA = VOUTB = 1.65 V, −40°C ≤ TA ≤ +85°C 5.2 20 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD (see Figure 32), −40°C ≤ TA ≤ +85°C 0.1 1 µA
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N P = 0.35 W into 8 Ω, f = 1 kHz 0.1 %
Data Sheet SSM2211
Rev. G | Page 5 of 24
VDD = 2.7 V, TA = 25°C, RL = 8 Ω, CB = 0.1 µF, VCM = VDD/2, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS
Differential Output Offset Voltage VOOS AVD = 2 5 50 mV
Output Impedance ZOUT 0.1 Ω
SHUTDOWN CONTROL
Input Voltage High VIH ISY = <100 mA 1.5 V
Input Voltage Low VIL ISY = normal 0.8 V
POWER SUPPLY
Supply Current ISY VOUTA = VOUTB = 1.35 V, −40°C ≤ TA ≤ +85°C 4.2 20 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD (see Figure 32), −40°C ≤ TA ≤ +85°C 0.1 1 µA
AUDIO PERFORMANCE
Total Harmonic Distortion
THD + N
P = 0.25 W into 8 Ω, f = 1 kHz
0.1
%
SSM2211 Data Sheet
Rev. G | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at TA = 25°C, unless
otherwise noted.
Table 4.
Parameter Rating
Supply Voltage 6 V
Input Voltage VDD
Common-Mode Input Voltage VDD
ESD Susceptibility 2000 V
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature, Soldering (60 sec) 300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type θJA θJC Unit
8-Lead LFCSP (CP-Suffix)1 50 75 °C/W
8-Lead SOIC_N (S-Suffix)
2
121
43
°C/W
1 For the LFCSP, θJA is measured with exposed lead frame soldered to the PCB.
2 For the SOIC_N, θJA is measured with the device soldered to a 4-layer PCB.
ESD CAUTION
Data Sheet SSM2211
Rev. G | Page 7 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 2. 8-Lead SOIC_N Pin Configuration (R-8) Figure 3. 8-Lead LFCSP Pin Configuration (CP-8-13)
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1 SHUTDOWN Shutdown Enable.
2 BYPASS Bypass Capacitor.
3 IN+ Noninverting Input.
4 IN− Inverting Input.
5 VOUTA Output A.
6 V+ Positive Supply.
7 V− Negative Supply.
8 VOUTB Output B.
EPAD Exposed Pad. Connect the exposed pad to V−.
00358-002
SHUTDOWN
1
BYPASS
2
IN+
3
IN–
4
V
OUT
B
8
V–
7
V+
6
V
OUT
A
5
SSM2211
TOP VIEW
(Not to Scale)
SHUTDOWN
BYPASS
IN+
IN–
V–
V
OUT
B
V+
V
OUT
A
00358-003
3
4
1
2
6
5
8
7
TOP VIEW
(Not to Scale)
SSM2211
NOTES
1. CONNECT THE EXPOSED PAD TO V−.
SSM2211 Data Sheet
Rev. G | Page 8 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4. THD + N vs. Frequency
Figure 5. THD + N vs. Frequency
Figure 6. THD + N vs. Frequency
Figure 7. THD + N vs. Frequency
Figure 8. THD + N vs. Frequency
Figure 9. THD + N vs. Frequency
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k1k 10k
0.1
CB = 0
CB = 0.1µF
CB = 1µF
TA = 25°C
VDD = 5V
AVD = 2 (BTL)
RL = 8Ω
PL = 500mW
00358-004
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
C
B
= 0
C
B
= 0.1µF
C
B
= 1µF
T
A
= 25°C
V
DD
= 5V
A
VD
= 10 (BTL)
R
L
= 8Ω
P
L
= 500mW
00358-005
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
CB = 0.1µF
CB = 1µF
TA = 25°C
VDD = 5V
AVD = 20 (BTL)
RL = 8Ω
PL = 500mW
00358-006
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
C
B
= 0
C
B
= 0.1µF
C
B
= 1µF
T
A
= 25°C
V
DD
= 5V
A
VD
= 2 (BTL)
R
L
= 8Ω
P
L
= 1W
00358-007
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k1k 10k
0.1
CB = 0
CB = 0.1µF
CB = 1µF
TA = 25°C
VDD = 5V
AVD = 10 (BTL)
RL = 8Ω
PL = 1W
00358-008
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
CB = 0.1µF
CB = 1µF
TA = 25°C
VDD = 5V
AVD = 20 (BTL)
RL = 8Ω
PL = 1W
00358-009
Data Sheet SSM2211
Rev. G | Page 9 of 24
Figure 10. THD + N vs. POUTPUT
Figure 11. THD + N vs. POUTPUT
Figure 12. THD + N vs. POUTPUT
Figure 13. THD + N vs. Frequency
Figure 14. THD + N vs. Frequency
Figure 15. THD + N vs. Frequency
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 5V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 20Hz
C
B
= 0.1µF
00358-010
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 5V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 1kHz
C
B
= 0.1µF
00358-011
P
OUTPUT
(W)
THD + N (%)
10
1
0.01
20n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 5V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 20kHz
C
B
= 0.1µF
00358-012
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k1k 10k
0.1
C
B
= 0
C
B
= 0.1µF
C
B
= 1µF
T
A
= 25°C
V
DD
= 3.3V
A
VD
= 2 (BTL)
R
L
= 8Ω
P
L
= 350mW
00358-013
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k1k 10k
0.1
C
B
= 0
C
B
= 0.1µF
C
B
= 1µF
T
A
= 25°C
V
DD
= 3.3V
A
VD
= 10 (BTL)
R
L
= 8Ω
P
L
= 350mW
00358-014
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
C
B
= 0.1µF
C
B
= 1µF
T
A
= 25°C
V
DD
= 3.3V
A
VD
= 20 (BTL)
R
L
= 8Ω
P
L
= 350mW
00358-015
SSM2211 Data Sheet
Rev. G | Page 10 of 24
Figure 16. THD + N vs. POUTPUT
Figure 17. THD + N vs. POUTPUT
Figure 18. THD + N vs. POUTPUT
Figure 19. THD + N vs. Frequency
Figure 20. THD + N vs. Frequency
Figure 21. THD + N vs. Frequency
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 3.3V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 20Hz
C
B
= 0.1µF
00358-016
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 3.3V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 1kHz
C
B
= 0.1µF
00358-017
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 3.3V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 20kHz
C
B
= 0.1µF
00358-018
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
C
B
= 0
C
B
= 0.1µF
C
B
= 1µF
T
A
= 25°C
V
DD
= 2.7V
A
VD
= 2 (BTL)
R
L
= 8Ω
P
L
= 250mW
00358-019
FREQUENCY (Hz)
THD + N (%)
10
1
0.01 20 100 20k1k 10k
0.1
CB = 0
CB = 0.1µF
CB = 1µF
TA = 25°C
VDD = 2.7V
AVD = 10 (BTL)
RL = 8Ω
PL = 250mW
00358-020
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
C
B
= 0.1µF
C
B
= 1µF
T
A
= 25°C
V
DD
= 2.7V
A
VD
= 20 (BTL)
R
L
= 8Ω
P
L
= 250mW
00358-021
Data Sheet SSM2211
Rev. G | Page 11 of 24
Figure 22. THD + N vs. POUTPUT
Figure 23. THD + N vs. POUTPUT
Figure 24. THD + N vs. POUTPUT
Figure 25. THD + N vs. Frequency
Figure 26. THD + N vs. Frequency
Figure 27. THD + N vs. Frequency
POUTPUT (W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
TA = 25°C
VDD = 2.7V
AVD = 2 (BTL)
RL = 8Ω
FREQUENCY = 20Hz
00358-022
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 2.7V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 1kHz
00358-023
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
V
DD
= 2.7V
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 20kHz
00358-024
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
RL = 32Ω
PO = 60mW
RL = 8Ω
PO = 250mW
TA = 25°C
VDD = 5V
AVD = 10 SINGLE ENDED
CB = 0.1µF
CC = 1000µF
00358-025
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
R
L
= 32Ω
P
O
= 20mW
R
L
= 8Ω
P
O
= 85mW
T
A
= 25°C
V
DD
= 3.3V
A
VD
= 10 SINGLE ENDED
C
B
= 0.1µF
C
C
= 1000µF
00358-026
FREQUENCY (Hz)
THD + N (%)
10
1
0.0120 100 20k
1k 10k
0.1
R
L
= 32Ω
P
O
= 15mW
R
L
= 8Ω
P
O
= 65mW
T
A
= 25°C
V
DD
= 2.7V
A
VD
= 10 SINGLE ENDED
C
B
= 0.1µF
C
C
= 1000µF
00358-027
SSM2211 Data Sheet
Rev. G | Page 12 of 24
Figure 28. THD + N vs. POUTPUT
Figure 29. THD + N vs. POUTPUT
Figure 30. THD + N vs. POUTPUT
Figure 31. Maximum Power Dissipation vs. Ambient Temperature
Figure 32. Supply Current vs. Shutdown Voltage at Pin 1
Figure 33. Supply Current vs. Supply Voltage
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 20Hz
C
B
= 0.1µF
V
DD
= 2.7V
V
DD
= 5V
V
DD
= 3.3V
00358-028
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
T
A
= 25°C
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 1kHz
C
B
= 0.1µF
V
DD
= 2.7V
V
DD
= 5V
V
DD
= 3.3V
00358-029
P
OUTPUT
(W)
THD + N (%)
10
1
0.0120n 0.1 2
0.1
1
V
DD
= 2.7V
V
DD
= 5V
V
DD
= 3.3V
T
A
= 25°C
A
VD
= 2 (BTL)
R
L
= 8Ω
FREQUENCY = 20kHz
C
B
= 0.1µF
00358-030
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
00358-031
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
–40 –30 –20 –10 0 10 30 70
20 40 50 60 90
80 110100 120
T
J,MAX
= 150°C
FREE AIR, NO HEAT SINK
SOIC θ
JA
= 121°C/W
LFCSP θ
JA
= 50°C/W
8-LEAD SOIC
8-LEAD LFCSP
SHUTDOW N V OLTAGE AT PI N 1 ( V )
SUPPLY CURRE NT ( µA)
10k
8k
00 5
1 2 3 4
6k
4k
2k
T
A
= 25° C
V
DD
= 5V
00358-032
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
14
00 1 6
2 3 4 5
12
10
8
4
2
6
T
A
= 25°C
R
L
= OPEN
00358-033
Data Sheet SSM2211
Rev. G | Page 13 of 24
Figure 34. POUTPUT vs. Load Resistance
Figure 35. Gain and Phase Shift vs. Frequency (Single Amplifier)
Figure 36. Output Offset Voltage Distribution
Figure 37. Output Offset Voltage Distribution
LOAD RESISTANCE ()
OUTPUT POWER (W)
1.6
0.6
0
48 4812 16 20 24 28 32 36 40 44
1.4
0.8
0.4
0.2
1.2
1.0
5V
3.3V
2.7V
00358-034
FREQUENCY (Hz)
GAIN (dB)
80
–60
–80
–40
–20
0
20
40
60
100 1k 100M
10k 100k 1M 10M
PHASE SHIFT (Degrees)
180
–135
–180
–90
–45
0
45
90
135
00358-035
OUTPUT OFFSET VOLTAGE (mV)
NUMBER OF UNITS
25
20
0
–20 –15 25–10 –5 0 10 15 205
15
10
5
V
DD
= 2.7V
SAMPLE SIZE = 300
00358-036
OUTPUT OFFSET VOLTAGE (mV)
NUMBER OF UNITS
20
16
0
–30 –20 30–10 0 10 20
12
8
4
V
DD
= 3.3V
SAMPLE SIZE = 300
00358-037
SSM2211 Data Sheet
Rev. G | Page 14 of 24
Figure 38. Output Offset Voltage Distribution
Figure 39. Supply Current Distribution
Figure 40. PSRR vs. Frequency
OUTPUT OFFSET VOLTAGE (mV)
20
16
0–30 –20 30
–10 010 20
12
8
4
VDD = 3.3V
SAMPLE SIZE = 300
NUMBER O F UNI TS
V
DD
= 5V
SAMPLE SIZE = 300
00358-038
SUPPLY CURRE NT (mA)
NUMBER O F UNI TS
600
300
0678910 11 12 13 14 15
500
400
200
100
VDD = 5V
SAMPLE SIZE = 1,700
00358-039
FREQUENCY (Hz)
PSRR (dB)
–7020 100 30k1k 10k
TA = 25°C
VDD = 5V ± 100mV
CB = 15µF
AVD = 2
–65
–60
–55
–50
00358-040
Data Sheet SSM2211
Rev. G | Page 15 of 24
THEORY OF OPERATION
The SSM2211 is a low distortion speaker amplifier that can run
from a 2.7 V to 5.5 V supply. It consists of a rail-to-rail input
and a differential output that can be driven within 400 mV of
either supply rail while supplying a sustained output current of
350 mA. The SSM2211 is unity-gain stable, requiring no
external compensation capacitors, and can be configured for
gains of up to 40 dB. Figure 41 shows the simplified schematic.
Figure 41. Simplified Schematic
Pin 4 and Pin 3 are the inverting and noninverting terminals
to A1. An offset voltage is provided at Pin 2, which must be
connected to Pin 3 for use in single-supply applications. The
output of A1 appears at Pin 5. A second operational amplifier,
A2, is configured with a fixed gain of AV = −1 and produces an
inverted replica of Pin 5 at Pin 8. The SSM2211 outputs at Pin 5
and Pin 8 produce a bridged configuration output to which a
speaker can be connected. This bridge configuration offers the
advantage of a more efficient power transfer from the input to
the speaker. Because both outputs are symmetric, the dc bias at
Pin 5 and Pin 8 are exactly equal, resulting in zero dc differential
voltage across the outputs. This configuration eliminates the need
for a coupling capacitor at the output.
THERMAL PERFORMANCE—LFCSP
The LFCSP offers the SSM2211 user even greater choices when
considering thermal performance criteria. For the 8-lead,
3 mm × 3 mm LFCSP, the θJA is 50°C/W. This rating is a
significant performance improvement over most other
packaging options.
4
3
SHUTDOWN
VOUTA
V+
A2
A1
2
IN– 20kΩ
20kΩ
50kΩ
0.1µF
7
8
5
6
SSM2211
50kΩ
50kΩ
50kΩ
V
OUT
B
BIAS
CONTROL
00358-041
1
SSM2211 Data Sheet
Rev. G | Page 16 of 24
APPLICATIONS INFORMATION
Figure 42. Typical Configuration
Figure 42 shows how the SSM2211 is connected in a typical
application. The SSM2211 can be configured for gain much like
a standard operational amplifier. The gain from the audio input
to the speaker is
I
F
VR
R
A 2 (1)
The 2× factor results from Pin 8 having an opposite polarity of
Pin 5, providing twice the voltage swing to the speaker from the
bridged-output (BTL) configuration.
CS is a supply bypass capacitor used to provide power supply
filtering. Pin 2 is connected to Pin 3 to provide an offset voltage
for single-supply use, with CB providing a low ac impedance to
ground to enhance power-supply rejection. Because Pin 4 is a
virtual ac ground, the input impedance is equal to RI. CC is the
input coupling capacitor, which also creates a high-pass filter
with a corner frequency of
C
I
HP CR
f
2
1 (2)
Because the SSM2211 has an excellent phase margin, a feedback
capacitor in parallel with RF to band limit the amplifier is not
required, as it is in some competitor products.
BRIDGED OUTPUT VS. SINGLE-ENDED OUTPUT
CONFIGURATIONS
The power delivered to a load with a sinusoidal signal can be
expressed in terms of the peak voltage of the signal and the
resistance of the load as
L
PK
LR
V
P
2
2 (3)
By driving a load from a BTL configuration, the voltage swing
across the load doubles. Therefore, an advantage in using a BTL
configuration becomes apparent from Equation 3, as doubling
the peak voltage results in four times the power delivered to the
load. In a typical application operating from a 5 V supply, the
maximum power that can be delivered by the SSM2211 to an
8 Ω speaker in a single-ended configuration is 250 mW. By
driving this speaker with a bridged output, 1 W of power can be
delivered. This power translates to a 12 dB increase in sound
pressure level from the speaker.
Driving a speaker differentially from a BTL offers another
advantage in that it eliminates the need for an output coupling
capacitor to the load. In a single-supply application, the quiescent
voltage at the output is half of the supply voltage. If a speaker is
connected in a single-ended configuration, a coupling capacitor
is needed to prevent dc current from flowing through the speaker.
This capacitor also must be large enough to prevent low
frequency roll-off. The corner frequency is given by
C
LCR
f
π2
1
dB3 (4)
where RL is the speaker resistance and CC is the coupling
capacitance.
For an 8 Ω speaker and a corner frequency of 20 Hz, a 1000 μF
capacitor is needed, which is physically large and costly. By
connecting a speaker in a BTL configuration, the quiescent
differential voltage across the speaker becomes nearly zero,
eliminating the need for the coupling capacitor.
SPEAKER EFFICIENCY AND LOUDNESS
The effective loudness of 1 W of power delivered into an 8 Ω
speaker is a function of speaker efficiency. The efficiency is
typically rated as the sound pressure level (SPL) at 1 meter in
front of the speaker with 1 W of power applied to the speaker.
Most speakers are between 85 dB and 95 dB SPL at 1 meter at
1 W. Table 7 shows a comparison of the relative loudness of
different sounds.
Table 7. Typical Sound Pressure Levels (SPLs)
Source of Sound SPL (dB)
Threshold of Pain 120
Heavy Street Traffic 95
Cabin of Jet Aircraft 80
Average Conversation 65
Average Home at Night 50
Quiet Recording Studio 30
Threshold of Hearing 0
Consequently, Table 7 demonstrates that 1 W of power into a
speaker can produce quite a bit of acoustic energy.
SSM2211
A
UDIO
INPUT SPEAKER
8V
R
F
C
S
5V
2
7
18
5
6
4
3
–
+
C
C
R
I
C
B
–
+
00358-042
Data Sheet SSM2211
Rev. G | Page 17 of 24
POWER DISSIPATION
Another important advantage in using a BTL configuration is
the fact that bridged-output amplifiers are more efficient than
single-ended amplifiers in delivering power to a load. Efficiency
is defined as the ratio of the power from the power supply to the
power delivered to the load.
SY
L
P
P
An amplifier with a higher efficiency has less internal power
dissipation, which results in a lower die-to-case junction
temperature compared with an amplifier that is less efficient.
Efficiency is important when considering the amplifier
maximum power dissipation rating vs. ambient temperature.
An internal power dissipation vs. output power equation can be
derived to fully understand efficiency of amplifier.
The internal power dissipation of the amplifier is the internal
voltage drop multiplied by the average value of the supply
current. An easier way to find internal power dissipation is to
measure the difference between the power delivered by the
supply voltage source and the power delivered into the load.
The waveform of the supply current for a bridged-output
amplifier is shown in Figure 43.
Figure 43. Bridged Amplifier Output Voltage and Supply Current vs. Time
By integrating the supply current over a period, T, and then
dividing the result by T, the IDD,AVG can be found. Expressed in
terms of peak output voltage and load resistance
L
PEAK
AVGDD R
V
Iπ
2
, (5)
Therefore, power delivered by the supply, neglecting the bias
current for the device, is
L
PEAK
DD
SY R
VV
P
2 (6)
The power dissipated internally by the amplifier is simply the
difference between Equation 6 and Equation 3. The equation
for internal power dissipated, PDISS, expressed in terms of power
delivered to the load and load resistance, is
LL
L
DD
DISS PP
R
V
P
22 (7)
The graph of this equation is shown in Figure 44.
Figure 44. Power Dissipation vs. Output Power with VDD = 5 V
Because the efficiency of a bridged-output amplifier (Equation 3
divided by Equation 6) increases with the square root of PL, the
power dissipated internally by the device stays relatively flat and
actually decreases with higher output power. The maximum
power dissipation of the device can be found by differentiating
Equation 7 with respect to load power and setting the derivative
equal to zero, which yields
01
1
2
LL
DD
L
DISS
PR
V
P
P (8)
and occurs when
L
DD
MAXDISS R
V
P2
2
,π
2
(9)
Using Equation 9 and the power derating curve in Figure 31,
the maximum ambient temperature can be found easily. This
ensures that the SSM2211 does not exceed its maximum
junction temperature of 150°C. The power dissipation for a single-
ended output application where the load is capacitively coupled
is given by
LL
L
DD
DISS PP
R
V
P
22 (10)
The graph of Equation 10 is shown in Figure 45.
T
T
00358-043
VOUT
VPEAK
ISY
IDD, PEAK
TIME
IDD, AVG
TIME
OUTPUT POWER (W)
1.5
00 1.5
POWER DISSIPATION (W)
0.5 1.0
1.0
0.5
V
DD
= 5V
R
L
= 4
R
L
= 8
R
L
= 16
00358-044
SSM2211 Data Sheet
Rev. G | Page 18 of 24
Figure 45. Power Dissipation vs. Single-Ended Output Power
with VDD = 5 V
The maximum power dissipation for a single-ended output is
L
DD
MAXDISS R
V
P2
2
,π2
(11)
OUTPUT VOLTAGE HEADROOM
The outputs of both amplifiers in the SSM2211 can come within
400 mV of either supply rail while driving an 8 Ω load. As
compared with equivalent competitor products, the SSM2211
has a higher output voltage headroom. This means that the
SSM2211 can deliver an equivalent maximum output power
while running from a lower supply voltage. By running at a lower
supply voltage, the internal power dissipation of the device is
reduced, as shown in Equation 9. This extended output headroom,
along with the LFCSP, allows the SSM2211 to operate in higher
ambient temperatures than competitor devices.
The SSM2211 is also capable of providing amplification even at
supply voltages as low as 2.7 V. The maximum power available at
the output is a function of the supply voltage. Therefore, as the
supply voltage decreases, so does the maximum power output
from the device. The maximum output power vs. supply voltage
at various BTL resistances is shown in Figure 46. The maximum
output power is defined as the point at which the output has 1%
total harmonic distortion (THD + N).
To find the minimum supply voltage needed to achieve a
specified maximum undistorted output power use Figure 46.
For example, an application requires only 500 mW to be output
for an 8 Ω speaker. With the speaker connected in a bridged-
output configuration, the minimum supply voltage required
is 3.3 V.
Figure 46. Maximum Output Power vs. VSY
Shutdown Feature
The SSM2211 can be put into a low power consumption shut-
down mode by connecting Pin 1 to 5 V. In shutdown mode,
the SSM2211 has an extremely low supply current of less than
10 nA, which makes the SSM2211 ideal for battery-powered
applications.
Connect Pin 1 to ground for normal operation. Connecting Pin 1
to VDD mutes the outputs and puts the device into shutdown
mode. A pull-up or pull-down resistor is not required. Pin 1
must always be connected to a fixed potential, either VDD or
ground, and never be left floating. Leaving Pin 1 unconnected
can produce unpredictable results.
AUTOMATIC SHUTDOWN-SENSING CIRCUIT
Figure 47 shows a circuit that can be used to take the SSM2211
in and out of shutdown mode automatically. This circuit can
be set to turn the SSM2211 on when an input signal of a certain
amplitude is detected. The circuit also puts the device into low
power shutdown mode if an input signal is not sensed within
a certain amount of time. Shutdown mode can be useful in a
variety of portable radio applications, where power conservation
is critical.
Figure 47. Automatic Shutdown Circuit
OUTPUT POWER (W)
0.35
0.30
0
0 0.40.1
POWER DISSIPATION (W)
0.2 0.3
0.20
0.15
0.10
0.05
0.25
V
DD
= 5V R
L
= 4
R
L
= 8
R
L
= 16
00358-045
SUPPLY VOLTAGE (V)
01.5 5.02.0
MAX P
OUT
@ 1% THD (W)
2.5 3.0 3.5 4.0 4.5
1.6
1.0
0.8
0.4
0.2
1.4
1.2
0.6
R
L
= 4Ω
R
L
= 8Ω
R
L
= 16Ω
00358-046
00358-047
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
SSM2211
IN–
V
DD
C2
R5
R6
R1 R3
R2
D1
C1
R4
R7
4
V
DD
1
5
R8
A1
V
DD
8
V
OUT
A
V
OUT
B
–
+
AD8500
Data Sheet SSM2211
Rev. G | Page 19 of 24
The input signal to the SSM2211 is also connected to the non-
inverting terminal of A2. R1, R2, and R3 set the threshold
voltage at which the SSM2211 is to be taken out of shutdown
mode. The diode, D1, half-wave rectifies the output of A2,
discharging C1 to ground when an input signal greater than the
set threshold voltage is detected. R4 controls the charge time of
C1, which sets the time until the SSM2211 is put back into
shutdown mode after the input signal is no longer detected.
R5 and R6 establish a voltage reference point equal to half of the
supply voltage. R7 and R8 set the gain of the SSM2211. A 1N914
or equivalent diode is required for D1, and A2 must be a rail-to-
rail output amplifier, such as the AD8500 or equivalent. This
ensures that C1 discharges sufficiently to bring the SSM2211
out of shutdown mode.
To find the appropriate component values, the gain of A2 must
be determined by
THS
SY
MINV, V
V
A (12)
where:
VSY is the single supply voltage.
VTHS is the threshold voltage.
AV must be set to a minimum of 2 for the circuit to work
properly.
Next, choose R1 and set R2 to
V
A
R1R2 2
1 (13)
Find R3 as
1
V
A
R2R2 R2R1
R3 (14)
C1 can be arbitrarily set but must be small enough to prevent
A2 from becoming capacitively overloaded. R4 and C1 control
the shutdown rate. To prevent intermittent shutdown with low
frequency input signals, the minimum time constant must be
LOW
f
C1R4 10
(15)
where fLOW is the lowest input frequency expected.
SHUTDOWN-CIRCUIT DESIGN EXAMPLE
In this example, a portable radio application requires the SSM2211
to be turned on when an input signal greater than 50 mV is
detected. The device must return to shutdown mode within
500 ms after the input signal is no longer detected. The lowest
frequency of interest is 200 Hz, and a 5 V supply is used.
The minimum gain of the shutdown circuit, from Equation 12, is
AV = 100. R1 is set to 100 kΩ. Using Equation 13 and Equation 14,
R2 = 98 kΩ and R3 = 4.9 MΩ. C1 is set to 0.01 μF, and based on
Equation 15, R4 is set to 10 MΩ. To minimize power supply
current, R5 and R6 are set to 10 MΩ. The previous procedure
provides an adequate starting point for the shutdown circuit.
Some component values may need to be adjusted empirically to
optimize performance.
START-UP POPPING NOISE
During power-up or release from shutdown mode, the midrail
bypass capacitor, CB, determines the rate at which the SSM2211
starts up. By adjusting the charging time constant of CB, the start-
up pop noise can be pushed into the subaudible range, greatly
reducing start-up popping noise. On power-up, the midrail
bypass capacitor is charged through an effective resistance of
25 kΩ. To minimize start-up popping, the charging time constant
for CB must be greater than the charging time constant for the
input coupling capacitor, CC.
CB × 25 kΩ > CC × R1 (16)
For an application where R1 = 10 kΩ and CC = 0.22 μF, CB must
be at least 0.1 μF to minimize start-up popping noise.
SSM2211 Amplifier Design Example
Maximum output power: 1 W
Input impedance: 20 kΩ
Load impedance: 8 Ω
Input level: 1 V rms
Bandwidth: 20 Hz − 20 kHz ± 0.25 dB
The configuration shown in Figure 42 is used. The first thing to
determine is the minimum supply rail necessary to obtain the
specified maximum output power. From Figure 46, for 1 W of
output power into an 8 Ω load, the supply voltage must be at
least 4.6 V. A supply rail of 5 V can be easily obtained from a
voltage reference. The extra supply voltage also allows the
SSM2211 to reproduce peaks in excess of 1 W without clipping
the signal. With VDD = 5 V and RL = 8 Ω, Equation 9 shows that
the maximum power dissipation for the SSM2211 is 633 mW.
From the power derating curve in Figure 31, the ambient
temperature must be less than 50°C for the SOIC and 121°C for
the LFCSP.
The required gain of the amplifier can be determined from
Equation 17 as
8.2
rmsIN,
LL
VV
RP
A (17)
From Equation 1,
2
V
I
FA
R
R
or RF = 1.4 × RI. Because the desired input impedance is 20 kΩ,
RI = 20 kΩ and R2 = 28 kΩ.
SSM2211 Data Sheet
Rev. G | Page 20 of 24
The final design step is to select the input capacitor. When
adding an input capacitor, CC, to create a high-pass filter, the
corner frequency must be far enough away for the design to
meet the bandwidth criteria. For a first-order filter to achieve a
pass-band response within 0.25 dB, the corner frequency must
be at least 4.14× away from the pass-band frequency. Therefore,
(4.14 × fHP) < 20 Hz. Using Equation 2, the minimum size of an
input capacitor can be found.
×
>
144
Hz20
kΩ20π2
1
.
CC
(18)
Therefore, CC > 1.65 µF. Using a 2.2 µF is a practical choice for CC.
The gain bandwidth product for each internal amplifier in the
SSM2211 is 4 MHz. Because 4 MHz is much greater than 4.14 ×
20 kHz, the design meets the upper frequency bandwidth criteria.
The SSM2211 can also be configured for higher differential gains
without running into bandwidth limitations. Equation 16 shows
an appropriate value for CB to reduce start-up popping noise.
( )( )
μF761
kΩ25
kΩ20μF22 .
.
CB=>
(19)
Selecting CB to be 2.2 µF for a practical value of capacitor
minimizes start-up popping noise.
To summarize the final design,
• VDD = 5 V
• R1 = 20 kΩ
• RF = 28 kΩ
• CC = 2.2 µF
• CB = 2.2 µF
• TA, MAX = 85°C
SINGLE-ENDED APPLICATIONS
There are applications in which driving a speaker differentially
is not practical, for example, a pair of stereo speakers where the
negative terminal of both speakers is connected to ground.
Figure 48 shows how this application can be accomplished.
Figure 48. Single-Ended Output Application
It is not necessary to connect a dummy load to the unused
output to help stabilize the output. The 470 µF coupling capa-
citor creates a high-pass frequency cutoff of 42 Hz, as given in
Equation 4, which is acceptable for most computer speaker
applications. The overall gain for a single-ended output config-
uration is AV = RF/R1, which for this example is equal to 1.
DRIVING TWO SPEAKERS SINGLE-ENDEDLY
It is possible to drive two speakers single-endedly with both
outputs of the SSM2211.
Figure 49. SSM2211 Used as a Dual-Speaker Amplifier
Each speaker is driven by a single-ended output. The trade-off
is that only 250 mW of sustained power can be put into each
speaker. In addition, a coupling capacitor must be connected in
series with each of the speakers to prevent large dc currents from
flowing through the 8 Ω speakers. These coupling capacitors
produce a high-pass filter with a corner frequency given by
Equation 4. For a speaker load of 8 Ω and a coupling capacitor
of 470 µF, this results in a −3 dB frequency of 42 Hz.
Because the power of a single-ended output is one-quarter that
of a BTL, both speakers together are still half as loud (−6 dB SPL) as
a single speaker driven with a BTL.
The polarity of the speakers is important because each output is
180° out of phase with the other. By connecting the negative
terminal of Speaker 1 to Pin 5 and the positive terminal of
Speaker 2 to Pin 8, proper speaker phase can be established.
The maximum power dissipation of the device, assuming both
loads are equal, can be found by doubling Equation 11. If the
loads are different, use Equation 11 to find the power dissipa-
tion caused by each load, and then take the sum to find the total
power dissipated by the SSM2211.
SSM2211
5V
2718
5
6
4
3
0.47µF
470µF+
–
+
–
10kΩ
10kΩ
250mW
SPEAKER
(8Ω)
AUDIO
INPUT
0.1µF
00358-048
SSM2211
5V
2718
5
6
4
3
0.47µF
470µF+
–
+
–
10kΩ
10kΩ
250mW
SPEAKER
(8Ω)
AUDIO
INPUT
0.1µF
00358-048
SSM2211
5V
2718
5
6
4
3
1µF
470µF+
–
+
–
20kΩ
20kΩ
RIGHT
SPEAKER
(8Ω)
AUDIO
INPUT
0.1µF
00358-049
470µF
+
–
LEFT
SPEAKER
(8Ω)
Data Sheet SSM2211
Rev. G | Page 21 of 24
LFCSP PCB CONSIDERATIONS
The LFCSP is a plastic encapsulated package with a copper lead
frame substrate. The LFCSP is a leadless package with solder lands
on the bottom surface of the package, instead of conventional
formed perimeter leads. A key feature that allows the user to
reach the quoted θJA performance is the exposed die attach
paddle (DAP) on the bottom surface of the package. When
soldered to the PCB, the DAP can provide efficient conduction
of heat from the die to the PCB. To achieve optimum package
performance, consideration must be given to the PCB pad
design for both the solder lands and the DAP. For further
information, see the AN-772 Application Note.
SSM2211 Data Sheet
Rev. G | Page 22 of 24
OUTLINE DIMENSIONS
Figure 50. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body, S-Suffix
(R-8)
Dimensions shown in millimeters and (inches)
Figure 51. 8-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-8-13)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
SSM2211CPZ-REEL −40°C to +85°C 8-Lead LFCSP CP-8-13 B5A#
SSM2211CPZ-REEL7 −40°C to +85°C 8-Lead LFCSP CP-8-13 B5A#
SSM2211SZ −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
SSM2211SZ-REEL −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
SSM2211SZ-REEL7 −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
1 Z = RoHS Compliant Part; # denotes RoHS compliant product may be top or bottom marked.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
TOP VIEW
8
1
5
4
0.30
0.25
0.20
BOTTOM VIEW
PIN 1 INDEX
AREA
SEATING
PLANE
0.80
0.75
0.70
1.55
1.45
1.35
1.84
1.74
1.64
0.203 REF
0.05 MAX
0.02 NOM
0.50 BSC
EXPOSED
PAD
3.10
3.00 SQ
2.90
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COPLANARITY
0.08
0.50
0.40
0.30
COMPLIANT
TO
JEDEC STANDARDS MO-229-WEED
12-07-2010-A
PIN 1
INDICATOR
(R 0.15)
Data Sheet SSM2211
Rev. G | Page 23 of 24
NOTES
