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IDT5V928
8 OUTPUT CLOCK GENERATOR INDUSTRIAL TEMPERATURE RANGE
JULY 2006
2007 Integrated Device Technology, Inc. DSC 5854/8c
IDT5V928
INDUSTRIAL TEMPERATURE RANGE
8 OUTPUT
CLOCK GENERATOR
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The IDT5V928 is a low-cost, low skew, low jitter, and high-performance
clock synthesizer. It has been specially designed to interface with Gigabit
Ethernet (125MHz), Fibre CHannel (106.25MHz), and OC-3 (155.52MHz)
applications. It can be programmed to provide output frequencies ranging
from 50MHz to 160MHz, with input frequencies ranging from 6.25MHz to
80MHz.
The IDT5V928 includes an internal RC filter that provides excellent jitter
characteristics and eliminates the need for external components. When
using the optional crystal input, the chip accepts a 10 - 40MHz fundamental
mode crystal with a maximum equivalent series resistance of 50Ω.
PHASE
DETECTOR
CHARGE
PUMP
LOOP
FILTER VCO
SELECT MODE
Q0
S1 S0
OE
0
1
Q1
Q2
Q3
Q4
Q5
Q6
Q7
REF
VCO DIVIDE
1/N
X2
X1
CRYSTAL
OSCILLATOR
FEATURES:
• 3V to 3.6V operating voltage
• 50MHz to 160MHz output frequency range
• Input from fundamental crystal oscillator or external source
• Internal PLL feedback (loading feedback output relative to
other outputs, adjusts propagation delay between REF inputs
and outputs)
• Select inputs (S[1:0]) for FB divide selection (multiply ratio of 2,
3, 4, 4.25, 5, 6, 6.25, and 8)
• Low jitter
• PLL bypass for testing and power-down control (S1 = H, S0 = H,
powers part down <500μμ
μμ
μA)
• Available in TSSOP package
APPLICATIONS:
• Gigabit ethernet
• Router
• Network switches
• SAN
• Instrumentation
• Fibre channel
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
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INDUSTRIAL TEMPERATURE RANGE
IDT5V928
8 OUTPUT CLOCK GENERATOR
1
2
3
4
5
6
7
8
24
23
22
21
12
11
10
9
REF
X
1
X2
VDD
VDDQ
Q1
GND
S
1
OE
GND
V
DDQ
Q7
Q6
GND
S
0
Q0
16
15
14
13
20
19
18
17
Q
2
Q3
GND
V
DDQ
GND
Q
5
Q4
VDDQ
PIN CONFIGURATION
TSSOP
TOP VIEW
CRYSTAL SPECIFICATION
The crystal oscillators should be fundamental mode quartz crystals:
overtone crystals are not suitable. Crystal frequency should be specified
for parallel resonance with 50Ω maximum equivalent series resonance.
Crystal tuning capacitors should be connected from X2/REF to GND and from
X1 to GND.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max. Unit
VDD/VDDQ Supply Voltage to Ground – 0.5 to +4.6 V
VIInput Voltage – 0.5 to +4.6 V
IOOutput Current ±50 mA
TSTG Storage Temperature – 65 to +150 °C
TJJunction Temperature 150 °C
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTES:
1. H = HIGH
M = MEDIUM
L = LOW
2. Test mode for low frequency testing. In this mode, REF clock bypasses the VCO (VCO powered down) and the crystal oscillator is powered down.
DIVIDE SELECTION TABLE(1)
S1 S0 Divide-by-N Value Mode
L L 2 PLL
L M 3 PLL
L H 4 PLL
M L 4.25 PLL
M M 5 PLL
M H 6 PLL
H L 6.25 PLL
H M 8 PLL
H H TEST TEST (2)
PIN DESCRIPTION
Pin Name Type Description
S[1:0] I Three level divider/mode select pins. Float to MID.
OE I Output enable bar. OE has a pull-down. Output Q[1:7] tristated
when HIGH. Output Q0 remains running when in PLL mode
and tri-states when in TEST mode.
X1I Crystal oscillator input. Connect to GND if oscillator not
required.
X2I Crystal oscillator output. Leave unconnected for clock input.
REF I Input clock. Connect to X2 if crystal oscillator is used.
Q[1:7] O Output at N*REF frequency
Q0O Output at N*REF internally connected for PLL feedback
VDDQ PWR Power supply for the device outputs. Connect to VDD on PCB.
VDD PWR Power supply for the device core and inputs. Connect to VDD
on PCB.
GND PWR Ground supply
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IDT5V928
8 OUTPUT CLOCK GENERATOR INDUSTRIAL TEMPERATURE RANGE
COMMON OUTPUT FREQUENCY EXAMPLES (MHz)
Output 50 60 64 72 75 80 90 100
Input 25 10 16 12 25 10 15 20
FB Divide Selection S[1:0]LLMHLH MH LM HM MH MM
Output 106.25 106.25 120 125 125 125 150 155.52
Input 17 25 15 20 25 62.5 25 19.44
FB Divide Selection S[1:0]HLMLHM HL MM LL MH HM
OPERATING CONDITIONS
Symbol Parameter Min. Typ. Max. Unit
VDD/VDDQ Power Supply Voltage 3 3.3 3.6 V
TAOperating Temperature - 40 25 +85 °C
CLOutput Load Capacitance — — 15 pF
CIN Input Capacitance, OE, F = 1MHz, VIN = 0V, TA = 25°C — 5 7 pF
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VDD/VDDQ = 3.3V ±0.3V
Symbol Parameter Test Conditions Min. Typ. Max Unit
VIL Input LOW Voltage — — 0.8 V
VIH Input HIGH Voltage 2 — — V
VIHH Input HIGH Voltage 3-level input only VDD - 0.6 — — V
VIMM Input MID Voltage 3-level input only VDD/2 - 0.3 — VDD/2 + 0.3 V
VILL Input LOW Voltage 3-level input only — — 0.6 V
IIN Input Leakage Current (REF input only) VIN = VDD or GND,VDD = Max. -5 — +5 μA
VIN = VDD HIGH Level — — +200
I33-Level Input DC Current, S[1:0] VIN = VDD/2 MID Level - 50 — +50 μA
VIN = GND LOW Level - 200 — —
IIH Input HIGH Current VIN = VDD — — 100 μA
VOL Output LOW Voltage IOL = 12mA — — 0.4 V
VOH Output HIGH Voltage IOH = -12mA 2 .4 — — V
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INDUSTRIAL TEMPERATURE RANGE
IDT5V928
8 OUTPUT CLOCK GENERATOR
INPUT TIMING REQUIREMENTS
Symbol Description(1) Min. Max. Unit
tR, tFMaximum input rise and fall time, 0.8V to 2V(2) — 10 ns/V
tPWC Input clock pulse, HIGH or LOW(2) 2—ns
DHInput duty cycle(2) 10 90 %
fOSC XTAL oscillator frequency — 40 MHz
fIN Input frequency(2) 50/N 160/N MHz
NOTES:
1. Where pulse width implied by DH is less than the tPWC limit, tPWC limit applies,
2. When using a clock input.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions (1) Min. Typ. Max Unit
IDD_PD Power Down Current VDD = Max. — — 500 μA
S[1:0] = HH
OE = L; REF = L; X1 = L
All outputs unloaded
ΔIDD Supply Current per Input VDD = Max., VIN = 3V — — 30 μA
IDD Dynamic Supply Current VDD = 3.6V — — 130 mA
S[1:0] = LL
OE = L
FOUT = 150MHz
All outputs unloaded
NOTE:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tR, tFRise Time, Fall Time 0.8V to 2V — 0.7 1.5 ns
dTOutput/Duty Cycle VT = VDDQ/2 45 50 55 %
fOUT ≥≥
≥≥
≥ 100MHz, all N -200 — 200
tPD REF to Q0(1) VT = VDDQ/2 50 < fOUT < 160MHz, N ≤ 4 -200 — 200 p s
50 < fOUT < 160MHz, N ≥≥
≥≥
≥ 4.25 -350 — 350
tSK Output to Output Skew (Q0 to Q1:7) Equal loads — — 200 ps
tJCycle - Cycle Jitter fOUT ≥≥
≥≥
≥ 100MHz -155 — 155 ps
fOUT Output Frequency 50 — 160 MHz
NOTE:
1. When using a clock input.
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IDT5V928
8 OUTPUT CLOCK GENERATOR INDUSTRIAL TEMPERATURE RANGE
AC TEST LOADS AND WAVEFORMS
15pF
150Ω
OUTPUT
VDD
150Ω
2V
VTH = VDD/2
0V
1ns
3V
1ns
0.8
2V
0V
tRtF
0.8
VDDQ
VTH = VDDQ/2
AC Test Load
Input Test Waveform
Output Waveform
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INDUSTRIAL TEMPERATURE RANGE
IDT5V928
8 OUTPUT CLOCK GENERATOR
ORDERING INFORMATION
IDT XXXX X
Package
Device Type
Thin Shrink Small Outline Package
TSSOP - Green
PG
PGG
5V928 Communications Clock Multiplier
X
Proceed
I Industrial Temperature Range (- 40° C to + 85° C)
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 clockhelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com
