June 2006 Rev 3 1/12
12
IRF820
N-channel 500V - 2.5Ω - 4A TO-220
PowerMesh™II MOSFET
General features
■Extremely high dv/dt capability
■100% avalnche tested
■New high voltage benchmark
■Gate charge minimized
Description
The PowerMESH™II is the evolution of the first
generation of MESH OVERLAY™. The layout
refinements introduced greatly improve the
Ron*area figure of merit while keeping the device
at the leading edge for what concerns switching
speed, gate charge and ruggedness.
Applications
■Switching application
Internal schematic diagram
Type VDSS RDS(on) ID
IRF820 500V <0.3Ω4A
123
TO-220
www.st.com
Order codes
Part number Marking Package Packaging
IRF820 IRF820 TO-220 Tube
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Contents IRF820
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Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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IRF820 Electrical ratings
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1 Electrical ratings
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain-source voltage (VGS = 0) 500 V
VDGR Drain-gate voltage (RGS = 20 kW) 500 V
VGS Gate- source voltage ±30 V
IDDrain current (continuos) at tc = 25°C 4 A
IDDrain current (continuos) at TC = 100°C 2.5 A
IDM (1)
1. Pulse width limited by safe operating area
Drain current (pulsed) 12 A
PTOT Total dissipation at TC = 25°C 80 W
Derating factor 0.64 W/°C
dv/dt (2)
2. ISD ≤2.5A, di/dt £50A/µs, VDD ≤ V(BR)DSS, Tj £ TJMAX.
Peak diode recovery voltage slope 3.5 V/ns
Tstg Storage temperature –65 to 150 °C
TjMax. operating junction temperature 150 °C
Table 2. Thermal data
Rthj-case Thermal resistance junction-case max 1.56 °C/W
Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W
Rthc-sink Thermal resistance case-sink typ 0.5 °C/W
Tl
Maximum lead temperature for soldering
purpose 300 °C
Table 3. Avalanche characteristics
Symbol Parameter Max Value Unit
IAR
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj max) 4A
EAS
Single pulse avalanche energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V) 210 mJ
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Electrical characteristics IRF820
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2 Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 4. On/off states
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS
Drain-source
breakdown voltage ID = 250 µA, VGS = 0 500 V
IDSS
Zero gate voltage
drain current (VGS = 0)
VDS = max rating
VDS = max rating,
TC = 125 °C
1
50
µA
µA
IGSS
Gate-body Leakage
Current (VDS = 0) VGS = ±30V ±100 nA
VGS(th) Gate threshold voltage VDS = VGS, ID = 250µA 2 3 4 V
RDS(on)
Static drain-source on
resistance VGS = 10V, ID = 1.5 A 2.5 3 Ω
Table 5. Dynamic
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1)
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Forward
transconductance
VDS > ID(on) x RDS(on)max,
ID=2A 3S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25V, f = 1 MHz,
VGS = 0
315
52
7.7
pF
pF
pF
td(on)
tr
tr(Voff)
tf
Turn-on delay time
Rise time
Off-voltage rise time
Fall time
VDD = 300 V, ID = 2 A
RG=4.7Ω VGS = 10 V
10
13
15
13
ns
ns
ns
ns
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 400V, ID = 4 A,
VGS = 10V
12.5
2.7
6.1
17 nC
nC
nC
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IRF820 Electrical characteristics
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Table 6. Source drain diode
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(1)
1. Pulse width limited by safe operating area.
Source-drain Current
Source-drain Current
(pulsed)
4
16
A
A
VSD(2)
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
Forward On Voltage ISD = 4 A, VGS = 0 1.6 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD =4 A, di/dt = 100A/µs
VDD = 100V, Tj = 150°C
400
1.64
8.2
ns
µC
A
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Electrical characteristics IRF820
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2.1 Electrical characteristics (curves)
Figure 1. Safe operating area Figure 2. Thermal impedance
Figure 3. Output characterisics Figure 4. Transfer characteristics
Figure 5. Transconductance Figure 6. Static drain-source on resistance
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Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage
vs temperature
Figure 10. Normalized on resistance vs
temperature
Figure 11. Source-drain diode forward
characteristics
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Test circuit IRF820
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3 Test circuit
Figure 12. Unclamped Inductive load test
circuit
Figure 13. Unclamped inductive waveform
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
Figure 16. Test circuit for inductive load
switching and diode recovery times
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IRF820 Package mechanical data
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4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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Package mechanical data IRF820
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DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
b 0.61 0.88 0.024 0.034
b1 1.15 1.70 0.045 0.066
c 0.49 0.70 0.019 0.027
D 15.25 15.75 0.60 0.620
E 10 10.40 0.393 0.409
e 2.40 2.70 0.094 0.106
e1 4.95 5.15 0.194 0.202
F 1.23 1.32 0.048 0.052
H1 6.20 6.60 0.244 0.256
J1 2.40 2.72 0.094 0.107
L 13 14 0.511 0.551
L1 3.50 3.93 0.137 0.154
L20 16.40 0.645
L30 28.90 1.137
øP 3.75 3.85 0.147 0.151
Q 2.65 2.95 0.104 0.116
TO-220 MECHANICAL DATA
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IRF820 Revision history
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5 Revision history
Table 7. Revision history
Date Revision Changes
21-Jun-2004 2Preliminary version
27-Jun-2006 3New template, no content change
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IRF820
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