Rev.2.00 Sep 07, 2005 page 1 of 6
2SK1772
Silicon N Channel MOS FET REJ03G0971-0200
(Previous : AD E-208- 1 318)
Rev.2.00
Sep 07, 2005
Application
High speed power swit ching
Features
• Low on-resistance
• High speed switching
• Low drive current
• 4 V gate drive device can be driven from 5 V source.
• Suitable for DC-DC converter, motor drive, power switch, solenoid drive
Outline
RENESAS Package code: PLZZ0004CA-A
(Package name: UPAK )
R
1. Gate
2. Drain
3. Source
4. Drain
4
321D
G
S
Note: Marking is "HY".
*UPAK is a trademark of Renesas Technology Corp.
2SK1772
Rev.2.00 Sep 07, 2005 page 2 of 6
Absolute Maximum Ratings
(Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage VDSS 30 V
Gate to source voltage VGSS ±20 V
Drain current ID 1 A
Drain peak current ID(pulse)*1 2 A
Body to drain diode reverse drain current IDR 1 A
Channel dissipation Pch*2 1 W
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 %
2. When using the alumina ceramic board (12.5 × 20 × 0.7mm)
Electrical Characteristics
(Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V(BR)DSS 30 — — V ID = 10 mA, VGS = 0
Gate to source breakdown voltage V(BR)GSS ±20 — — V IG = ±100 µA, VDS = 0
Gate to source leak current IGSS — — ±10 µA VGS = ±16 V, VDS = 0
Zero gate voltage drain current IDSS — — 50 µA VDS = 25 V, VGS = 0
Gate to source cutoff volta ge VGS(off) 1.0 — 2.0 V ID = 1 mA, VDS = 10 V
— 0.4 0.6 Ω I
D = 0.5 A, VGS = 10 V*3 Static drain to source on state
resistance RDS(on) — 0.6 0.85 Ω I
D = 0.5 A, VGS = 4 V*3
Forward transfer admittance |yfs| 0.6 1.0 — S ID = 0.5 A, VDS = 10 V*3
Input capacitan ce Ciss — 85 — pF
Output capacitance Coss — 65 — pF
Reverse transfer capacitance Crss — 20 — pF
VDS = 10 V, VGS = 0,
f = 1 MHz
Turn-on delay time td(on) — 10 — ns
Rise time tr — 15 — ns
Turn-off delay time td(off) — 40 — ns
Fall time tf — 30 — ns
ID = 0.5 A, VGS = 10 V,
RL = 60 Ω*3
Body to drain diode forward voltage VDF — 1.2 — V IF = 1 A, VGS = 0*3
Body to drain diode reverse
recovery time trr — 30 — ns IF = 1 A, VGS = 0,
diF/dt = 50 A/µs*3
Note: 3. Pulse Test
2SK1772
Rev.2.00 Sep 07, 2005 page 3 of 6
Main Characteristics
10
3
1
0.3
0.1
0.03
0.01
0.1 0.3 1 3 10 30 100
Drain to Source Voltage V
DS
(V)
Drain Current I
D
(A)
Ta = 25°C
PW = 1 ms
DC Operation
PW = 10 ms
Operation in this area is
limited by R
DS(on)
PW = 100 µs
Maximum Safe Operation Area
2.0
1.6
1.2
0.8
0.4
012345
Drain to Source Voltage V
DS
(V)
Drain Current I
D
(A)
Drain Current I
D
(A)
Pulse test
V = 2 V
GS
2.5 V
3.0 V
3.5 V
4 V
10 V
5 V
Typical Output Characteristics
1.0
0.8
0.6
0.4
0.2
012345
Gate to Source Voltage V
GS
(V)
–25°C
VDS = 10 V
Pulse test
Tc = 25°C
75°C
Typical Transfer Characteristics
2.0
1.6
1.2
0.8
0.4
0246810
Gate to Source Voltage V
GS
(V)
Pulse test
I = 0.5 A
D
1 A
2 A
Drain to Source Saturation Voltage V
DS(on)
(V)
Drain to Source Saturation Voltage
vs. Gate to Source Voltage
10
5
2
1
0.5
0.2
0.1
0.05 0.1 0.2 0.5 1 2 5
Static Drain to Source on State Resistance
R
DS(on)
(Ω)
Pulse test
V = 4 V
GS
10 V
Drain Current I
D
(A)
Static Drain to Source on State
Resistance vs. Drain Current
1.6
1.2
0.8
0.4
0
Channel Power Dissipation Pch** (W)
(** on the almina ceramic board)
50 100 150 200
Ambient Temperature Ta (°C)
Maximum Channel Power
Dissipation Curve
2SK1772
Rev.2.00 Sep 07, 2005 page 4 of 6
2.0
1.6
1.2
0.8
0.4
–40 0 40 80 120 160
Case Temperature T
C
(°C)
Pulse test
1 A
2 A
Static Drain to Source on State Resistance
R
DS(on)
(Ω)
0
V
GS
= 10 V
V
GS
= 4 V
I = 0.5 A, 1 A
D
2 A
0.5 A
Static Drain to Source on State
Resistance vs. Temperature
5.0
2.0
1.0
0.5
0.2
0.1
0.05
Forward Transfer Admittance |yfs| (S)
0.02 0.05 0.1 0.2 0.5 1.0 2.0
Drain Current I
D
(A)
75°C
–25°C
Tc = 25°C
VDS = 10 V
Pulse test
Forward Transfer Admittance vs.
Drain Current
500
200
100
50
20
10
5
Reverse Recovery Time trr (ns)
0.02 0.05 0.1 0.2 0.5 1.0 2.0
Reverse Drain Current I
DR
(A)
di/dt = 50 A/µs
V
GS
= 0
Ta = 25°C
Body-Drain Diode Reverse
Recovery Time
1000
100
10
1
01020304050
Drain to Source Voltage V
DS
(V)
Capacitance C (pF)
Coss
Ciss
Crss
V
GS
= 0
f = 1 MHz
Typical Capacitance vs. Drain to
Source Voltage
50
40
30
20
10
0 0.8 1.6 2.4 3.2 4.0
Gate Charge Qg (nc)
Drain to Source Voltage V
DS
(V)
I
D
= 1 A
V
GS
V
DS
V
DD
= 5 V
10 V
20 V
V
DD
= 5 V
10 V
20 V
20
16
12
8
4
0
Gate to Source Voltage V
GS
(V)
Dynamic Input Characteristics
500
200
100
50
20
10
5
Switching Time t (ns)
0.02 0.05 0.1 0.2 0.5 1.0 2.0
Drain Current I
D
(A)
tr
tf
td(off)
V
GS
= 10 V
V
DD
= 30 V
PW = 2 µs
duty 1 %
td(on)
Switching Characteristics
≤
2SK1772
Rev.2.00 Sep 07, 2005 page 5 of 6
Source to Drain Voltage V
SD
(V)
Reverse Drain Current vs.
Source to Drain Voltage
Reverse Drain Current I
DR
(A)
2.0
1.6
1.2
0.8
0.4
0 0.4 0.8 1.2 1.6 2.0
Pulse test
V = 10 V
GS
0, –5 V
2SK1772
Rev.2.00 Sep 07, 2005 page 6 of 6
Package Dimensions
4.5 ± 0.1
1.8 Max 1.5 ± 0.1
0.44 Max
0.44 Max
0.48 Max
0.53 Max
1.5 1.5
3.0
2.5 ± 0.1
4.25 Max
0.8 Min
φ1
0.4
(1.5)
(2.5)
(0.4)
(0.2)
Package Name
PLZZ0004CA-A UPAK / UPAKV
MASS[Typ.]
0.050g
SC-62
RENESAS CodeJEITA Package Code
Unit: mm
Ordering Information
Part Name Quantity Shipping Container
2SK1772HYTR-E 3000 pcs Taping, φ178 mm Reel
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
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