AS4C14400-50TC - Alliance Semiconductor

ALLIANCE SEMICONDUCTOR

High Performance

1M×4

CMOS DRAM

AS4C14400

AS4C14405

®

1M-bit × 4 CMOS DRAM (Fast page mode or EDO)

Preliminary information

Features

• Organization: 1,048,576 words × 4 bits

• High speed

- 40/50/60/70 ns RAS access time

- 20/25/30/35 ns column address access time

- 10/13/15/18 ns CAS access time

• Low power consumption

- Active: 385 mW max (-60)

- Standby: 5.5 mW max, CMOS I/O

• Fast page mode (AS4C14400) or EDO (AS4C14405)

• 1024 refresh cycles, 16 ms refresh interval

- RAS-only or CAS-before-RAS refresh

• Read-modify-write

• TTL-compatible, three-state I/O

• JEDEC standard packages

- 300 mil, 20/26-pin SOJ

- 300 mil, 20/26-pin TSOP

• Single 5V power supply

• ESD protection ≥ 2001V

• Latch-up current ≥ 200 mA

Pin arrangement

GND

I/O3

I/O2

CAS

OE

A8

A7

I/O0

I/O1

WE

RAS

A9

A0

A1

TSOP

A6

A5

A4

A2

A3

VCC

1

2

3

4

5

9

10

26

25

24

23

22

18

17

11

12

13

16

15

14

GND

I/O3

I/O2

CAS

OE

A8

A7

I/O0

I/O1

WE

RAS

A9

A0

A1 A6

A5

A4

A2

A3

VCC

1

2

3

4

5

9

10

26

25

24

23

22

18

17

11

12

13

16

15

14

SOJ

Pin designation

Pin(s) Description

A0 to A9 Address inputs

RAS Row address strobe

I/O0 to I/O3 Input/output

OE Output enable

CAS Column address strobe

WE Read/write control

VCC Power (5.0 ± 0.5V)

GND Ground

Selection guide

Shaded areas contain advance information.

Symbol 4C14400-40 4C14400-50 4C14400-60 4C14400-70 Unit

Maximum RAS access time tRAC 40 50 60 70 ns

Maximum column address access time tCAA 20 25 30 35 ns

Maximum CAS access time tCAC 10 13 15 18 ns

Maximum output enable (OE) access time tOEA 10 13 15 18 ns

Minimum read or write cycle time tRC 70 90 110 130 ns

Minimum fast page mode cycle time tPC 30 35 40 45 ns

Maximum operating current ICC1 90 80 70 60 mA

Maximum CMOS standby current ICC5 1.0 1.0 1.0 1.0 mA

®

AS4C14400

2

Functional description

The AS4C14400 is a high performance CMOS Dynamic Random Access Memory organized as 1,048,576 words × 4 bits. The AS4C14400 is

fabricated with advanced CMOS technology and designed with innovative design techniques resulting in high speed, extremely low power

and wide operating margins at component and system levels.

The AS4C14400 features a high speed page mode operation in which high speed read, write and read-write are performed on any of the

1024 × 4 bits defined by the column address. The asynchronous column address uses an extremely short row address capture time to ease

the system level timing constraints associated with multiplexed addressing. Output is tri-stated by a column address strobe (CAS) which acts

as an output enable independent of RAS. Very fast CAS to output access time eases system design.

Refresh on the 1024 address combinations of A0 to A9 during a 16 ms period is accomplished by performing any of the following:

•RAS-only refresh cycles

• Hidden refresh cycles

•CAS

-before-RAS refresh cycles

• Normal read or write cycles

The AS4C14400 is available in JEDEC standard 20/26-pin plastic SOJ and 20/26-pin plastic TSOP packages. System level features include

single power supply of 5.0 ± 0.5V tolerance and direct interface with TTL logic families.

Logic block diagram

Recommended operating conditions

Recommended operating conditions apply to all specifications unless otherwise noted.

Parameter Symbol Minimum Nominal Maximum Unit

Supply voltage VCC 4.5 5.0 5.5 V

GND 0.0 0.0 0.0 V

Input voltage VIH 2.4 – VCC + 1 V

VIL –1.0 – 0.8 V

Operating temperature TA 0 70 °C

REFRESH

CONTROLLER

1024 × 1024 × 4

Array

(4,194,304)

S ense amp

A0

A1

A2

A3

A4

A5

A6

A7

I/O0

I/O3

Vcc

GND

Address buffer

A8

I/O2

I/O1

Row decoder

Column decoder Data

I/O

OE

RAS

CAS

WE

A9

RAS clock

generator

CAS clock

generator

WE clock

generator

®

AS4C14400

3

Absolute maximum ratings

NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect reliability.

DC electrical characteristics

Shaded areas contain advance information.

Parameter Symbol Minimum Maximum Unit

Input voltage Vin -1.0 +7.0 V

Output voltage Vout -1.0 +7.0 V

Power supply voltage VCC -1.0 +7.0 V

Storage temperature (plastic) TSTG -55 +150 °C

Soldering temperature × time TSOLDER – 260 × 10 oC × sec

Power dissipation PD–1W

DC output current Iout –50mA

Parameter Symbol Test Conditions

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

Input leakage current II0V ≤ Vin ≤ +5.5V

Pins not under test = 0V -2 +2 -2 +2 -2 +2 -2 +2 µA

Output leakage current IOZ Outputs disabled,

0V ≤ Vout ≤ +5.5V -10 +10 -10 +10 -10 +10 -10 +10 µA

Operating power

supply current ICC1 RAS, CAS, Address

cycling: tRC=min – 90 – 80 – 70 – 60 mA 1,2

TTL standby power

supply current ICC2 RAS = CAS = VIH –2.0 – 2.0 – 2.0 – 2.0 mA

Average power supply

current, RAS refresh mode ICC3 RAS cycling, CAS = VIH,

tRC = min –90 – 80 – 70 – 60 mA 1

Fast page mode average

power supply current ICC4

RAS = VIL, CAS cycling,

Address cycling:

tPC = min

–80 – 70 – 60 – 50 mA 1,2

CMOS standby power

supply current ICC5 RAS = CAS = VCC - 0.2V – 1.0 – 1.0 – 1.0 – 1.0 mA

CAS-before-RAS refresh

power supply current ICC6 RAS, CAS cycling:

tRC = min –90 – 80 – 70 – 60 mA 1

Output voltage VOH IOUT = -5.0 mA 2.4 – 2.4 –2.4–2.4–V

V

OL IOUT = 4.2 mA – 0.4 – 0.4 – 0.4 – 0.4 V

®

AS4C14400

4

AC parameters common to all waveforms

Shaded areas contain advance information.

Read cycle

Shaded areas contain advance information.

Symbol Parameter

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

tRC Random read or write cycle time 70 – 90 –110–130– ns

t

RP RAS precharge time 20 – 30 –40–50–ns

t

RAS RAS pulse width 40 10K 50 10K 60 10K 70 10K ns

tCAS CAS pulse width 10 – 13 –15–18–ns

t

RCD RAS to CAS delay time 18 30 20 37 20 45 20 52 ns 6

tRAD RAS to column address delay time 13 20 15 25 15 30 15 35 ns 7

tRSH(R) CAS to RAS hold time (read) 10 – 13 –15–18–ns

t

CSH RAS to CAS hold time 40 – 50 –60–70–ns

t

CRP CAS to RAS precharge time 0 – 0 –0–0–ns

t

ASR Row address setup time 0 – 0 –0–0–ns

t

RAH Row address hold time 8 – 10 –10–10–ns

t

TTransition time (rise and fall) 2 50 2 50 2 50 2 50 ns 4,5

tREF Refresh period – 16 – 16 – 16 – 16 ms 3

tCLZ CAS to output in low Z 0 – 0 –0–0–ns8

Symbol Parameter

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

tRAC Access time from RAS – 40 – 50 – 60 – 70 ns 6

tCAC Access time from CAS – 10 – 13 – 15 – 18 ns 6,13

tAA Access time from address – 20 – 25 – 30 – 35 ns 7,13

tAR(R) Column add hold from RAS 30 – 40 –45–55–ns

t

RCS Read command setup time 0 – 0 –0–0–ns

t

RCH Read command hold time to CAS 0 – 0 –0–0–ns9

t

RRH Read command hold time to RAS 0 – 0 –0–0–ns9

t

RAL Column address to RAS lead time 20 – 25 –30–35–ns

t

CPN CAS precharge time 5 – 10 –10–10–ns

t

ODS Output disable setup time 0 – 0 –0–0–ns

t

OFF Output buffer turn-off time 0 10 0 13 0 15 0 18 ns 8,10

®

AS4C14400

5

Write cycle

Shaded areas contain advance information.

Read-modify-write cycle

Shaded areas contain advance information.

Symbol Parameter

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

tASC Column address setup time 0 – 0 –0–0–ns

t

CAH Column address hold time 8 – 10 –10–15– ns

t

AWR Column address hold time to RAS 30 – 40 –45–55– ns

t

WCS Write command setup time 0 – 0 –0–0–ns11

t

WCH Write command hold time 5 – 10 –10–15– ns11

t

WCR Write command hold time to RAS 30 – 40 –45–55– ns

t

WP Write command pulse width 8 – 10 –10–15– ns

t

RWL Write command to RAS lead time 10 – 13 –15–18– ns

t

CWL Write command to CAS lead time 10 – 13 –15–18– ns

t

DS Data-In setup time 0 – 0 –0–0–ns12

t

DH Data-In hold time 8 – 10 –10–15– ns12

t

DHR Data-In hold time to RAS 30 – 40 –45–55– ns

Symbol Parameter

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

tRWC Read-write cycle time 105 – 131 – 155 – 181 – ns

tRWD RAS to WE delay time 60 – 73 –85–98–ns11

t

CWD CAS to WE delay time 30 – 36 –40–46–ns11

t

AWD Column address to WE delay time 40 – 48 –55–63–ns11

t

RSH(W) CAS to RAS hold time (write) 10 – 13 –15–18–ns

t

CAS(W) CAS pulse width (write) 10 – 13 –15–18–ns

®

AS4C14400

6

Fast page mode cycle

Shaded areas contain advance information.

Refresh cycle

Shaded areas contain advance information.

Output enable

Shaded areas contain advance information.

Symbol Parameter

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

tPC Read-write cycle time

(fast page) 30 – 35 –40–45–ns14

t

CAP Access time from CAS precharge – 25 – 30 – 35 – 40 ns 13

tCP CAS precharge time

(fast page) 5 – 10 –10–10–ns

t

PCM Fast page mode RMW cycle 65 – 76 –85–96–ns

t

CRW Page mode CAS pulse width

(RMW) 45 – 54 –60–69–ns

t

RASP RAS pulse width 40 100K 50 100K 60 100K 70 100K ns

Symbol Parameter

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

tCSR CAS setup time (CAS-before-RAS) 10 – 10 –10–10–ns3

t

CHR CAS hold time (CAS-before-RAS) 10 – 10 –15–15–ns3

t

RPC RAS precharge to CAS hold time 0 – 0 –0–0–ns

t

CPT CAS precharge time

(CAS-before-RAS counter test) 5 – 10 –10–10–ns

Std

Symbol Parameter

-40 -50 -60 -70

Unit Notes

Min Max Min Max Min Max Min Max

tROH RAS hold time referenced to OE 5 – 10 –10–10–ns

t

OEA OE access time – 10 – 13 – 15 – 18 ns

tOED OE to data delay 10 – 13 –15–18–ns

t

OEZ Output buffer turnoff delay

from OE –10 – 13 – 15 – 18 ns 8, 10

tOEH OE command hold time 10 – 13 –15–18–ns

®

AS4C14400

7

Notes

1I

CC1, ICC3, ICC4, and ICC6 depend on cycle rate.

2I

CC1 and ICC4 depend on output loading. Specified values are obtained with the output open.

3 An initial pause of 200 µs is required after power-up followed by any 8 RAS cycles before proper device operation is achieved. In the case of an internal

refresh counter, a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required. 8 initialization cycles are required after

extended periods of bias without clocks (greater than 16 ms).

4 AC Characteristics assume tT = 5 ns. All AC parameters are measured with a load equivalent to two TTL loads and 100 pF, VIL (min) ≥ GND and VIH

(max) ≤ VCC. See AC test conditions for more information.

5V

IH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between VIH and VIL.

6 Operation within the tRCD (max) limit ensures that tRAC (max) can be met. tRCD (max) is specified as a reference point only. If tRCD is greater than the

specified tRCD (max) limit, then access time is controlled exclusively by tCAC.

7 Operation within the tRAD (max) limit ensures that tRAC (max) can be met. tRAD (max) is specified as a reference point only. If tRAD is greater than the

specified tRAD (max) limit, then access time is controlled exclusively by tAA.

8 Assumes three state test load (5 pF and a 380 Ω Thevenin equivalent).

9 Either tRCH or tRRH must be satisfied for a read cycle.

10 tOFF (max) defines the time at which the output achieves the open circuit condition; it is not referenced to output voltage levels.

11 tWCS, tWCH, tRWD, tCWD and tAWD are not restrictive operating parameters. They are included in the datasheet as electrical characteristics only. If tWCS ≥

tWCS (min) and tWCH ≥ tWCH (min), the cycle is an early write cycle and data out pins will remain open circuit, high impedance, throughout the cycle.

If tRWD ≥ tRWD (min), tCWD ≥ tCWD (min) and tAWD ≥ tAWD (min), the cycle is a read-write cycle and the data out will contain data read from the

selected cell. If neither of the above conditions is satisfied, the condition of the data out at access time is indeterminate.

12 These parameters are referenced to CAS leading edge in early write cycles and to WE leading edge in read-write cycles.

13 Access time is determined by the longest of tCAA or tCAC or tCAP.

14 tASC ≥ tCP to achieve tPC (min) and tCAP (max) values.

15 These parameters are sampled and not 100% tested.

AC test conditions

Key to switching waveforms

- Access times are measured with output reference

levels of VOH = 2V and VOL = 0.8 V

- Input rise and fall times: 5 ns

100 pF* R2 = 295W

R1 = 828W

Dout

GND

+5V

Figure B: Equivalent output load

*including scope

10%

90%

10%

90%

+3.0V

and jig capacitance

Figure A: Input waveform

Don’t care input Rising input Falling input

AAAA

A

AAA

A

AAA

A

AAA

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AA

A

AA

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A

AAA

A

AAA

A

AAA

AAAA

A

Undefined output

AAAA

®

AS4C14400

8

Timing waveform of read cycle

Timing waveform of early write cycle

AAAA

AAA

tRAS

AAAA

AA

AAAA

AA

AAAA

AA

AAAA

AAA

AAAA

AAA

tRC

tRP

tRSH

tRAD

tRCH

tOFF

RAS

CAS

Address

WE

OE

I/O

Column

Row

tCRP

tCSH

tRCD

tASC tCAH

tCAS

tAR tRAL

tRCS

tAA

tRAC

tCLZ

tRRH

Data Out

tASR tRAH

tROH

tCAC

tOEA

tOEZ

AAAA

A

AAAA

AA

AAAA

AA

AAAA

AAA

AAAA

A

AAAA

AAA

AAAA

AA

tRAS

tRC tRP

tCRP

tRSH

tRCD

tCSH

tCAS

tRAD tASC

tAWR

tWCS

tCWL

tRWL

tWCH

tWP

tDS tDH

tDHR

Column

Data In

RAS

CAS

Address

WE

OE

I/O

Row

tWCR

tRAL

tASR tRAH tCAH

®

AS4C14400

9

Timing waveform of write cycle (OE controlled)

Timing waveform of read-write cycle

Row

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A

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AA

AAAA

A

AAAA

AA

AAAA

AAA

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AAA

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AAA

AAAA

A

AAAA

AA

AAAA

AA

tRAS

tRC tRP

tCRP

tRSH

tRCD

tCSH

tCAS

tRAH

tRAL

tRAD tCAH

tCWL

tRWL

tWCR

tOEH

tOED tDS tDH

Data In

RAS

CAS

Address

WE

OE

I/O

Column

tDHR

tWP

tASC

tAWR

tASR

AAAA

AA

AAAA

AA

AAAA

A

AAAA

A

AAAA

AA

AAAA

A

AAAA

AAA

AAAA

tRAS

tRWC tRP

tCRP tRSH

tRCD tCSH

tCAS

tRAD

tRAL

tAR

tCAH

tCWL

tCWD

tRWL

tAWD tWP

tOEA

tCLZ

tCAC

tAA tDS tDH

Row Column

Data InData Out

RAS

CAS

Address

WE

OE

I/O

tRWD

tRCS

tRAC

tOEZ tOED

tASC

tASR tRAH

®

AS4C14400

10

Timing waveform of fast page mode read cycle

Timing waveform of fast page mode early write cycle

Row

AAAA

AA

AAAA

AAA

AAAA

AA

AAAA

A

AAAA

AAA

AAAA

A

AAAA

A

AAAA

AA

AAAA

AA

AAAA

AAA

AAAA

tRASP tRP

tCRP tRCD tCAS

tCSH tRSH

tPC

tASR

tRAD

tRCH tRCS tRRH

tRCH

tOEA tOEA

tAA

tRAC tOEZ

tCAC

Data Out Data Out Data Out

Column Column Column

RAS

CAS

Address

WE

OE

I/O

tAR

tRAH tASC tCAH

tRAL

tRCS

tCLZ

tCP

tOFF

AAAA

AA

AAAA

AA

AAAA

AA

AAAA

AAA

tCAP

AAAA

A

AAAA

A

AAAA

AA

AAAA

A

AAAA

AA

AAAA

AA

AAAA

A

AAAA

AAA

AAAA

AAA

AAAA

AA

AAAA

AA

AAAA

AA

AAAA

A

AAAA

A

AAAA

tRASP tRWL

tASC

tWCS tCP

tRAL

tWCH

tCWL

tWP

tDS tDH

tCAS

Row Column Column Column

Data In Data In Data In

RAS

CAS

Address

WE

OE

I/O

tPC tCAH

tCSH

tRCD

tOEH

tHDR

tAR

tRAD

tASR

tCRP

tRAH

tRSH

tOED

®

AS4C14400

11

Timing waveform of fast page mode read-write cycle

Timing waveform of RAS only refresh cycle (WE = OE = VIH or VIL)

Timing waveform of CAS-before-RAS refresh cycle (WE = OE = VIH or VIL)

AAAA

A

AAAA

A

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AA

AAAA

AAA

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AAA

AAAA

A

AAA

AAAA

A

AAA

AAAA

A

tRASP tRP

tRCD

tCSH tCAS tCP tCRP

tASR tCAH tCAH

tRAL

tCAH

tCWD

tAWD

tCWD tCWL

tCWD

tAWD

tRWL

tWP

tOEZ tOEA

tRAC tDS tCLZ

tCAC

tCAP

Row Column ColumnColumn

Data Out Dat a InData In Data Out

Data Out Data In

RAS

CAS

Address

WE

OE

I/O

tRAD

tRAH

tRWD

tRCS

tCWL

tOEA

tAA tDH

tDS tCLZ

tCAC

tCLZ

tCAC

tOED

tPCM

AAAA

A

AAAA

AAA

tRAS tRP

tRC

tCRP tRPC

Row

RAS

CAS

Address

tARS tRAH

AAAA

AA

tRP

tRC tRAS

tRPC tCPN tCSR

tCHR

tOFF

RAS

CAS

I/O

®

AS4C14400

12

Timing waveform of hidden refresh cycle (read)

Timing waveform of hidden refresh cycle (write)

AAA

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AA

AAAA

A

AAAA

AAA

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AA

AAAA

AA

tRAS

tRC tPR tRAS

tRC tPR

tCRP tRCD tRSH tCRP

tCHR

tASR

tRAD

tASC

tRRH

tOEA

tCLZ

tCAC tOEZ

tOFF

ColumnRow

Data Out

RAS

CAS

Address

WE

OE

I/O

tAR

tRAH

tRAC tAA

tRCS

tRAD

AAAA

AA

AAAA

A

AAAA

A

AAAA

AA

AAAA

AAA

AAAA

AAA

AAAA

AAA

AAAA

AA

tRAS

tRC tRP

tCRP tRCD tRSH

tASR

tRAH

tAR

tCAH

tWCS tWCH

tDS tDH

Data In

ColumnRow

RAS

CAS

Address

WE

I/O

OE

tASC

tRWL

tWCR tWP

tDHR

tRAL

®

AS4C14400

13

Timing waveform of CAS before RAS refresh counter test cycle

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AA

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A

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AA

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AA

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AAA

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AAA

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AA

AAAA

AAA

AAAA

tRAS tRSH tRP

tCSR tCHR

tCPT tCAS

tCAH

tCLZ

tCAC

tRCH

tRRH

tROH

tOEA

tRWL

tCWL

tWCS

tWPtWCH

tDS

tDH

tRCS

tOEA

tDS

tDH

Column

Data Out

Data In

Data Out Data In

RAS

CAS

Address

I/O

WE

OE

WE

I/O

OE

WE

OE

I/O

tOED

t AA

tCLZ

tCAC

tOEZ

tWP

tCWL

tRCS

tAA

tOFF

tAWD

tCWD

tRAL

Read Cyc leWrite CycleRead-Write Cycle

®

AS4C14400

14

Typical DC and AC characteristics

Supply voltage (V)

4.1 5.5 6.0

5.04.5

0.8

0.9

1.1

1.2

1.0

1.3

1.4

1.5

No rm al iz e d acce s s time

Normaliz ed access time tRAC

Ambient te mperat ure (°C)

–55 80 125

35–10

0.8

0.9

1.1

1.2

1.0

1.3

1.4

1.5

No rm al iz e d acce s s time

Normalized access time tRAC

Load capacitance (pF)

50 200 250150100

20

30

50

60

40

70

80

90

Typ ica l ac ce ss time (n s)

Typical access time tRAC

vs. ambient te mper atur e Tav s. load capacitance CL

vs. supply voltage VCC

Ta = 25°C

-60

-50

-40

4.0 5.5 6.0

5.04.5

0.0

10

30

40

20

50

60

70

Supply voltage (V)

Supply current (mA)

Typical supply curre nt I CC

Ambient temperature (°C)

–55 80 125

35–10

0.0

10

30

40

20

50

60

70

Supply current (mA)

Typical supply current ICC

Cycle rate (MHz)

28

10

64

0.0

10

30

40

20

50

60

70

Power-on current (mA)

Typical powe r-on cur rent IPO

vs. ambient te mper atur e Tavs. cycle rate 1/tRC

vs. supply voltage VCC

Supply voltage (V)

4.0 5.5 6.0

5.04.5

0.0

10

30

40

20

50

60

70

Ref resh current (mA)

Typical refresh current ICC3

Ambient temperature (°C)

–55 80 125

35–10

0.0

10

30

40

20

50

60

70

Ref resh current (mA)

Typical refresh current ICC3

Supply voltage (V)

28

10

64

0.0

0.5

1.5

2.0

1.0

2.5

3.0

3.5

Stand-by curre nt (mA)

Typical TTL stand-by current ICC2

vs. ambient te mper atur e Tavs. supply voltage VCC

vs. supply voltage VCC

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AS4C14400

15

Capacitance (f = 1 MHz, Ta = Room Temperature)

Parameter Symbol Signals Test Conditions Max Unit

Input capacitance CIN1 A0 to A8 Vin = 0V 5 pF

CIN2 RAS, CAS, WE, OE Vin = 0V 7 pF

I/O capacitance CI/O I/O0 to I/O3 Vin = Vout = 0V 7 pF

Ambient temperature (°C)

060804020

0.0

0.5

1.5

2.0

1.0

2.5

3.0

3.5

Stand-by cur rent (mA)

Typical T TL st a nd-b y current ICC2

vs. ambi ent temper ature Ta

Fast page m ode curre nt (mA)

Ambient temperature (°C)

060804020

0.0

10

30

40

20

50

60

70

Fast pa ge m o de curr ent (m A )

Typical fast page mode current I CC4

Supply volta ge (V)

4.0 5.5 6.05.04.5

0.0

10

30

40

20

50

60

70

Typical fast page mode current ICC4

vs. supply voltage VCC

vs. ambient t emperat ure Ta

ALLIANCE SEMICONDUCTOR

3099 North First Street San Jose, CA 95134

(408) 383-4900 Fax (408) 383-4999

AS4C14400

Alliance Semiconductor reserves the right to make changes in this data sheet at any time to improve design and supply the best product possible. Publication of advance information does not constitute a

committment to produce or supply the product described. The company cannot assume responsibility for circuits shown or represent that they are free from patent infringement. Alliance products are not

authorized for use as critical components in life support devices or systems without the express written approval of the president of Alliance. ProMotion® and the Alliance logo are registered trademarks

of Alliance Semiconductor Corporation. All other trademarks are property of their respective holders.

®

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interACTIVE

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DISTRIBUTORS

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Please contact your rep to

locate a distributor near you

SALES OFFICES

HEADQUARTERS

Alliance Semiconductor

San Jose, CA

(408) 383-4900

NORTHEAST AREA

Alliance Semiconductor

Boston, MA

(617) 239-8127

TECHNICAL CENTER

TAIWAN

Alliance Semiconductor

Tel:+886-2-516-7995

Fax:+886-2-517-4928

alliance@netra.wow.net.tw

Ordering codes

Shaded areas contain advance information.

Part numbering system

Representatives, distributors, and sales offices

Package \ RAS Access Time 40 ns 50 ns 60 ns 70 ns

Plastic SOJ, 300 mil, 20/26-pin AS4C14400-40JC

AS4C14405-40JC

AS4C14400-50JC

AS4C14405-50JC

AS4C14400-60JC

AS4C14405-60JC

AS4C14400-70JC

AS4C14405-70JC

Plastic TSOP, 300 mil, 20/26-pin AS4C14400-40TC

AS4C14405-40TC

AS4C14400-50TC

AS4C14405-50TC

AS4C14400-60TC

AS4C14405-60TC

AS4C14400-70TC

AS4C14405-70TC

AS4C 14400 –XX X C

DRAM Prefix Device number RAS access time Package: J = SOJ 300 mil,

T = TSOP 300 mil Commercial temperature range, 0°C to 70 °C