196 5416974169 Synchronous 4-Bit Up Down Binary Counter Schottky TTL High-Speed TTL Low-Power Schottky TTL Standard TTL Low-Power TTL . Package . | Package . Package Device T Package Device T Package Device Type cl Pp Mice] Device Type le PM CF Device Type c!PIMIcF evice Type ClP cel evice Type ClPiMicr SNS4S 169 TT Tw | : SNS4LS 169 ay wil Th. SN 745 169 Na I SN74LS169 J DING [ FAIRCHILD 7 MOTOROLA " ' } OMS4L. S169 b NS.C. ror DMA 5169 PHILIPS : i SIGNETICS [~ rT SIEMENS FUJITSU HITACHI " HO TAL S169 PD MITSUBISH tf NEC TOSHIBA i ' Elecrtical Characteristics SNS4LS!169 SN74LSI69 absolute maximum ratings over operating free-air temperature range Pin Assignment (Top View) | Supply voltage, VoG iN Operating free-air SNSALS| 55T_ to 125T Input voltage __7_| temperature range | SN74LS OT to 70T Storage temperature range ~ 65T to 150T ; 7 RIPPLE OUTPUTS recommended operating conditions CARRY ENABLE L ~ a Voc OUTPUT! Qa Og Qe Qp*. LOAD SNS4LS 169 SN74LS169 UNIT * MIN NOM MAX| MIN NOM MAX Bh Supply voltage. Vcc 45 5 5.5} 4.75 5.25 v | | High-level output current, 4co 400 | uA Low-level output ~ 4 8 mA ofane Om 8 ates se ARRY Clock frequency, flock 0 25, a 25 | MHz OUTPUT Width of clock pulse, ack! thigh or low! 25 25 ns UP/DOWN Loa Data inputs 4,B,C,D 20 20 Sewp t : Enable P or T 70 20 ENABLE elup time, Pp setup Load 25 25 ns 4 2 2 5 Up Down 30 . 30 | | Hold time at any input with respect to clock, thold 0 a . ns. | Operating free-air temperature. Tm see Note 2! 55 125 9 7] Cc 8 4 6 electrical characteristics over recommended operating U/o ck A 8 c D ENABLE GND free-air temperature range DATA INPUTS PARAMETER + TEST CONDITIONS f MIN) TYP t MAX | UNIT Positive logic PVIH High-level input voltage 2 Vv Vit Low-level input voltage 0B] Vv vy Input clamp voltage _ Voo=MIN, l)=18mA 's] Vv v == Mil = VoH High-level output voltage Co=MIN, Vin= 2. 27 34 v . Vin =0.8, loH= - 400A Vv. =MIN, VIR =2V. YoL Low-level output voltage ce In=2V 035 os| V | VIL =0.8V. igi = 8maA Inpur current | A.8.G.D.F.U D 0.1 fy at maxreauen ft 6 Voo MAX. vy 7 Or; mA mpur veltage | Los 02 A.B.C.D.F.U 0 20 ty eee dy MAX. Vv) 2.7V A 14 input current ee , ee oe 20 . Load 40 A.B.C.D.P.UD 0.4 \ low:le vel Clock 7 Vv AX Ma input current oe ce M I aay o4 ma Load . 0.8 los Short-cirauit output current | Veg MAX 20 100 | mA loc Supply current Voc MAX. See Note 2 20 34, mA PARAMETER FROM TO TEST CONDITIONS MIN TYP MAX /UNIT NOTES: t. This is the voltage between two emitters of a multiple-emitter transistor. For } INPUT) (OUTPUT) these circuits, this rating applies between the count enable inputs P and T. fax 2 32 MHz 2. An SN54S 169 in the W package operating at free-air tenperatures above 91C IPLH . Fipple 23 35 requires a heat sink that provides a thermal resistance from case to free-air, PHL Clock F- Tarey 2 7% ns Rca. of not more than 26C/W. 1PLH Cy - ISpF. 1 3. log is measured after applying a momentary 4, SV.then ground, to the olock input L Clock Any RL kL. 3 2 ns with all other inputs grounded and the outputs open. TPHL Q See Figures 2 and 3 15 23 4, Propagation delay time from up/down to ripple carry must be measured with IPL Enable F Pusple 10 ia the counter at either a minimum or a maximum count. As the logic level of 0 PHL Enable oT carry | ond Note 3 10 14 "s the up/down input is changed, the ripple carry output will follow. If the count (PLH Apple 7 25 is minimum (0), the ripple carry output transition will be in ohase. tf the TPHL Up Down carry [ge] count is maximum (15 for S 169). the ripple carry output will be out of phase. + For conditions shown as MIN or MAX. use the appropriate value specified under recommended operating conditions. T All typical values are at Vog=5V, Ta = 25C. J Not more than one output should be shorted at a time. CRRA) ropagation delay time, low-to-high-level output ________ ropagation delay time, high-to-low-levei output CONTINUED ON NEXT PAGE