© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 1
One world. One KEMET
Benets
• -55°C to +85°C operating temperature range
• Lead (Pb)-Free, RoHS and REACH compliant
• Temperature stable dielectric
• EIA 0201, 0402, 0603, 0805, 1206, and 1210 case sizes
• DC voltage ratings of 4 V, 6.3 V, 10 V, 16 V, 25 V, 35 V, and 50 V
• Capacitanceofferingsrangingfrom0.01μFto100μF
• Available capacitance tolerances of ±10% and ±20%
• Non-polar device, minimizing installation concerns
• 100%puremattetin-platedterminationnishallowingfor
excellent solderability
Applications
Typicalapplicationsincludedecoupling,bypass,andltering.
Overview
KEMET’s X5R dielectric features an 85°C maximum operating
temperatureandisconsidered“semi-stable.”TheElectronics
Components, Assemblies & Materials Association (EIA)
characterizesX5RdielectricasaClassIImaterial.Components
ofthisclassicationarexed,ceramicdielectriccapacitors
suited for bypass and decoupling applications or for frequency
discriminatingcircuitswhereQandstabilityofcapacitance
characteristicsarenotcritical.X5Rexhibitsapredictablechange
incapacitancewithrespecttotimeandvoltageandboasts
aminimalchangeincapacitancewithreferencetoambient
temperature.Capacitancechangeislimitedto±15%from-55°C
to +85°C.
SurfaceMountMultilayerCeramicChipCapacitors(SMDMLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Ordering Information
C1206 C107 M 9 P A CTU
Ceramic Case Size
(L" x W")
Specication/
Series
Capacitance
Code (pF)
Capacitance
Tolerance
Rated Voltage
(VDC) Dielectric Failure Rate/
Design
Termination
Finish1
Packaging/Grade
(C–Spec)2
0201
0402
0603
0805
1206
1210
C = Standard Two
signicant
digits +
number of
zeros.
K = ±10%
M = ±20%
7 = 4
9 = 6.3
8 = 10
4 = 16
3 = 25
6 = 35
5 = 50
P = X5R A = N/A C = 100%
Matte Sn
Blank = Bulk
TU = 7" Reel
Unmarked
TM = 7" Reel
Marked
1 Additional termination nish options may be available. Contact KEMET for details.
2 Additional reeling or packaging options may be available. Contact KEMET for details.
2 The terms "Marked" and "Unmarked" pertain to laser marking option of components.
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© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Dimensions – Millimeters (Inches)
L
B
W
S
T
EIA
Size
Code
Metric
Size
Code
L
Length
W
Width
T
Thickness
B
Bandwidth
S
Separation
Minimum
Mounting
Technique
0201 0603 0.60 (0.024) ±0.03 (0.001) 0.30 (0.012) ±0.03 (0.001)
See Table 2 for
Thickness
0.15 (0.006) ±0.05 (0.002) N/A SolderReow
Only
040211005 1.00 (0.040) ±0.05 (0.002) 0.50 (0.020) ±0.05 (0.002) 0.30 (0.012) ±0.10 (0.004) 0.30 (0.012)
0603 1608 1.60 (0.063) ±0.15 (0.006) 0.80 (0.032) ±0.15 (0.006) 0.35 (0.014) ±0.15 (0.006) 0.70 (0.028)
Solder Wave or
SolderReow
0805 2012 2.00 (0.079) ±0.20 (0.008) 1.25 (0.049) ±0.20 (0.008) 0.50 (0.02) ±0.25 (0.010) 0.75 (0.030)
1206 3216 3.20 (0.126) ±0.20 (0.008) 1.60 (0.063) ±0.20 (0.008) 0.50 (0.02) ±0.25 (0.010)
N/A
121023225 3.20 (0.126) ±0.20 (0.008) 2.50 (0.098) ±0.20 (0.008) 0.50 (0.02) ±0.25 (0.010)
SolderReow
Only
1 For capacitance values ≥ 4.7 µF add 0.1 (0.004) to the width and length tolerance dimensions.
2 For capacitance values ≥ 22 µF add 0.10 (0.004) to the length and width tolerance dimension and add 0.15 (0.006) to the positive bandwidth tolerance dimension.
Qualication/Certication
CommercialGradeproductsaresubjecttointernalqualication.Detailsregardingtestmethodsandconditionsarereferencedin
Table 4, Performance & Reliability.
Environmental Compliance
Lead(Pb)-Free,RoHS,andREACHcompliantwithoutexemptions(excludingSnPbterminationnishoption).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Electrical Parameters/Characteristics
Item Parameters/Characteristics
Operating Temperature Range -55°C to +85°C
CapacitanceChangewithReferenceto+25°Cand0VDCApplied(TCC) ±15%
Aging Rate (Maximum % Capacitance Loss/Decade Hour) 5.0%
DielectricWithstandingVoltage(DWV)
250% of rated voltage
(5±1secondsandcharge/dischargenotexceeding50mA)
Dissipation Factor (DF) Maximum Limit at 25ºC See Dissipation Factor Limit Table
Insulation Resistance (IR) Limit at 25°C
See Insulation Resistance Limit Table
(Rated voltage applied for 120 ±5 seconds at 25°C)
Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part number specic
datasheet for referee time details.
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and dissipation factor (DF) measured under the following conditions:
1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF
120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as
Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric Rated DC
Voltage
Capacitance
Value
Dissipation Factor
(Maximum %)
Capacitance
Shift
Insulation
Resistance
X5R
> 25 All 3.0
±20% 10% of Initial Limit
25
< 2.2 µF 7.5
≥2.2µF 20.0
< 25 < 0.56 µF 7.5
< 25 ≥0.56µF 20.0
Dissipation Factor Limit Table
Rated
DC Voltage Capacitance Dissipation Factor
(Maximum %)
> 25 All 2.5
25
< 2.2 µF 5.0
≥2.2µF 10.0
< 25
< 0.56 µF 5.0
≥0.56µF 10.0
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Insulation Resistance Limit Table
EIA Case Size
1,000 Megohm
Microfarads or 100 GΩ
500 Megohm
Microfarads or 10 GΩ
0201 N/A ALL
0402 < 0.012 µF ≥0.012µF
0603 < 0.047 µF ≥0.047µF
0805 < 0.15 µF ≥0.15µF
1206 < 0.47 µF ≥0.47µF
1210 < 0.39 µF ≥0.39µF
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 1 – Capacitance Range/Selection Waterfall (0201 – 0805 Case Sizes)
Capacitance Capacitance
Code
Case Size/
Series C0201C C0402C C0603C C0805C
Voltage Code 7984798435798435798435
Rated Voltage (VDC)
4
6.3
10
16
4
6.3
10
16
25
50
4
6.3
10
16
25
50
4
6.3
10
16
25
50
Cap Tolerance
Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions
10,000 pF 103 K M AB AB AB AB BB BB BB BB
12,000 pF 123 K M BB BB BB BB
15,000 pF 153 K M BB BB BB BB
18,000 pF 183 K M BB BB BB BB
22,000 pF 223 K M BB BB BB BB
27,000 pF 273 K M BB BB BB BB
33,000 pF 333 K M BB BB BB BB
39,000 pF 393 K M BB BB BB BB
47,000 pF 473 K M BB BB BB BB
56,000 pF 563 K M BB BB BB BB
68,000 pF 683 K M BB BB BB BB
82,000 pF 823 K M BB BB BB BB
0.10 µF 104 K M AB AB BB BB BB BB CG CG CG CG CG
0.12 µF 124 K M
0.15 µF 154 K M
0.18 µF 184 K M
0.22 µF 224 K M BB BB CG CG CG CG
0.27 µF 274 K M CG CG CG CG
0.33 µF 334 K M CG CG CG CG
0.39 µF 394 K M CG CG CG CG
0.47 µF 474 K M BB BB CG CG CG CG DG DG DG DG DG
0.56 µF 564 K M CG CG CG CG DP DP DP DP DP
0.68 µF 684 K M CG CG CG CG DP DP DP DP DE
0.82 µF 824 K M CG CG CG CG DF DF DF DF DF
1.0 µF 105 K M BB BB BB CG CG CG CG CG DG DG DG DG DG DG
1.2 µF 125 K M DN DN DN DN
1.5 µF 155 K M DN DN DN DN
1.8 µF 185 K M DP DP DP DP
2.2 µF 225 K M BB BB BB¹ CG CG CG CG DG DG DG DG DG
2.7 µF 275 K M DL DL DL DL
3.3 µF 335 K M BB¹ CG¹ CG¹ DL DL DL DG
3.9 µF 395 K M DG DG DG DG
4.7 µF 475 K M BC¹ CG CG CG DG DG DH DH DG
5.6 µF 565 K M DG DG DG
6.8 µF 685 K M DG DG DG
8.2 µF 825 K M
10 µF 106 K M CG¹ CG¹ DG DG DG DG DG
12 µF 126 K M
15 µF 156 K M
18 µF 186 K M
22 µF 226 K M DG DG¹
27 µF 276 K M
33 µF 336 K M
39 µF 396 K M
47 µF 476 K M DH¹ DG¹
Capacitance Cap
Code
Rated Voltage (VDC)
4
6.3
10
16
4
6.3
10
16
25
50
4
6.3
10
16
25
50
4
6.3
10
16
25
50
Voltage Code 7984798354 7 98435798435
Case Size/Series C0201C C0402C C0603C C0805C
xx¹ Available only in M tolerance.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 1 – Capacitance Range/Selection Waterfall (1206 – 1812 Case Sizes)
Capacitance Capacitance
Code
Case Size/
Series C1206C C1210C C1812C
Voltage Code 98435 9 84365365
Rated Voltage (VDC)
6.3
10
16
25
50
6.3
10
16
25
35
50
25
35
50
Cap Tolerance
Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions
0.27 µF 274 K M EB EB EB EB
0.33 µF 334 K M EB EB EB EB
0.39 µF 394 K M EB EB EB EB FD FD FD FD FD
0.47 µF 474 K M EC EC EC EC FD FD FD FD FD
0.56 µF 564 K M ED ED ED ED FD FD FD FD FD
0.68 µF 684 K M EE EE EE EE FD FD FD FD FD
0.82 µF 824 K M EF EF EF EF FF FF FF FF FF
1.0 µF 105 K M EP EP EP EP FH FH FH FH FH FH
1.2 µF 125 K M EC EC EC EC FD FD FD FD
1.5 µF 155 K M EC EC EC EC FD FD FD FD
1.8 µF 185 K M EC EC EC EC FD FD FD FD
2.2 µF 225 K M EC EC EC EC FJ FJ FJ FJ
2.7 µF 275 K M EF EF EF EF FG FG FG FG
3.3 µF 335 K M EH EH EH EH FH FH FH FH
3.9 µF 395 K M ED ED ED ED FJ FJ FJ FJ
4.7 µF 475 K M EH EH EH EH EH FT FT FT FT
5.6 µF 565 K M EK EK EH FG FG FG FE
6.8 µF 685 K M EK EK EH FJ FJ FJ FJ
8.2 µF 825 K M ED ED EH FK FK FK FG
10 µF 106 K M EH EH EH EH FT FT FT FT FT¹ FT GK
12 µF 126 K M FD¹ FD FG
15 µF 156 K M FF FF FG
18 µF 186 K M FG FG FH
22 µF 226 K M EH EH¹ FS FS FS FS
27 µF 276 K M
33 µF 336 K M
39 µF 396 K M
47 µF 476 K M EH¹ EH¹ FS¹ FS¹ FS¹
100 µF 107 K M EH¹ FS¹ FS¹ FS¹
Capacitance Capacitance
Code
Rated Voltage (VDC)
6.3
10
16
25
50
6.3
10
16
25
35
50
25
35
50
Voltage Code 98435 9 84365365
Case Size/Series C1206C C1210C C1812C
xx¹ Available only in M tolerance.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 2 – Chip Thickness/Packaging Quantities
Thickness
Code
Case
Size
Thickness ±
Range (mm)
Paper Quantity Plastic Quantity
7" Reel 13" Reel 7" Reel 13" Reel
0201
0.30 ± 0.03
15,000
0
0
0
0402
0.50 ± 0.05
10,000
50,000
0
0
0402
0.50 ± 0.10
10,000
50,000
0
0
0603
0.80 ± 0.10*
4,000
15,000
0
0
0805
0.78 ± 0.10*
4,000
15,000
0
0
0805
0.90 ± 0.10*
4,000
15,000
0
0
0805
0.95 ± 0.10
0
0
4,000
10,000
0805
1.00 ± 0.10
0
0
2,500
10,000
0805
1.10 ± 0.10
0
0
2,500
10,000
0805
1.25 ± 0.15
0
0
2,500
10,000
0805
1.25 ± 0.20
0
0
2,500
10,000
1206
0.78 ± 0.10
4,000
10,000
4,000
10,000
1206
0.80 ± 0.10
0
0
2,000
8,000
1206
0.90 ± 0.10
0
0
4,000
10,000
1206
1.00 ± 0.10
0
0
2,500
10,000
1206
1.10 ± 0.10
0
0
2,500
10,000
1206
1.20 ± 0.15
0
0
2,500
10,000
1206
1.20 ± 0.20
0
0
2,500
10,000
1206
1.60 ± 0.20
0
0
2,000
8,000
1210
0.95 ± 0.10
0
0
4,000
10,000
1210
1.00 ± 0.10
0
0
2,500
10,000
1210
1.10 ± 0.10
0
0
2,500
10,000
1210
1.25 ± 0.15
0
0
2,500
10,000
1210
1.55 ± 0.15
0
0
2,000
8,000
1210
1.85 ± 0.20
0
0
2,000
8,000
1210
1.90 ± 0.20
0
0
1,500
4,000
1210
2.10 ± 0.20
0
0
2,000
8,000
1210
2.50 ± 0.30
0
0
1,000
4,000
1812
1.60 ± 0.20
0
0
1,000
4,000
Thickness
Code
Case
Size
Thickness ±
Range (mm)
7" Reel 13" Reel 7" Reel 13" Reel
Paper Quantity Plastic Quantity
Package quantity based on nished chip thickness specications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
EIA
Size
Code
Metric
Size
Code
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
C
Y
X
V1
V2
C
Y
X
V1
V2
C
Y
X
V1
V2
0201 0603 0.38 0.56 0.52 1.80 1.00 0.33 0.46 0.42 1.50 0.80 0.28 0.36 0.32 1.20 0.60
0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.40 0.52 0.52 1.60 0.80
0603 1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20
0805 2012 1.00 1.35 1.55 4.40 2.60 0.90 1.15 1.45 3.50 2.00 0.75 0.95 1.35 2.80 1.70
1206 3216 1.60 1.35 1.90 5.60 2.90 1.50 1.15 1.80 4.70 2.30 1.40 0.95 1.70 4.00 2.00
1210 3225 1.60 1.35 2.80 5.65 3.80 1.50 1.15 2.70 4.70 3.20 1.40 0.95 2.60 4.00 2.90
121013225 1.50 1.60 2.90 5.60 3.90 1.40 1.40 2.80 4.70 3.30 1.30 1.20 2.70 4.00 3.00
1 Only for capacitance values ≥ 22 µF
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reow solder
processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualication
testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
Image below based on Density Level B for an EIA 1210 case size.
Y
C C
X X
V1
V2
Grid Placement Courtyard
Y
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Soldering Process
Recommended Soldering Technique:
•SolderwaveorsolderreowforEIAcasesizes0603,0805and1206
•AllotherEIAcasesizesarelimitedtosolderreowonly
Recommended Reow Soldering Prole:
KEMET’sfamiliesofsurfacemountmultilayerceramiccapacitors(SMDMLCCs)arecompatiblewithwave(singleordual),convection,
IRorvaporphasereowtechniques.Preheatingofthesecomponentsisrecommendedtoavoidextremethermalstress.KEMET’s
recommendedproleconditionsforconvectionandIRreowreecttheproleconditionsoftheIPC/J-STD-020standardformoisture
sensitivitytesting.Thesedevicescansafelywithstandamaximumofthreereowpassesattheseconditions.
Prole Feature Termination Finish
SnPb 100% Matte Sn
Preheat/Soak
Temperature Minimum (TSmin)
100°C
150°C
Temperature Maximum (T
Smax
)150°C 200°C
Time (tS) from TSmin to TSmax
60 – 120 seconds
60 – 120 seconds
Ramp-Up Rate (TL to TP)3°C/second maximum 3°C/second maximum
Liquidous Temperature (TL)183°C 217°C
Time Above Liquidous (tL) 60 – 150 seconds 60 – 150 seconds
Peak Temperature (TP)235°C 260°C
TimeWithin5°CofMaximum
Peak Temperature (tP)20 seconds maximum 30 seconds maximum
Ramp-Down Rate (TP to TL)6°C/second maximum 6°C/second maximum
Time 25°C to Peak
Temperature 6 minutes maximum 8 minutes maximum
Note 1: All temperatures refer to the center of the package, measured on the
capacitor body surface that is facing up during assembly reow.
Time
Temperature
Tsmin
25°C to Peak
tL
tS
25
tP
Tsmax
TL
TPMaximum Ramp Up Rate = 3°C/sec
Maximum Ramp Down Rate = 6°C/sec
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Reference
Test or Inspection Method
TerminalStrength JIS–C–6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Board Flex JIS–C–6429
Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G.
Flexible termination system – 3.0 mm (minimum).
Solderability J–STD–002
Magnication50X.Conditions:
a)MethodB,4hoursat155°C,dryheatat235°C
b)MethodBat215°Ccategory3
c)MethodD,category3at260°C
Temperature Cycling JESD22MethodJA–104 1,000Cycles(-55°Cto+125°C).Measurementat24hours+/-2hoursaftertestconclusion.
Biased Humidity MIL–STD–202Method103
LoadHumidity:1,000hours85°C/85%RHandratedvoltage.Add100Kohmresistor.
Measurementat24hours+/-2hoursaftertestconclusion.
LowVoltHumidity:1,000hours85°C/85%RHand1.5V.Add100Kohmresistor.
Measurementat24hours+/-2hoursaftertestconclusion.
Moisture Resistance MIL–STD–202Method106
t=24hours/cycle.Steps7aand7bnotrequired.Unpowered.
Measurementat24hours+/-2hoursaftertestconclusion.
ThermalShock MIL–STD–202Method107
-55°C/+125°C. Note: Number of cycles required – 300. Maximum transfer time – 20 seconds. Dwell
time – 15 minutes. Air – Air.
HighTemperatureLife MIL–STD–202Method108
/EIA–198
1,000hoursat85°Cwith2Xratedvoltageappliedexcludingthefollowing:
Case Size Capacitance Applied Voltage
0402
≥0.22µF
1.5 X
0603 ≥1.0µF
0805 ≥4.7µF
1206 ≥2.2µF
1210 ≥10µF
Storage Life MIL–STD–202Method108 150°C,0VDCfor1,000hours.
Vibration MIL–STD–202Method204
5g'sfor20minutes,12cycleseachof3orientations.Note:Use8"X5"PCB0.031"thick7secure
pointsononelongsideand2securepointsatcornersofoppositesides.Partsmountedwithin2"
from any secure point. Test from 10 – 2,000 Hz
MechanicalShock MIL–STD–202Method213 Figure1ofMethod213,ConditionF.
Resistance to Solvents MIL–STD–202Method215 Addaqueouswashchemical,OKEMCleanorequivalent.
Storage and Handling
Ceramicchipcapacitorsshouldbestoredinnormalworkingenvironments.Whilethechipsthemselvesarequiterobustinother
environments,solderabilitywillbedegradedbyexposuretohightemperatures,highhumidity,corrosiveatmospheres,andlongterm
storage.Inaddition,packagingmaterialswillbedegradedbyhightemperature–reelsmaysoftenorwarpandtapepeelforcemay
increase.KEMETrecommendsthatmaximumstoragetemperaturenotexceed40ºCandmaximumstoragehumiditynotexceed70%
relativehumidity.Temperatureuctuationsshouldbeminimizedtoavoidcondensationonthepartsandatmospheresshouldbefreeof
chlorineandsulfurbearingcompounds.Foroptimizedsolderabilitychipstockshouldbeusedpromptly,preferablywithin1.5yearsof
receipt.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Construction (Typical)
Dielectric Material
(BaTiO3)
Detailed Cross Section
Barrier Layer
(Ni)
Base Metal
(Cu)
Inner Electrodes
(Ni)
Termination Finish
(100% Matte Sn)
Barrier Layer
(Ni)
Base Metal
(Cu)
Termination Finish
(100% Matte Sn)
Inner Electrodes
(Ni)
Dielectric Material
(BaTiO3)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Capacitor Marking (Optional):
Thesesurfacemountmultilayerceramiccapacitorsare
normallysuppliedunmarked.Ifrequired,theycanbemarked
as an extra cost option. Marking is available on most KEMET
devicesbutmustberequestedusingthecorrectordering
codeidentier(s).Ifthisoptionisrequested,twosidesofthe
ceramicbodywillbelasermarkedwitha“K”toidentifyKEMET,
followedbytwocharacters(perEIA–198-seetablebelow)to
identifythecapacitancevalue.EIA0603casesizedevicesare
limitedtothe“K”characteronly.
Laser marking option is not available on:
• C0G, Ultra Stable X8R and Y5V dielectric devices
• EIA 0402 case size devices
• EIA0603casesizedeviceswithFlexibleTerminationoption.
• KPS Commercial and Automotive Grade stacked devices.
• X7R dielectric products in capacitance values outlined below
Marking appears in legible contrast. Illustrated below is an
exampleofanMLCCwithlasermarkingof“KA8”,which
designatesaKEMETdevicewithratedcapacitanceof100µF.
Orientation of marking is vendor optional.
EIA Case Size Metric Size Code Capacitance
0603
1608
≤170pF
0805
2012
≤150pF
1206
3216
≤910pF
1210
3225
≤2,000pF
1808
4520
≤3,900pF
1812
4532
≤6,700pF
1825
4564
≤0.018µF
2220
5650
≤0.027µF
2225
5664
≤0.033µF
KEMET
ID
2-Digit
Capacitance
Code
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Capacitor Marking (Optional) cont’d
Capacitance (pF) For Various Alpha/Numeral Identi ers
Alpha
Character
Numeral
9
0
1
2
3
4
5
6
7
8
Capacitance (pF)
A
0.1
1 0
10
100
1,000
10,000
100,000
1,000,000
10,000,000
100,000,000
B
0.11
1.1
11
110
1,10 0
11,000
110,000
1,100,000
11,000,000
110,000,000
C
0.12
1 2
12
120
1,200
12,000
120,000
1,200,000
12,000,000
120,000,000
D
0.13
1 3
13
130
1,300
13,000
130,000
1,300,000
13,000,000
130,000,000
E
0.15
1 5
15
150
1,500
15,000
150,000
1,500,000
15,000,000
150,000,000
F
0.16
1 6
16
160
1,600
16,000
160,000
1,600,000
16,000,000
160,000,000
G
0.18
1 8
18
180
1,800
18,000
180,000
1,800,000
18,000,000
180,000,000
H
0.2
2 0
20
200
2,000
20,000
200,000
2,000,000
20,000,000
200,000,000
J
0.22
2 2
22
220
2,200
22,000
220,000
2,200,000
22,000,000
220,000,000
K
0.24
2.4
24
240
2,400
24,000
240,000
2,400,000
24,000,000
240,000,000
L
0.27
2.7
27
270
2,700
27,000
270,000
2,700,000
27,000,000
270,000,000
M
0.3
3 0
30
300
3,000
30,000
300,000
3,000,000
30,000,000
300,000,000
N
0.33
3 3
33
330
3,300
33,000
330,000
3,300,000
33,000,000
330,000,000
P
0.36
3 6
36
360
3,600
36,000
360,000
3,600,000
36,000,000
360,000,000
Q
0.39
3 9
39
390
3,900
39,000
390,000
3,900,000
39,000,000
390,000,000
R
0.43
4 3
43
430
4,300
43,000
430,000
4,300,000
43,000,000
430,000,000
S
0.47
4.7
47
470
4,700
47,000
470,000
4,700,000
47,000,000
470,000,000
T
0.51
5.1
51
510
5,100
51,000
510,000
5,100,000
51,000,000
510,000,000
U
0.56
5 6
56
560
5,600
56,000
560,000
5,600,000
56,000,000
560,000,000
V
0.62
6 2
62
620
6,200
62,000
620,000
6,200,000
62,000,000
620,000,000
W
0.68
6 8
68
680
6,800
68,000
680,000
6,800,000
68,000,000
680,000,000
X
0.75
7 5
75
750
7,500
75,000
750,000
7,500,000
75,000,000
750,000,000
Y
0.82
8 2
82
820
8,200
82,000
820,000
8,200,000
82,000,000
820,000,000
Z
0.91
9.1
91
910
9,100
91,000
910,000
9,100,000
91,000,000
910,000,000
a
0.25
2 5
25
250
2,500
25,000
250,000
2,500,000
25,000,000
250,000,000
b
0.35
3 5
35
350
3,500
35,000
350,000
3,500,000
35,000,000
350,000,000
d
0.4
4 0
40
400
4,000
40,000
400,000
4,000,000
40,000,000
400,000,000
e
0.45
4 5
45
450
4,500
45,000
450,000
4,500,000
45,000,000
450,000,000
f
0.5
5 0
50
500
5,000
50,000
500,000
5,000,000
50,000,000
500,000,000
m
0.6
6 0
60
600
6,000
60,000
600,000
6,000,000
60,000,000
600,000,000
n
0.7
7 0
70
700
7,000
70,000
700,000
7,000,000
70,000,000
700,000,000
t
0.8
8 0
80
800
8,000
80,000
800,000
8,000,000
80,000,000
800,000,000
y
0.9
9 0
90
900
9,000
90,000
900,000
9,000,000
90,000,000
900,000,000
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMEToffersmultilayerceramicchipcapacitorspackagedin8,12and16mmtapeon7"and13"reelsinaccordancewithEIA
Standard481.Thispackagingsystemiscompatiblewithalltape-fedautomaticpickandplacesystems.SeeTable2fordetailson
reelingquantitiesforcommercialchips.
8 mm, 12 mm
or 16 mm Carrier Tape
178 mm (7.00")
or
330 mm (13.00")
Anti-Static Reel
Embossed Plastic* or
Punched Paper Carrier.
Embossment or Punched Cavity
Anti-Static Cover Tape
(.10 mm (.004") Maximum Thickness)
Chip and KPS Orientation in Pocket
(except 1825 Commercial, and 1825 and 2225 Military)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
KEMET
®
Bar Code Label
Sprocket Holes
Table 5 – Carrier Tape Con guration, Embossed Plastic & Punched Paper (mm)
EIA Case Size Tape size (W)*
Embossed Plastic
Punched Paper
7" Reel 13" Reel 7" Reel 13" Reel
Pitch(P1)* Pitch(P1)*
01005 – 0402 8 2 2
0603 8 4 4
0805 8 4444
1206 – 1210 8 4444
1805 – 1808 12 4 4
≥1812 12 8 8
KPS 1210 12 8 8
KPS 1812 & 2220 16 12 12
Array 0508 & 0612 8 4 4
*Refer to Figures 1 & 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 & 7 for tolerance speci cations.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
Po
T
F
W
Center Lines of Cavity
Ao
Bo
User Direction of Unreeling
Cover Tape
Ko
B
1
is for tape feeder reference only,
including draft concentric about B
o.
T
2
ØD
1
ØDo
B
1
S
1
T
1
E
1
E
2
P
1
P
2
Embossment
For cavity size,
see Note 1 Table 4
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D0
D
1
Minimum
Note 1
E1P0 P2
R Reference
Note 2
S
1
Minimum
Note 3
T
Maximum
T
1
Maximum
8 mm
1.5 +0.10/-0.0
(0.059 +0.004/-0.0)
1.0
(0.039)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
25.0
(0.984)
0.600
(0.024)
0.600
(0.024)
0.100
(0.004)
12 mm 1.5
(0.059)
30
(1.181)
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch
B
1
Maximum
Note 4
E
2
Minimum
F P1
T
2
Maximum
W
Maximum
A0,B0 & K0
8 mm Single (4 mm)
4.35
(0.171)
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
2.5
(0.098)
8.3
(0.327)
Note 512 mm
Single (4 mm) &
Double (8 mm)
8.2
(0.323)
10.25
(0.404)
5.5 ±0.05
(0.217 ±0.002)
8.0 ±0.10
(0.315 ±0.004)
4.6
(0.181)
12.3
(0.484)
16 mm Triple (12 mm)
12.1
(0.476)
14.25
(0.561)
7.5 ±0.05
(0.138 ±0.002)
12.0 ±0.10
(0.157 ±0.004)
4.6
(0.181)
16.3
(0.642)
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity de ned by A0, B0 and K0 shall surround the component with suf cient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
User Direction of Unreeling
Top Cover Tape
T
Center Lines of Cavity
P
1
ØDo Po
P
2
E
1
F
E
2
W
G
A
0
B
0
Cavity Size,
See
Note 1, Table 7
Bottom Cover Tape
T
1
T
1
Bottom Cover Tape
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D0E1P0P2T1 Maximum G Minimum
R Reference
Note 2
8 mm 1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
0.10
(0.004) Maximum
0.75
(0.030)
25
(0.984)
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch E2 Minimum F P1 T Maximum W Maximum A0 B0
8 mm Half (2 mm) 6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
2.0 ±0.05
(0.079 ±0.002)
1.1
(0.098)
8.3
(0.327)
Note 1
8 mm Single (4 mm)
4.0 ±0.10
(0.157 ±0.004)
8.3
(0.327)
1. The cavity de ned by A0, B0 and T shall surround the component with suf cient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
c) rotation of the component is limited to 20° maximum (see Figure 3).
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 17
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: Thetotalpeelstrengthofthecovertapefromthecarriertapeshallbe:
Tape Width Peel Strength
8 mm 0.1 to 1.0 Newton (10 to 100 gf)
12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf)
Thedirectionofthepullshallbeoppositethedirectionofthecarriertapetravel.Thepullangleofthecarriertapeshallbe165°to180°
fromtheplaneofthecarriertape.Duringpeeling,thecarrierand/orcovertapeshallbepulledatavelocityof300±10mm/minute.
3. Labeling:Barcodelabeling(standardorcustom)shallbeonthesideofthereeloppositethesprocketholes.Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
Ao
Bo
°
T
°
s
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Tape Maximum
Width (mm) Rotation (°
T)
8,12 20
16 – 200 10 Tape Maximum
Width (mm) Rotation ( °
S)
8,12 20
16 – 56 10
72 – 200 5
Typical Pocket Centerline
Typical Component Centerline
Figure 4 – Maximum Lateral Movement
0.5 mm maximum
0.5 mm maximum
8 mm & 12 mm Tape
1.0 mm maximum
1.0 mm maximum
16 mm Tape
Figure 5 – Bending Radius
RR
Bending
Radius
Embossed
Carrier
Punched
Carrier
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 18
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 6 – Reel Dimensions
AD(See Note)
Full Radius,
See Note
B(see Note)
Access Hole at
Slot Location
(Ø 40 mm minimum)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
W3(Includes
flange distortion
at outer edge)
W2(Measured at hub)
W1(Measured at hub)
C
(Arbor hole
diameter)
Note: Drive spokes optional; if used, dimensions B and D shall apply.
N
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size A B Minimum CD Minimum
8 mm 178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/-0.2
(0.521 +0.02/-0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size N Minimum W
1
W
2
Maximum W
3
8 mm
50
(1.969)
8.4 +1.5/-0.0
(0.331 +0.059/-0.0)
14.4
(0.567)
Shallaccommodatetapewidth
withoutinterference
12 mm
12.4 +2.0/-0.0
(0.488 +0.078/-0.0)
18.4
(0.724)
16 mm
16.4 +2.0/-0.0
(0.646 +0.078/-0.0)
22.4
(0.882)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 19
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 7 – Tape Leader & Trailer Dimensions
Trailer
160 mm Minimum
Carrier Tape
END START
Round Sprocket Holes
Elongated Sprocket Holes
(32 mm tape and wider)
Top Cover Tape
Top Cover Tape
Punched Carrier
8 mm & 12 mm only
Embossed Carrier
Components
100 mm
Minimum Leader
400 mm Minimum
Figure 8 – Maximum Camber
Carrier Tape
Round Sprocket Holes
1 mm Maximum, either direction
Straight Edge
250 mm
Elongated sprocket holes
(32 mm & wider tapes)
Bulk Cassette Packaging (Ceramic Chips Only)
Meets Dimensional Requirements IEC–286 and EIAJ 7201
Unit mm *Reference
110 ± 0.7
31.5 ± 0
0.2
36 ± 0
0.2
19.0*
5 0*
10*
53 3*
68 ± 0.1
88 ± 0.1
12.0 ± 0.1
3.0 ± 0
0.2
2.0 ± 0.1
0
1.5 ± 0
0.1
Capacitor Dimensions for Bulk Cassette
Cassette Packaging – Millimeters
EIA Size
Code
Metric Size
Code
L Length W Width B Bandwidth
S Separation
Minimum
T Thickness
Number of
Pieces/Cassette
0402 1005 1.0 ±0.05 0.5 ±0.05 0.2 to 0.4 0.3 0.5 ±0.05 50,000
0603 1608 1.6 ±0.07 0.8 ±0.07 0.2 to 0.5 0.7 0.8 ±0.07 15,000
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 20
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
KEMET Corporation
World Headquarters
2835 KEMET Way
Simpsonville, SC 29681
Mailing Address:
P.O. Box 5928
Greenville, SC 29606
www.kemet.com
Tel: 864-963-6300
Fax: 864-963-6521
Corporate Of ces
Fort Lauderdale, FL
Tel: 954-766-2800
North America
Southeast
Lake Mary, FL
Tel: 407-855-8886
Northeast
Wilmington, MA
Tel: 978-658-1663
Central
Novi, MI
Tel: 248-306-9353
West
Milpitas, CA
Tel: 408-433-9950
Mexico
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Tel: 52-33-3123-2141
Europe
Southern Europe
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Tel: 39-051-939111
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Tel: 389-2-55-14-623
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Tel: 49-8191-3350800
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Tel: 49-2307-438110
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Tel: 44-1279-460122
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Tel: 358-9-5406-5000
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Tel: 852-2305-1168
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Tel: 86-755-2518-1306
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Tel: 86-10-5877-1075
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Tel: 86-21-6447-0707
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Tel: 82-2-6294-0550
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Tel: 886-2-27528585
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Tel: 65-6701-8033
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Tel: 60-4-6430200
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Tel: 91-806-53-76817
Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not
assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of
KEMET Electronics Corporation.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1006_X5R_SMD • 3/4/2015 21
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Disclaimer
Allproductspecications,statements,informationanddata(collectively,the“Information”)inthisdatasheetaresubjecttochange.Thecustomerisresponsibleforcheckingand
verifyingtheextenttowhichtheInformationcontainedinthispublicationisapplicabletoanorderatthetimetheorderisplaced.
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AlthoughKEMETdesignsandmanufacturesitsproductstothemoststringentqualityandsafetystandards,giventhecurrentstateoftheart,isolatedcomponentfailuresmaystill
occur.Accordingly,customerapplicationswhichrequireahighdegreeofreliabilityorsafetyshouldemploysuitabledesignsorothersafeguards(suchasinstallationofprotective
circuitryorredundancies)inordertoensurethatthefailureofanelectricalcomponentdoesnotresultinariskofpersonalinjuryorpropertydamage.
Althoughallproduct–relatedwarnings,cautionsandnotesmustbeobserved,thecustomershouldnotassumethatallsafetymeasuresareindictedorthatothermeasuresmaynot
be required.