DS26LS31C, DS26LS31M
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SNOSBK1C –JUNE 1998–REVISED APRIL 2013
DS26LS31C/DS26LS31M Quad High Speed Differential Line Driver
Check for Samples: DS26LS31C,DS26LS31M
1FEATURES DESCRIPTION
The DS26LS31 is a quad differential line driver
2• Output Skew—2.0 ns Typical designed for digital data transmission over balanced
• Input to output delay—10 ns Typical lines. The DS26LS31 meets all the requirements of
• Operation from Single 5V Supply EIA Standard RS-422 and Federal Standard 1020. It
is designed to provide unipolar differential drive to
• Outputs Won't Load Line when VCC = 0V twisted-pair or parallel-wire transmission lines.
• Four Line Drivers in One Package for The circuit provides an enable and disable function
Maximum Package Density common to all four drivers. The DS26LS31 features
• Output Short-Circuit Protection TRI-STATE outputs and logically ANDed
• Complementary Outputs complementary outputs. The inputs are all LS
• Meets the Requirements of EIA Standard RS- compatible and are all one unit load.
422
• Pin Compatible with AM26LS31
• Available in Military and Commercial
Temperature Range
Logic and Connection Diagrams
Top View
For Complete Military Product Specifications, refer to the appropriate SMD or MDS.
Figure 1. PDIP Package
See Package D0016A or NFG0016E
See Package Numbers NAJ0020A, NFE0016A or NAD0016A
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DS26LS31C, DS26LS31M
SNOSBK1C –JUNE 1998–REVISED APRIL 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Supply Voltage 7V
Input Voltage 7V
Output Voltage 5.5V
Output Voltage (Power OFF) −0.25 to 6V
Maximum Power Dissipation (3) at 25°C
Cavity Package 1509 mW
NFG0016E Package 1476 mW
D0016A Package 1051 mW
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be verified. They are not meant to imply
that the devices should be operated at these limits. The Electrical Characteristics provide conditions for actual device operation.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) Derate cavity package 10.1 mW/°C above 25°C; derate molded DIP package 11.9 mW/°C above 25°C; derate SO package 8.41 mW/°C
above 25°C.
Operating Conditions Min Max Units
Supply Voltage, VCC
DS26LS31M 4.5 5.5 V
DS26LS31 4.75 5.25 V
Temperature, TA
DS26LS31M −55 +125 °C
DS26LS31 0 +70 °C
Electrical Characteristics(1)(2)(3)
Parameter Test Conditions Min Typ Max Units
VOH Output High Voltage IOH =−20 mA 2.5 V
VOL Output Low Voltage IOL = 20 mA 0.5 V
VIH Input High Voltage 2.0 V
VIL Input Low Voltage 0.8 V
IIL Input Low Current VIN = 0.4V −40 −200 μA
IIH Input High Current VIN = 2.7V 20 μA
IIInput Reverse Current VIN = 7V 0.1 mA
IOTRI-STATE Output Current VO= 2.5V 20 μA
VO= 0.5V −20 μA
VCL Input Clamp Voltage IIN =−18 mA −1.5 V
ISC Output Short-Circuit Current −30 −150 mA
ICC Power Supply Current All Outputs Disabled or Active 35 60 mA
(1) Unless otherwise specified min/max limits apply across the −55°C to +125°C temperature range for the DS726LS31M and across the
0°C to +70°C range for the DS26LS31. All typicals are given for V CC = 5V and TA= 25°C.
(2) All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless
otherwise specified.
(3) Only one output at a time should be shorted.
2Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS26LS31C DS26LS31M
DS26LS31C, DS26LS31M
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SNOSBK1C –JUNE 1998–REVISED APRIL 2013
Switching Characteristics
VCC = 5V, TA= 25°C
Parameter Test Conditions Min Typ Max Units
tPLH Input to Output CL= 30 pF 10 15 ns
tPHL Input to Output CL= 30 pF 10 15 ns
Skew Output to Output CL= 30 pF 2.0 6.0 ns
tLZ Enable to Output CL= 10 pF, S2 Open 15 35 ns
tHZ Enable to Output CL= 10 pF, S1 Open 15 25 ns
tZL Enable to Output CL= 30 pF, S2 Open 20 30 ns
tZH Enable to Output CL= 30 pF, S1 Open 20 30 ns
AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS
S1 and S2 of load circuit are closed except where shown.
Figure 2. AC Test Circuit
f = 1 MHz, tr≤15 ns, tf≤6 ns
Figure 3. Propagation Delays
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Product Folder Links: DS26LS31C DS26LS31M
DS26LS31C, DS26LS31M
SNOSBK1C –JUNE 1998–REVISED APRIL 2013
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f = 1 MHz, tr≤15 ns, tf≤6 ns
Figure 4. Enable and Disable Times
TYPICAL APPLICATIONS
RTis optional although highly recommended to reduce reflection.
Figure 5. Two-Wire Balanced System, RS-422
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Product Folder Links: DS26LS31C DS26LS31M
DS26LS31C, DS26LS31M
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SNOSBK1C –JUNE 1998–REVISED APRIL 2013
Typical Performance Characteristics
DS26LS31CN Unloaded IC
vs DS26LS31 ICC
Frequency vs VCC
vs TAvs TA
Figure 6. Figure 7.
DS26LS31CN VOH DS26LS31CN VOL
vs IOH vs IOL
vs TAvs TA
Figure 8. Figure 9.
DS26LS31CN VOD
vs IO
vs TA
Figure 10.
Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: DS26LS31C DS26LS31M
DS26LS31C, DS26LS31M
SNOSBK1C –JUNE 1998–REVISED APRIL 2013
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REVISION HISTORY
Changes from Revision B (April 2013) to Revision C Page
• Changed layout of National Data Sheet to TI format ............................................................................................................ 5
6Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS26LS31C DS26LS31M
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
DS26LS31CM/NOPB ACTIVE SOIC D 16 48 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS31CM
DS26LS31CMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS31CM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
DS26LS31CMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Oct-2016
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DS26LS31CMX/NOPB SOIC D 16 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Oct-2016
Pack Materials-Page 2
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