PF910-03 Micro MINI S1C60N03 4-bit Single Chip Microcomputer ge oltan V o Lowerati ts p c u O od Pr S1C6200B Core CPU Low Voltage and Low Power Built-in LCD Driver Low Cost Performance DESCRIPTION The S1C60N03 Series single-chip microcomputer features an S1C6200B CMOS 4-bit CPU as the core. It contains a 768 (words) x 12 (bits) ROM, 64 (words) x 4 (bits) RAM, LCD driver , 4-bit input port (K00-K03), 4-bit output port (R00-R03) and a timer. The S1C60N03 Series is configured as follows, depending on the supply voltage. S1C60N03: 3.0 V (1.8 to 3.6 V) S1C60L03: 1.5 V (1.2 to 2.0 V) FEATURES Core CPU .............................................. S1C6200B Built-in oscillation circuit ........................ Crystal 32.768 kHz (Typ.) or CR oscillation circuit 65 kHz (Typ.) Instruction set ........................................ 100 instructions ROM capacity ........................................ 768 words x 12 bits RAM capacity ........................................ 64 words x 4 bits Input port ............................................... 4 bits (pull-down resistors are available by mask option) Output ports .......................................... 4 bits (clock and buzzer outputs are possible by mask option) LCD driver ............................................. 15 segments x 4, 3 or 2 commons (1/4, 1/3 or 1/2 duty are selectable by mask option) Timer ..................................................... 1 system (clock timer) built-in Interrupt ................................................. External: Input port interrupt Internal: Timer interrupt 1 system 1 system Supply voltage ....................................... 1.5 V (1.2 to 2.0 V) S1C60L03 3.0 V (1.8 to 3.6 V) S1C60N03 Current consumption (Typ.) .................. During HALT: 1.0 A (32 kHz crystal, with power divider OFF) During execution: 2.5 A (32 kHz crystal, with power divider OFF) 15 A (32 kHz crystal, with power divider ON) Supply form ........................................... Chip 1 S1C60N03 BLOCK DIAGRAM ROM System Reset Control 768 words x 12 bits RESET Core CPU S1C6200B OSC1 OSC2 OSC Interrupt Generator RAM Input Port K00-K03 64 words x 4 bits COM0-3 SEG0-14 TEST R00 (FOUT, BUZZER)1 R01 (BUZZER)1 R02, R03 Output Port LCD Driver 15 SEG x 4 COM FOUT & Buzzer VDD CA, CB VS2 VSS Power Controller Clock Timer 1: Terminal specifications can be selected by mask option. PAD LAYOUT Pad Layout Diagram 15 10 5 1 2.03 mm Y 35 (0, 0) X 30 Die No. 20 25 Chip thickness: 400 m Pad opening: 95 m 2.32 mm Pad Coordinates No. 1 2 3 4 5 6 7 8 9 10 11 12 2 (unit: m) Pad name TEST SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 X 980 850 720 590 460 330 200 70 -60 -190 -320 -450 Y 849 849 849 849 849 849 849 849 849 849 849 849 No. 13 14 15 16 17 18 19 20 21 22 23 24 Pad name SEG3 SEG2 SEG1 SEG0 COM0 COM1 COM2 COM3 CA CB VS2 VSS X -580 -710 -840 -970 -983 -853 -723 -593 -463 -333 -203 -50 Y 849 849 849 849 -849 -849 -849 -849 -849 -849 -849 -849 No. 25 26 27 28 29 30 31 32 33 34 35 36 Pad name OSC2 OSC1 VDD RESET R00 R01 R02 R03 K00 K01 K02 K03 X 80 210 340 470 994 994 994 994 994 994 994 994 Y -849 -849 -849 -849 -760 -542 -403 -269 -120 10 140 270 S1C60N03 PAD DESCRIPTION Pad name Pad No. I/O VDD 27 (I) VSS 24 (I) VS2 23 O CA, CB 21, 22 - OSC1 26 I OSC2 25 O K00-03 33-36 I R00 29 O R01 30 O R02, R03 31, 32 O SEG0-14 2-16 O COM0-3 17-20 O RESET 28 I TEST 1 I Can be selected by mask option Function Power supply terminal (+) Power supply terminal (-) LCD system voltage doubler (2*VSS)/halver (VSS/2) output Booster capacitor connecting terminal Crystal or CR oscillation input terminal Crystal or CR oscillation output terminal Input port terminal Output port terminal, BUZZER or FOUT output terminal Output port terminal or BUZZER output terminal Output port terminal LCD segment output or DC output terminal LCD common output terminal (1/4, 1/3 or 1/2 duty are selectable ) Initial reset input terminal Test input terminal OPTION LIST 1. DEVICE TYPE 1. E0C6003 (Normal Type ) 2. E0C60L03 (Low Power Type ) 2. LCD SPECIFICATION * BIAS SELECTION ...................... 1. 1/3 Bias By Voltage Divider 2. 1/2 Bias By Voltage Divider 3. 1/2 Bias By Doubler/Halver * DUTY SELECTION ..................... 1. 1/4 Duty 2. 1/3 Duty 3. 1/2 Duty 3. OSC1 SYSTEM CLOCK 1. Crystal 2. CR 4. MULTIPLE KEY ENTRY RESET * COMBINATION ........................... 1. Not Use 2. Use K00, K01 3. Use K00, K01, K02 4. Use ALL K00-K03 5. INTERRUPT NOISE REJECTOR * K00-K03 ..................................... 1. Use 2. Not Use 6. TIMER INTERRUPT FREQUENCY * INTERRUPT FREQUENCY ........ 1. 32/16/2 Hz Interrupt 2. 64/16/2 Hz Interrupt 7. INPUT PORT PULL DOWN RESISTOR * K00 .............................................. 1. With Resistor * K01 .............................................. 1. With Resistor * K02 .............................................. 1. With Resistor * K03 .............................................. 1. With Resistor 2. Gate Direct 2. Gate Direct 2. Gate Direct 2. Gate Direct 8. R00 SPECIFICATION * OUTPUT TYPE ........................... 1. DC Output 2. Buzzer Inverted Output (R00 Control) 3. FOUT Output 3 S1C60N03 * FOUT OUTPUT SPACIFICATION F1 ........... 1. 256[Hz] 2. 512[Hz] 3. 1,024[Hz] 4. 2,048[Hz] 5. 4,096[Hz] F2 ........... 1. 512[Hz] 2. 1,024[Hz] 3. 2,048[Hz] 4. 4,096[Hz] 5. 8,192[Hz] F3 ........... F4 ........... 1. 2. 3. 4. 5. 1. 2. 3. 4. 5. 1,024[Hz] 2,048[Hz] 4,096[Hz] 8,192[Hz] 16,384[Hz] 2,048[Hz] 4,096[Hz] 8,192[Hz] 16,384[Hz] 32,768[Hz] * OUTPUT SPECIFICATION ........... 1. Complementary 2. Pch-Open Drain 9. R01 SPECIFICATION * OUTPUT TYPE ............................. 1. DC Output * OUTPUT SPECIFICATION ........... 1. Complementary 2. Buzzer Output 2. Pch-Open Drain 10. R02, R03 SPECIFICATION * R02 OUTPUT SPECIFICATION ... 1. Complementary * R03 OUTPUT SPECIFICATION ... 1. Complementary 2. Pch-Open Drain 2. Pch-Open Drain ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (VDD=0V) Rating Value Unit Symbol Supply voltage -5.0 to 0.5 V VSS Input voltage (1) VI VSS - 0.3 to 0.5 V Input voltage (2) VSS - 0.3 to 0.5 VIOSC V Permissible total output current *1 IVSS 10 mA -20 to 70 C Operating temperature Topr -65 to 150 C Storage temperature Tstg 260C, 10sec (lead section) - Soldering temperature / time Tsol 250 mW Permissible dissipation PD 1: The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pin (or is drawn in). Recommended Operating Conditions S1C60N03 Condition Supply voltage Oscillation frequency Booster capacitor Capacitor between VDD and VS2 Symbol Remark VSS VDD=0V fOSC Crystal oscillation CR oscillation, RCR=470k C1 C2 Min. -3.6 Symbol Remark VSS VDD=0V fOSC Crystal oscillation CR oscillation, RCR=470k C1 C2 Min. -0.2 50 0.1 0.1 Typ. -3.0 32.768 65 (Ta=-20 to 70C) Max. Unit -1.8 V kHz 80 kHz F F S1C60L03 Condition Supply voltage Oscillation frequency Booster capacitor Capacitor between VDD and VS2 4 50 0.1 0.1 Typ. -1.5 32.768 65 (Ta=-20 to 70C) Max. Unit -1.2 V kHz 80 kHz F F S1C60N03 DC Characteristics S1C60N03 (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25C, VS2 is internal voltage, C1=C2=0.1F) Characteristic High level input voltage (1) High level input voltage (2) Low level input voltage (1) Low level input voltage (2) High level input current (1) High level input current (2) High level input current (3) Low level input current Symbol VIH1 VIH2 VIL1 VIL2 IIH1 IIH2 IIH3 IIL High level output current (1) High level output current (2) IOH1 IOH2 Low level output current (1) Low level output current (2) IOL1 IOL2 Common output current IOH3 IOL3 IOH4 IOL4 IOH5 IOL5 Segment output current (during LCD output) Segment output current (during DC output) Condition K00-K03 RESET K00-K03 RESET VIH1=0V, No pull down resistor K00-K03 VIH2=0V, With pull down resistor K00-K03 VIH3=0V, With pull down resistor RESET VIL=VSS K00-K03 RESET, TEST VOH1=0.1*VSS R02, R03 VOH2=0.1*VSS R00, R01 (built-in protection resistance) VOL1=0.9*VSS R02, R03 VOL2=0.9*VSS R00, R01 (built-in protection resistance) VOH3=-0.05V COM0-COM3 VOL3=VL3+0.05V VOH4=-0.05V SEG0-SEG14 VOL4=VL3+0.05V VOH5=0.1*VSS SEG0-SEG14 VOL5=0.9*VSS Min. 0.2*VSS 0.15*VSS VSS VSS 0 10 30 -0.5 Typ. Max. 0 0 0.8*VSS 0.85*VSS 0.5 40 100 0 Unit V V V V A A A A -1.0 -1.0 mA mA 3.0 3.0 mA mA -3 3 -3 3 -300 300 A A A A A A S1C60L03 (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25C, VS2 is internal voltage, C1=C2=0.1F) Characteristic Symbol Min. Typ. Condition Unit Max. High level input voltage (1) VIH1 0.2*VSS K00-K03 V 0 High level input voltage (2) VIH2 0.15*VSS RESET V 0 Low level input voltage (1) VIL1 VSS K00-K03 V 0.8*VSS Low level input voltage (2) VIL2 VSS 0.85*VSS RESET V High level input current (1) IIH1 VIH1=0V, No pull down resistor K00-K03 0 0.5 A IIH2 High level input current (2) VIH2=0V, With pull down resistor K00-K03 5.0 20 A VIH3=0V, With pull down resistor RESET IIH3 High level input current (3) 9.0 100 A IIL VIL=VSS Low level input current -0.5 0 K00-K03 A RESET, TEST VOH1=0.1*VSS High level output current (1) IOH1 -200 R02, R03 A VOH2=0.1*VSS High level output current (2) IOH2 -200 R00, R01 A (built-in protection resistance) VOL1=0.9*VSS IOL1 Low level output current (1) 700 R02, R03 A IOL2 VOL2=0.9*VSS Low level output current (2) 700 R00, R01 A (built-in protection resistance) VOH3=-0.05V IOH3 Common output current -3 COM0-COM3 A IOL3 VOL3=VL3+0.05V 3 A VOH4=-0.05V IOH4 Segment output current -3 SEG0-SEG14 A IOL4 VOL4=VL3+0.05V (during LCD output) 3 A IOH5 VOH5=0.1*VSS Segment output current -100 SEG0-SEG14 A IOL5 VOL5=0.9*VSS (during DC output) 130 A Analog Circuit Characteristics and Current Consumption S1C60N03 (Crystal Oscillation) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25C, CG=25pF, VS2 is internal voltage, C1=C2=0.1F) Condition Max. Unit Characteristic Symbol Typ. Min. Connect 1 M load resistor between VDD and segment 1/3*VSS V LCD drive voltage VL1 1/3*VSS 1/3*VSS driver (SEG0-SEG14) when segment driver's level is VL1 - 0.1 x0.9 2/3*VSS 2/3*VSS V VL2 Connect 1 M load resistor between VDD and segment 2/3*VSS driver (SEG0-SEG14) when segment driver's level is VL2 - 0.1 x0.9 V VL3 Connect 1 M load resistor between VDD and segment VSS driver (SEG0-SEG14) when segment driver's level is VL3 A Current consumption 2.5 IHLT During HALT with LCD OFF 1.0 A 5.0 IEXE1 During operation with LCD OFF No panel load 2.0 A 20 During operation with power divider ON 15 IEXE2 5 S1C60N03 S1C60L03 (Crystal Oscillation) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25C, CG=25pF, VS2 is internal voltage, C1=C2=0.1F) Condition Unit Max. Min. Characteristic Symbol Typ. Connect 1 M load resistor between VDD and segment V 1/3*VS2 1/3*VS2 LCD drive voltage VL1 1/3*VS2 driver (SEG0-SEG14) when segment driver's level is VL1 - 0.1 x0.9 V 2/3*VS2 2/3*VS2 VL2 Connect 1 M load resistor between VDD and segment 2/3*VS2 driver (SEG0-SEG14) when segment driver's level is VL2 - 0.1 x0.9 V VS2 VS2 VL3 Connect 1 M load resistor between VDD and segment VS2 driver (SEG0-SEG14) when segment driver's level is VL3 - 0.1 x0.9 A IHLT During HALT with LCD OFF 1.0 Current consumption 2.5 A IEXE1 During operation with LCD OFF No panel load 2.0 5.0 A During operation with power divider ON 15 20 IEXE2 S1C60N03 (CR Oscillation) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=65kHz, Ta=25C, RCR=470k, VS2 is internal voltage, C1=C2=0.1F) Characteristic Symbol Condition Min. Typ. Max. Unit LCD drive voltage VL1 Connect 1 M load resistor between VDD and segment 1/3*VSS 1/3*VSS 1/3*VSS V driver (SEG0-SEG14) when segment driver's level is VL1 - 0.1 x0.9 VL2 Connect 1 M load resistor between VDD and segment 2/3*VSS 2/3*VSS 2/3*VSS V driver (SEG0-SEG14) when segment driver's level is VL2 - 0.1 x0.9 VL3 Connect 1 M load resistor between VDD and segment VSS V driver (SEG0-SEG14) when segment driver's level is VL3 Current consumption IHLT During HALT with LCD OFF 8 15 A IEXE1 During operation with LCD OFF No panel load 15 20 A IEXE2 During operation with power divider ON 25 30 A S1C60L03 (CR Oscillation) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=65kHz, Ta=25C, RCR=470k, VS2 is internal voltage, C1=C2=0.1F) Characteristic Symbol Condition Min. Typ. Max. Unit LCD drive voltage VL1 Connect 1 M load resistor between VDD and segment 1/3*VS2 1/3*VS2 1/3*VS2 V driver (SEG0-SEG14) when segment driver's level is VL1 - 0.1 x0.9 VL2 Connect 1 M load resistor between VDD and segment 2/3*VS2 2/3*VS2 2/3*VS2 V driver (SEG0-SEG14) when segment driver's level is VL2 - 0.1 x0.9 VL3 Connect 1 M load resistor between VDD and segment VS2 VS2 VS2 V driver (SEG0-SEG14) when segment driver's level is VL3 - 0.1 x0.9 Current consumption IHLT During HALT with LCD OFF 8 15 A IEXE1 During operation with LCD OFF No panel load 15 20 A IEXE2 During operation with power divider ON 25 30 A Oscillation Characteristics Oscillation characteristics will vary according to different conditions (elements used, boad pattern). Use the following characteristics are as reference values. S1C60N03 Crystal Oscillation (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Crystal: Q13MC146, CG=25pF, CD=built-in, Ta=25C) Characteristic Symbol Min. Typ. Max. Condition Unit Oscillation start voltage Vsta tsta5sec (VSS) -1.8 V Oscillation stop voltage Vstp -1.8 tstp10sec (VSS) V Built-in capacitance (drain) CD 20 Including the parasitic capacitance inside the IC pF (in chip) Frequency/voltage deviation 5 ppm VSS=-1.8 to -3.6V f/V Frequency/IC deviation -10 10 ppm f/IC Frequency adjustment range 40 ppm f/CG CG=5 to 25pF Harmonic oscillation start voltage Vhho -3.6 V CG=5pF (VSS) Permitted leak resistance 200 M Between OSC1 and VDD Rleak 6 S1C60N03 S1C60L03 Crystal Oscillation (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Crystal: Q13MC146, CG=25pF, CD=built-in, Ta=25C) Characteristic Symbol Min. Typ. Max. Condition Unit Oscillation start voltage Vsta -1.2 tsta5sec (VSS) V Oscillation stop voltage Vstp -1.2 tstp10sec (VSS) V Built-in capacitance (drain) CD 20 Including the parasitic capacitance inside the IC pF (in chip) f/V Frequency/voltage deviation 5 VSS=-1.2 to -2.0V ppm f/IC Frequency/IC deviation -10 10 ppm f/CG CG=5 to 25pF Frequency adjustment range 40 ppm CG=5pF (VSS) Harmonic oscillation start voltage Vhho -2.0 V Between OSC1 and VDD Rleak Permitted leak resistance 200 M S1C60N03 CR Oscillation Characteristic Oscillation frequency dispersion Oscillation start voltage Oscillation start time Oscillation stop voltage Symbol fOSC Vsta (VSS) tsta VSS=-1.8 to -3.6V Vstp (VSS) (Unless otherwise specified: VDD=0V, VSS=-3.0V, RCR=470k, Ta=25C) Min. Typ. Max. Unit Condition -20 65kHz 20 % -1.8 V 3 mS -1.8 V Symbol fOSC Vsta (VSS) tsta VSS=-1.2 to -2.0V Vstp (VSS) (Unless otherwise specified: VDD=0V, VSS=-1.5V, RCR=470k, Ta=25C) Min. Typ. Max. Unit Condition -20 65kHz 20 % -1.2 V 3 mS -1.2 V S1C60L03 CR Oscillation Characteristic Oscillation frequency dispersion Oscillation start voltage Oscillation start time Oscillation stop voltage BASIC EXTERNAL CONNECTION DIAGRAM Piezo Buzzer Single Terminal Driving COM3 COM0 SEG14 SEG0 LCD PANEL CA CB C1 VDD K00 I VS2 C2 K03 S1C60N03 S1C60L03 OSC2 CG X'tal 1 RESET R00 O OSC1 1.5 V (S1C60L03) R02 Cp R03 RCR 2 3.0 V (S1C60N03) R01 TEST VSS Piezo Buzzer Coil 1 Crystal oscillation 2 CR oscillation X'tal CG RCR C1, C2 Cp Crystal oscillator Trimmer capacitor Resistor for CR oscillation Capacitor Capacitor 32.768 kHz, CI (Max.) = 35 k 5-25 pF 470 k (65 kHz) 1 F (see Note) 3.3 F Note: Use a 1 F capacitor for C1 and C2 when "S1C60L03 1/3 bias" is selected, or a 0.1 F capacitor when "S1C60N03 1/2 bias" or "S1C60L03 1/2 bias (A), (B)" is selected. No capacitor is required for C1 and C2 when another specification is selected. 7 S1C60N03 Piezo Buzzer Direct Driving K00 COM3 COM0 SEG14 SEG0 LCD PANEL CA CB C1 VDD I VS2 C2 K03 S1C60N03 S1C60L03 R02 OSC1 OSC2 CG X'tal 1 RESET O 1.5 V (S1C60L03) Cp R03 RCR 2 3.0 V (S1C60N03) R00 R01 TEST Piezo Buzzer X'tal CG RCR C1, C2 Cp Crystal oscillator Trimmer capacitor Resistor for CR oscillation Capacitor Capacitor VSS 1 Crystal oscillation 2 CR oscillation 32.768 kHz, CI (Max.) = 35 k 5-25 pF 470 k (65 kHz) 1 F (see Note) 3.3 F Note: Use a 1 F capacitor for C1 and C2 when "S1C60L03 1/3 bias" is selected, or a 0.1 F capacitor when "S1C60N03 1/2 bias" or "S1C60L03 1/2 bias (A), (B)" is selected. No capacitor is required for C1 and C2 when another specification is selected. NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. (c) Seiko Epson Corporation 2001 All right reserved. SEIKO EPSON CORPORATION ELECTRONIC DEVICES MARKETING DIVISION EPSON Electronic Devices Website http://www.epson.co.jp/device/ IC Marketing & Engineering Group ED International Marketing Department Europe & U.S.A. 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : 042-587-5812 FAX : 042-587-5564 ED International Marketing Department Asia 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : 042-587-5814 FAX : 042-587-5110 First issue February, 1999 M Printed July, 2001 in Japan L