—1— E93Z33-TE
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Structure
Bipolar silicon monolithic IC
Applications
Digital cordless telephone of Europe (CT-2)
Description
The CXA1744AR is an IF amplifier IC designed for
digital cordless telephone of Europe, CT-2.
Features
Mixer, RSSI, detector, and various other functions
required of a digital cordless phone IF amplifier.
Local oscillator and multiplier for the mixer.
Low power consumption (8.4mA at 3.0V)
Small package (48-pin LQFP).
Absolute Maximum Ratings (Ta=25°C)
Supply voltage VCC 14 V
Operating temperature Topr –20 to +75 °C
Storage temperature Tstg –65 to +150 °C
Allowable power dissipation PD500 mW
Recommended Operating Condition
Supply voltage VCC 2.7 to 5.5 V
IF Amplifier for Digital Cordless Telephone
48 pin LQFP (Plastic)
CXA1744AR
For the availability of this product, please contact the sales office.
—2—
CXA1744AR
IF
MIX
RSSI
LIM
DET
REG
MULTI
COMP2
SAMPLE
RSSIOST
OPAMPCOMP1
MIXOUT
MIXIN2
MIXIN1
BUFPAS
LOIN
REF
NC
MULTIOUT
NC
NC
OSCC
OSCB
ICOMPOUT
ICOMPINX
ICOMPIN
DETOUT
OPIN
OPINX
OPOUT
DCOMPIN
DCOMPINX
DCOMPOUT
PSX
MIXGND
LIMOUT
QDIN
RSSIOST
RSSIOUT
REGOUT1
VCC
FCOMPIN
FCOMPINX
FCOMPOUT
VREF
CURREF
GND
RSSIGND
LIMP2
LIMIN
LIMP1
IFCNT
RSSIVcc
IFOUT
SAMPLE
IFP2
IFIN
IFP1
MIXV
CC
OSC
COMP3
1 2 3 4 5 6 7 8 9 10 11 12
252627282930313233343536
37
38
39
40
41
42
43
44
45
46
47
48
21 22 23 24
13 14 15 16 17 18 20
19
Block Diagram and Pin Configuration
—3—
CXA1744AR
Pin Description
Pin Typical pin
No. voltage
Symbol Equivalent circuit Description
1 MIXGND 0V
2 PSX 0V
3 DCOMPOUT
4 DCOMPINX
5 DCOMPIN
6 OPOUT
7 OPINX
8 OPIN
9 DETOUT 1.25V
GND for the MIX, OSC, and MULTI
circuits.
Power save control.
Power save mode for Low; power
save function executes on all circuits
except the OSC circuit and a part of
the REG circuit.
Data slicer comparator output.
Data slicer comparator input.
DCOMPINX is for out-of-phase
input.
DCOMPIN is for in-phase input.
Operational amplifier output.
Operational amplifier input.
OPINX is for out-of-phase input.
OPIN is for in-phase input.
Detector output.
VCC
GND
32k
32k
2
VCC
GND
3
VCC
GND
129
129
4
5
VCC
GND
129
129
7
8
VCC
GND
6
GND
9
VCC
—4—
CXA1744AR
Pin Typical pin
No. voltage
Symbol Equivalent circuit Description
10 ICOMPIN
11 ICOMPINX
12 ICOMPOUT
13 GND 0V
14 CURREF 1.25V
15 VREF 1.9V
16 FCOMPOUT
17 FCOMPINX
18 FCOMPIN
Sample-and-hold circuit input.
ICOMPIN is for in-phase input.
ICOMPINX is for out-of-phase input.
Sample-and-hold circuit output.
GND for circuits other than the MIX,
OSC, MULTI, and RSSI circuits.
Adjustment for RSSI output current.
Connects a resistor between this pin
and GND.
Reference voltage.
Leave this pin open normally.
Comparator output for free-channel
detection.
Comparator input for free-channel
detection.
FCOMPINX is for out-of-phase input.
FCOMPIN is for in-phase input.
GND
129
129
10
11
VCC
GND
12
VCC
129
1.25V
GND
14
VCC
GND
VCC
16
1.25V
GND
15
VCC
GND
129
129
17
VCC
18
—5—
CXA1744AR
Pin Typical pin
No. voltage
Symbol Equivalent circuit Description
19 VCC 3.0V
20 REGOUT1 1.25V
21 RSSIOUT
22 RSSIOST 1.25V
23 QDIN 2.45V
24 LIMOUT 1.55V
25 RSSIGND 0V
Power supply for circuits other than the
MIX, OSC, MULTI, and RSSI circuits.
Internal bias regulator output.
A stabilized bias voltage can be
obtained.
RSSI current output.
A voltage output is obtained when a
resistor is connected between this pin
and GND.
RSSI offset adjustment.
The offset amount of RSSI output
current can be adjusted by connecting
a resistor between this pin and GND.
Detector input.
Connect a detection discriminator.
Limiter output.
GND for the IF amplifier, limiter and
RSSI circuits.
1.25V
GND
20
VCC
129
RSSIVCC
129
GND
21
RSSIVCC
129
1.9V
22
RSSIVCC
GND
24
RSSIVCC
GND
32k
23 129
—6—
CXA1744AR
Pin Typical pin
No. voltage
Symbol Equivalent circuit Description
26 LIMP2 1.5V
27 LIMIN
28 LIMP1
29 IFCNT 0.6V
30 RSSIVCC 2.45V
31 IFOUT 1.55V
32 SAMPLE 3.0V
33 IFP2 1.55V
34 IFIN
35 IFP1
36 MIXVCC 3.0V
Limiter input. Input the signal from IF
amplifier to LIMIN. Connect a
decoupling capacitor to LIMP1 and
LIMP2.
IF amplifier gain adjustment.
Connect a resistor between this pin
and GND to compensate for the
interstage filter insertion loss between
the IF amplifier and limiter.
Power supply for the IF amplifier,
limiter and RSSI circuits.
Connected to the regulator output
internally.
Connect a decoupling capacitor.
IF amplifier output.
Sample-and-hold circuit control input.
Sample mode for open or High; hold
mode for Low.
IF amplifier input. Input the signal
from MIX to IFIN. Connect a
decoupling capacitor to IFP1 and
IFP2.
Power supply for the MIX, OSC, and
MULTI circuits.
50k
50k
460
RSSIVCC
GND
28
27
26
GND
129
RSSIVCC
1.9V
29
RSSIVCC
GND
420
31
VCC
GND
10k
50k
32
50k
50k
330
RSSIVCC
GND
35
34
33
GND
+
1.25V
30
VCC
—7—
CXA1744AR
Pin Typical pin
No. voltage
Symbol Equivalent circuit Description
37 MIXOUT 1.4V
38 MIXIN2 1.2V
39 MIXIN1
42 REF
40 BUFPAS 1.75V
41 LOIN
44 MULTIOUT
47 OSCC
48 OSCB 2.75V
Mixer output.
Mixer RF signal differential input and
bias.
Connect a decoupling capacitor to
REF.
Mixer local signal input.
Connect a decoupling capacitor to
BUFPAS. Input the local signal to
LOIN.
Multiplier current output.
Connect a tank circuit between this
pin and power supply.
The Colpitts-type oscillation circuit is
composed by connecting a crystal
oscillator.
Input to the OSCC pin when using an
external oscillator.
MIXVCC
GND
290
37
1.5k
MIXVCC
GND
1.5k
1k
1.25V
38
39
42
MIXVCC
GND
2k 2k
1.75V
40
41
MIXVCC
GND
44
MIXVCC
GND
10k 10k
47
48 DET
—8—
CXA1744AR
Electrical Characteristics (VCC=3.0V, Ta=25°C, refer to the Electrical Characteristics Measurement Circuit)
Item Symbol SW set Measurement conditions Min. Typ. Max. Unit
to ON
Current consumption 1 ICC For operating I7 6.4 8.4 11.2 mA
VIN7=10MHz, 0dBm
Current consumption 2 ICC S1 For power saving I7 0.2 0.5 mA
VIN7=10MHz, 0dBm
VIN5=150.05MHz, -40dBm
Mixer conversion gain GVMIX VIN6=139.35MHz, -10dBm V3 15.5 18 20.5 dB
RL=330
Mixer output resistance ROMIX 240 330 420
IF AMP voltage gain GIF S10 VIN4=10.7MHz, -60dBm V2 31 33.5 36 dB
RL=470
IF AMP input resistance RIIF 240 330 420
IF AMP output resistance ROIF 320 440 560
Limiter voltage gain GLIM VIN3=10.7MHz, -80dBm 24pin 64 66.5 69 dB
Limiter input resistance RILIM 340 460 580
Limiter output voltage amplitude
VLIM VIN3=10.7MHz, -20dBm 24pin 320 400 480 mVP-P
RSSI output current inclination (IF)
VIN4=10.7MHz, -30~0dBm I8 0.32 0.4 0.54 µA/dB
RSSI output current inclination (LIM)
VIN3=10.7MHz, -45~-15dBm I8 0.32 0.4 0.54 µA/dB
RSSI dynamic range DRSSI For MIXIN input 75 80 dB
RSSI relative precision ±3 dB
RSSI output voltage range 0.2 1.3 V
Detector output voltage VDET VIN3=10.7MHz, -20dBm V1 160 200 240 mVrms
Detector total harmonic distortion
THD FMOD=36kHz, fDEV=±25kHz V1 3.0 %
Detector maximum output voltage
1.2 VP-P
Detector output voltage High level
VCC —— V
-1.1
Detector output voltage Low level
0.5 V
REG1 output voltage VREG1 S9 IL=300µA 20pin 1.07 1.17 1.27 V
COMP1 output saturation voltage
ISAT1 S2 VIN1=1.1V, Isink=5mA 3pin 0.35 0.5 V
COMP1 output leak current ILEAK1 I1 1.0 µA
COMP1 input bias current IB1 S3 Measured value/2 I2 -200 -70 nA
S4
COMP1 rise time tr1 VIN1=DC level 1.3V 70 200 nsec
COMP1 fall time tf1
Rectangular wave of 100kHz, 0.5VP-P
3pin 40 200 nsec
COMP1 rise propagation delay time
t
pdr1 RL=1K, CL=20PF 130 500 nsec
COMP1 fall propagation delay time
tpdf1 160 500 nsec
COMP1 input dynamic range For Vref=1.3V 0.3 VCC V
—9—
CXA1744AR
Item Symbol SW set Measurement conditions Min. Typ. Max. Unit
to ON
COMP2 output saturation voltage
ISAT2S6VIN2=1.1V, Isink=1mA 16pin 0.2 0.4 V
COMP2 output leak current ILEAK2 I5 1.0 µA
COMP2 input bias current IB2 S7 Measured value/2 I6 -200 -70 nA
S8
COMP2 rise time tr2 VIN2=DC level 1.3V 300 500 nsec
COMP2 fall time tf2
Rectangular wave of 100kHz, 0.5VP-P
30 500 nsec
COMP2 rise propagation delay time
tpdr2 RL=4.7k, CL=20pF 16pin 200 500 nsec
COMP2 fall propagation delay time
tpdf2 170 500 nsec
COMP2 input dynamic range For Vref=1.3V 0 VCC V
OPAMP input bias range IBMeasured value/2 I3 -200 -70 nA
OPAMP in-phase input voltage range
VICM 0.4 VCC V
-1.1
OPAMP output voltage range 0.4 VCC V
-1.1
Sample-and-hold circuit ILEAKH S5 100 nA
High leak current S11 For hold I4
Sample-and-hold circuit ILEAKL S11 -100 nA
Low leak current
Sample-and-hold circuit 0.8 —— V
control voltage High
X VCC
Sample-and-hold circuit ——
0.13 V
control voltage Low
X VCC
Sample-and-hold circuit SampleHold 12pin 1.2 3.0 µsec
OFF current time for High output
(For S11 OFFON)
Sample-and-hold circuit S5 SampleHold 12pin 1.2 3.0 µsec
OFF current time for Low output
(For S11 OFFON), VS=1.1V
—10—
CXA1744AR
Design Reference Values (VCC=3.0V, Ta=25°C)
Item
Symbol
Conditions Min. Typ. Max. Unit
Multiplier output amplitude VMLT fin=27.87MHz, -10dBm 200 mVP-P
3rd order intercepting point IP3 -8 dBM
RF input impedance fin=150.05MHz 145
S11 real component
RF input impedance fin=150.05MHz -380
S11 imaginary component
Mixer noise figure SBB conversion 11 dB
IF amplifier voltage RL=470, difference to Pin 29 open 3 dB
gain difference (for adjustment)
RSSI rise time For input signal OFF/ON 30 µsec
RSSI fall time For input signal ON/OFF 50 µsec
RSSI rise time For burst operation 40 µsec
RSSI fall time For burst operation 40 µsec
Input sensitivity For MIXIN input (50LC matching) 4.5 µV
(12 dB SINAD value) (50LC matching)
—11—
CXA1744AR
Audio
Measurement
Circuit
1k
1.3V
120k
0.1µ
1000p
1000p
100µ
68k 2k
1p
1000p
62
33k
1000p
1000p
470
62
0.1µ 100µ
1000p
1000p
1000p
1000p
1000p
1000p
330
51
51
3.0V
1000p
1000p
1000p
1000p
1000p
1000p
CXA1744AR
20P
5mA
S4
1.3V
0.3V
1.5V
V
IN1
1.5V
VS1
10k
20p
4.7k
S6
1mA
1.3V
0.3V
S8
V
IN2
1.5V
100k
300µA
VIN3
0.1µ
V
IN5
V
IN6
1000p
V
IN7
0.3V
S5
36k
220p
S10
VIN4
51
100µ
1 303AC-1941NK (Toko)
1
MIXGND
GND
CURREF
VREF
FCOMPOUT
FCOMPINX
FCOMPIN
V
CC
REGOUT1
RSSIOUT
RSSIOST
QDIN
LIMOUT
MIXVCC
IFP1
IFIN
IFP2
SAMPLE
IFOUT
RSSIVCC
IFCNT
LIMP1
LIMIN
LIMP2
RSSIGND
OSCB
OSCC
NC
NC
MULTIOUT
NC
REF
LOIN
BUFPAS
MIXIN1
MIXIN2
MIXOUT
I
5
I
6
I
7
S9
I
4
I
3
V
1
+
I
2
I
1
S2 S3
S1
+
+
+
V3
+
V
2
S11
+
PSX
DCOMPOUT
DCOMPINX
DCOMPIN
DETOUT
ICOMPIN
ICOMPINX
ICOMPOUT
OPOUT
OPINX
OPIN
I
8
S7
123456789
10 11 12
25
26
27
28
29
30
31
32
33
34
35
36
373839404142434445464748
13 14 15 16 17 18 20 21 22 23 2419
Electrical Characteristics Measurement Circuit
—12—
CXA1744AR
1000p
1000p
1000p
1000p
1000p
1000p
FREE-CH
2k
1p
Vcc
RSSI
10k
Vcc
120k
100k
(68k)
10k
360p
1000p
0.1µ
100µH
0.01µ
10k10k
1.3V
1k
DATAOUT
Vcc
Vcc
100p
84nH
30p
C2
30p 56p
1000p
+
100µH
0.1µ
1000p
Vcc Vcc
1000p
50k
(33k)
S2
5
R1
50k
(36k)
+
S1
1000p
100k
DETOUT
220p
R2
IF
MIX
RSSI
DET
REG
MULTI
COMP2
SAMPLE
RSSIOST
OPAMPCOMP1
C3
1.8µH
OSC
1000p
R4
0.1µ
+160nH
C1
7p
0.4φ, 4D, ×6T
4
3
2
1
1 MF X'tal 27.87MHz (Asahi )
2 LQN1 84nH (M urata)
3 SFE10.7MHYK (Murata)
4 SFECA10.7MA5 (Murata)
5 303AC - 1941NK (Toko)
COMP3
R3
2k
RFIN
112
23 4 5 6 7 8 9 10 11
AA
AA
A
A
A
A
A
A
13 14 15 16 17 18 19 20 21 22 24
252628293032333536
38
39
40
41
42
43
44
45
46
47
48
31
LIM
27
+
34
37
+
0.1µ
23
1p
Application Circuit
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
—13—
CXA1744AR
Output level (dBm)
RF input level (dBm)
Mixer input characteristics and 3rd order intercept point
Local input level vs. Mixer conversion gain
Local input level (dBm)
Mixer conversion gain (dB)
Audio frequency (Hz)
Output level (dB)
Detector output frequency characteristics
Limiter input frequency (Hz)
Voltage gain (dB)
Limiter voltage gain frequency characteristics
IF amplifier voltage gain frequency characteristics
IF amplifier input frequency (Hz)
Voltage gain (dB)
RF input frequency (Hz)
Conversion gain (dB)
Mixer conversion gain frequency characteristics
-60
-40
-20
0
-60 -40 -20 0
fLD = 139.35MHz, -10dBm
fRF1 = 150.05MHz
fRF2 = 150.15 MHz
10M 100M 1000M
-10
0
10
20
fLO = fRF -10.7MHz
RF input level = -40dBm
LO input level = -10dBm
-20
0
20
-60 -40 -20 0
fRF = 150.05MHz -40dBm
fLO = 139.35MHz
1M 10M 100M
20
40
60
Limiter input level = -80dBm
–20
0
1k 10k 100k
fLIM = 10.7MHz, -10dBm
fDEV = ±25.4kHz
40
20
0
1M 10M 100M
IF amplifier input level = -60dBm
—14—
CXA1744AR
2346
Supply voltage vs. Current consumption
Current consumption (mA)
Supply voltage (V)
8
6
4
2
10
05
For operating
For power saving
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
AAAAA
AAAAA
AAAAA
AAAAA
AAAA
AAAA
AAAA
AAAA
1000p
SG
29
22
220p 36k
33k
68k
fRF = 150.05MHz
fLO:Built-in OSC used
RSSI output voltage (V)
RF input level (dBm)
RSSI characteristics
21
160nH
-20
-40
-60
-80
-100
-120
-140
DET output characteristics
Outp u t level (dB)
RF input level (dBm)
-120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
10
0
-10
-20
-30
-40
-50
S+D+N
D+N
S+D+N
N
160nH
1000p
SG
39
AAAAAAAAA
AAAAAAAAA
AAAAAAAAA
AAAAAAAAA
39
DETOUT
360p
10k
910
fRF = 150.05MHz
fDEV = ±25.4kHz
fMOD = 36kHz
fLO: Built-in OSC used
+25°C
–20°C
+75°C
—15—
CXA1744AR
Description of Operation
The signals which have been input from Pins 38 and 39 are mixed with the local oscillation signal from the
oscillator and multiplier at the mixer, and the frequency-converted signal is output from Pin 37. The oscillator
can be self-oscillated by composing the Colpitts-type crystal oscillation circuit between Pins 47 and 48. Also,
the external local oscillation signal can be directly input to Pin 47.
After the bandwidth is limited by filter, the mixer output signal is amplified by the IF amplifier and output from
Pin 31. The IF amplifier output signal is limited its bandwidth again, and the amplitude is limited by the limiter
amplifier and output from Pin 24. The limiter amplifier output signal is phase-shifted by LC resonance circuit
and the signal is output from Pin 9 after being quadrature-detected.
The RSSI output is the currents corresponding to the input level at the IF amplifier and limiter amplifier. The
current signal can be converted into a voltage signal by connecting a proper I-V conversion circuit to Pin 21.
Notes of Operation
Take care of the followings because the CXA1744AR has the IF amplifier voltage gain of approximately 34
dB and limiter amplifier voltage gain of approximately 67 dB and uses high frequency.
1. Use as wide pattern as possible for the power supply line and GND, and insert a by-pass capacitor as
close to them as possible.
2. Separate the input line from the output line as far as possible and make the wiring short.
3. Ground the decoupling capacitors of mixer (Pins 38, 40 and 42), IF amplifier (Pins 33 and 35) and limiter
amplifier (Pins 26 and 28) as close to each pin as possible.
Notes on Application
1) Power supply
This IC has a built-in voltage regulator so that the supply voltage range is wide (2.7 to 5.5 V) and stable.
There are three power supply pins and GND pins (Pins 19, 13 and 36, 1 and 30, 25).
Ground a decoupling capacitor as close to each power supply pin as possible.
2) Oscillator
The oscillator in this IC varies its current consumption according to the oscillation level.
The figures below show how to use the CXA1744AR oscillator.
(a) Configuring a Colpitts oscillation circuit.
(b) Inputting a local oscillation signal from an external circuit.
Input a signal of approximately 0 dBm to stabilize the oscillator operation and reduce the current
consumption. (a) (b)
VCC
47
48
VCC
0dBm
47
48
—16—
CXA1744AR
3) Multiplier
The ×5 multiplier is provided in this IC for mixer local signal. The fifth-order component of the input signal is
extracted by the resonance circuit connected to Pin 44 externally. Wire the resonance circuit as close to
Pin 44 as possible.
4) Mixer
The CXA1744AR mixer is of double balanced type. Its input is at Pins 38 and 39; when input from Pin 39,
Pin 38 should be grounded with a capacitor.
5) 10.7 MHz filter
The mixer output impedance and IF amplifier input impedance are approximately 330 . The IF amplifier
output impedance and limiter amplifier input impedance are approximately 460 . Use the 10.7 MHz filter
with matching.
6) Detector
For quadrature FM detection, the phase of the limiter output (Pin 24) is shifted 90° by the RLC parallel
resonance circuit or discriminator as the output is input to pin 23.
The phase shifter by RLC parallel resonance circuit is shown below. In this case, values of L and C are
determined so that the center frequency of the second IF signal and the parallel resonance frequency are
equal. As the value of R sets the detector output level, select this value so as to obtain the required output
level.
With regards to the detector input, the center frequency of the second IF signal and the frequency for the
minimum value of the detector distortion does not match because the internal delay is more than the
external one. Add the delay circuit as shown below to match the center frequency of the second IF signal
and the frequency for the minimum value of the detector distortion.
Delay circuit
QDIN
RSSIVCC
LIMOUT
LCR
23 24
—17—
CXA1744AR
7) RSSI
RSSI detects the input signal level, and the current is output in this IC. If the voltage output is necessary, I-
V conversion should be made by use of a resistor, etc.
This IC can compensate for the unevenness of the filter connected between the IF amplifier and limiter
amplifier. Pin 29 is used to perform the adjustment so that the line of the RSSI output characteristics is as
straight as possible.
Also, RSSI offset adjustment pin (Pin 22) is provided in this IC. For example, the RSSI offset amount is
adjusted to match the dynamic range used in the next-stage IC.
8) Comparator
This IC has three comparators and they are designed according to the following applications.
COMP1 performs the waveform shaping of the demodulated audio signal and outputs the resulting signal
as a rectangular wave.
COMP2 is used to detect the free channel or the signal strength after the RSSI output voltage is input.
COMP3 is the current output-type comparator. The COMP3 output can be turned ON/OFF by setting Pin
32 High/Low and this comparator can form a part of a sample-and-hold circuit. The rise time of the
demodulated signal during burst operating can be shortened.
9) PSX
This is the power save control pin (Pin 2). The power save function is performed by setting this pin Low;
the functional blocks except OSC are in the power save mode.
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
EPOXY / PHENOL RESIN
PLATING
42/COPPER ALLOY
PACKAGE STRUCTURE
48PIN LQFP (PLASTIC)
9.0 ± 0.2
7.0 ± 0.1
112
13
24
25
36
37
48 (0.22)
0.18 – 0.03
+ 0.08
0.5 ± 0.08
(8.0)
0.5 ± 0.2
0.127 – 0.02
+ 0.05
0.1 ± 0.1
0.5 ± 0.2
A
1.5 – 0.1
+ 0.2
0° to 10°
DETAIL A
0.2g
LQFP-48P-L01
QFP048-P-0707
0.1
SOLDER/PALLADIUM
NOTE: “” Dimensions do not include mold protrusion.
Package Outline Unit : mm
CXA1744AR
—18—