2 N pd me, Features e Automatic power-down when deselected Transparent write (7C191) CMOS for optimum speed/power High speed taa = 2508 e@ Low active power 880 mW @ Lowstandby power 220 mW e@ TTL-compatible inputs and outputs sth f R 4BE D 258%bb2 O00bb4e 3 Eacyp Tuyb~319 EY7CTIL CY7C192 ' @ Capable of withstanding greater than 2001V electrostatic discharge Functional Description TheCY7C191 and CY7C192 are high-per- formanceCMOS static RAMs organizedas 65,536 x 4 bits with separate I/O. Easy memory expansion is provided by active LOW chip enable (CE) and three-state drivers. They have an automatic power- down feature, reducing the power con- sumption by 75% when deselected. Writing to the device is accomplished when the chip enable (CE) and write enable 65,536 x 4 Static R/(W RAM Separate I/O Data on the four input pins (Ig through I5) is written into the memory location specified on the address pins (Ag through Ajs). Readingthe device is accomplished by taking the chip enable (CE) LOW while the write enable (WE) remains HIGH. Under these conditions the contents of the memory foca- tion specified on the address pins will appear on the four data output pins. The output pins stay in high-impedance state when write enable (WE) is LOW (7C192 only), or chip enable (CE) is HIGH. A die coat is used to insure alpha immunity. Logic Block Diagram INPUT BUFFER 1024 x 64x 4 ARRAY ROW DECODER CPLEP LES IE SENSE AMPS COLUMN DECODER (WE) inputs are both LOW. Pin Configurations LY h ~ DIP/SOJ LCC k Top View Top View kk Veo - As Ay 4 s 5 s Ae 8 Ag Ai 4 Ai Oo Ao 9 2 8 10 b u oO Qs 12 1 o Q 1914151617 O2 oo egw Pe ci913 03 We C1912 ce 1 We how ' Cta1-1 reigt oxty, _ ! Selection Guide 7C19112 | 7C191-15 | 7C191-20 | 7C191-25 | 7C191~35 | 7C191-45 7C19212 | 7C192-15 | 7C192~20 | 7C192-25 | 7C192-35 | 70192-45 Maximum Access Time (ns) 12 15 20 25 35 45 MaximumOperating Commercial 160 150 140 120 120 120 Current(mA) Military 160 150 130 130 130 Maximum Standby Current (mA) 40 40 40 35 35 35 Shaded area contains advanced information. 2-380Electrical Characteristics Over the Operating Rangel] 7C1I9112 7C191-15 / . : 7C192~12 7C19215 Parame- Description Test Conditions Min. | Max. | Min. | Max. | Units Vou Output HIGH Voltage Vec = Min., lox = - 4.0mA 2.4 2.4 Vv VoL Output LOW Voltage Vec = Min, lor = 8.0mA 0.4 0.4 Vv Vin Input HIGH Voltage 2.2 Vec 2.2 Vec Vv Vit Input LOW Voltage -05 0.8 -05 0.8 Vv Ix Input Load Current GND < Vi < Vcc 10 +10 -10 +10 | pA Toz Output Leakage GND < Vo < Vcc, -10 +10 -10 +10 pA Current Output Disabled ; : : Tos Output Short Voc = Max., Vout = GND 350 -350 | mA CircuitCurrent!9) Icc Vcc Operating Vcc = Max. our = OmA, Com! 160 150 mA Supply Current f= fax = iftgc Mil 160 Ispi AutomaticCE Power-Down | Max. Vcc, CE > Vin, 40 40 mA CurrentTTLInputs Vin > Vie or Vin < Vi. f = farax Isp2 Automatic CE Power-Down | Max. Vcc, CE > Vcc ~ 0.3V, 20 29 | mA CurrentCMOSInputs Vin > Vcc 0. 0.3V or Vin <.0.3V,=0 Shaded area contains advanced information. Notes: 1. Ta is the ins! 2, Seethe last page of this specification for Group Asubgroup testing in- formation. tant on case temperature, 3. Notmore than 1 outputshould be shorted at onetime. Duration of the short circuit should not exceed 30 seconds. 4, Tested initially and after any design or process changes that may affect these parameters. 2-381 SRAMs eo CYPRESS SEMICONDUCTOR 4BE D MM 25859662 OO0bb43 5 EXCYP = CY7C191 a T-46-23-10 CY7C192 SS FC SEMICONDUCTOR Saesem Maximum Ratings : (Abovewhich the useful life may be impaired. Foruserguidelines, Static Discharge Voltage ..........scesseeeeeeess >2001V nottested.) (per MIL-STD-883, Method 3015) Storage Temperature .........s.0e808. 65Cto +150C Latch-UpCurrent ..... seeeeeeeees sevevecresee >200mA Ambient Temperaturewith Operating Range . PowerApplied .......ccccceeveesceeee = 55Cto +125C Ambi . ient Supply Voltage to Ground Potential Range Temperature!!! Vee (Pin 28 tOPiN 14) .sesssesessereesesesees OSV I0470V pe SG aq VE a DC Voltage Applied to Outputs tot ane in High ZState ...... besessersees, 7 O5Vt0+7.0V | Military = 55C to +125C 5V + 10% DC Input Voltage ...... seaseeeseseccass = 3.0V to +7,0V J Output Current into Outputs (LOW) ........ecee08. 2OMACYPRESS SEMICONDUCTOR YLE D MM 2549bb2 O00bb44 7 ma CYP = CY7C191 SSF Skiconwuctor T-46-23-10 VTE? Electrical Characteristics Over the Operating Range!2l (continued) . 7CiI9120 | 7C19125, 35, 45 7C192-20 | 7C19225, 35, 45 Parameters Description Test Conditions Min. | Max. | Min. Max. | Units Vou Output HIGH Voltage Vec = Min., Ion = 4.0mA 24 2.4 Vv VoL Output LOW Voltage Vcc = Min., Joy = 8.0 mA 0.4 0.4 Vv Vin Input HIGH Voltage 2.2 | Veco 2.2 Vcc Vv Vit Input LOW Voltage ~O05 | 08 -3.0 0.8 v Ix Input Load Current GND < Vi < Vcc -10 | +10 -10 +10 pA Ioz Output Leakage GND < Vo <Vco ~10 | +40 ~-10 +10 pA Current Output Disabled Tos Output Short Vec = Max., Vout = GND 350 -350 | mA CircuitCurrentl] Icc Voc Operating Vec = Max. Tour = OmA, Comt 140 120 mA Supply Current f= fax = Ipc Mil 150 130 Ispi AutomaticCE Power-Down | Max. Vcc, CE > Vir, 40 35 mA CurrentTTLinputs Vin > Virpor Vin < Vay f = faax Isp2 AutomaticCE Power-Down | Max. Vcc, CE > Vcc 0.3V, 20 20 mA CurrentCMOSInputs Vin > Vcc 0.3V or Vin < 0.3V, = 0 Shaded area contains advanced information. Capacitance!) Parameters Description Test Conditions Max. Units Cin InputCapacitance Ta = 25C, f = 1 MHz, 10 pF Cout OutputCapacitance Vec = 5.0V 10 pF AC Test Loads and Waveforms BV Al 481.9. rs NY rs R2 Al 481.0, Re ove | 285.0, wee 255.0. INCLUDING INCLUDING VIGAND rt VIGANO == SCOPE SCOPE = = (a) (b) ci91-4 Equivalent to: THEVENIN EQUIVALENT 1670. OUTPUT 0-4-9 1.73 2-382 er ee a cao eee ee ALL INPUT PULSESoe CYPRESS SEMICONDUCTOR 4bE D Mi 2569662 OO0bb45 9 EaCyP? . eee 1. erence levels of 1.5V, input pulse levels of 0 to 3.0V, and outputloading of the specified Io1/Iogy and 30-pF load capacitance. At any given temperature and voltage condition, truzce is less than tLzce, tuzwe is less than thzwe for any given device. These parame- _ ters are guaranteed and not 100% tested. tuzce and tyzwe are specified with Cy = 5 pF as in part (b) of AC Test Loads. Transition is measured +500 mV from steady state volt- age. 9. 10. li. 12, 2-383 LOW and WE LOW. Both signals must be LOW to initiate awrite and either signal can terminate awrite by going HIGH. The data inputset- upand hold timing shouldbe referenced to the rising edge of the signal that terminates the write. WE is HIGH for read cycle, Device is continuously selected, CE = Vy. Address valid prior to or coincident with CE transition LOW. If CE goes HIGH simultaneously with WE HIGH, the outputremains ina high-impedance state (7C192 only). =_= CY7C191 =e 93-10 CY7C192 = SEMICONDUCTOR T-46 23 Switching Characteristics Over the Operating Rangel] 7C19112 | 7191-15 | 7C191-20 | 7191-25 | 7C191-35 | 7C191-45 7C192-12 | 7C192-15 | 7C192-20 | 70192-25 | 7C192-35 | 70192-45 F ; Parameters Description Min. | Max, | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Units ei READ CYCLE a tre Read Cycle Time 12 15 20 25 35 45 ns = t4A Address to Data 12 15 20 25 35 spol & Valid oO tona Output Hold from 3 3 3 3 3 3 ms AddressChange tace CE LOW to 12 15 20 25 35 45 ns Data Valid tizce CE LOW to 3 3 3 3 3 3 ns Low Z(6] tuzce CE HIGH to 7 8 10 13 15 20 ns High 21671 ; tpy CE LOW to 0 0 07 0 0 0 ns Power-Up tpp CE HIGH to 12 15 20 25 35 45 ns Power-Down WRITE CYCLE!) twc Write Cycle Time 12 15 20 25 35 45 ns tscu CE LOW to 9 10 15 20 30 40 ns Write End taw Address Set-Up to 9 10 15 20 25 35 ns Write End tHa Address Hold from | 0 0 0 0 0. 0 ns Write End tsa Address Set-Up to 0 0 0 0 0 0 ns Write Start tpwe WE Pulse Width 9 10 15 20 25 30 ns tsp Data Set-Up to 7 8 10 15 17 20 ns Write End tup Data Hold from 0 0 0 0 0 0 ns Write End tLzwE WE HIGH to. 3 3 3 3 3 3 ms Low Z (7192)(6} tzwE WE LOW to 7 7 10 13 15 20 ns High Z.(7C192)(6.71 tawe WE LOW to 12 15 20 25 30 35 ns Data Valid (7C191) tapv Data Valid to 12 15 20 20 30 35 nS Output Valid (7C191) Shaded area contains advanced information. Notes: __ 5. Testconditions assume signal transition time of Snsorless,timingref- 8. The internal write time of the memory is defined by the overlap of CE tere ee pr eeCYPRESS SEMICONDUCTOR 4BE D M8 2589662 OO0Obb4t O EM CYP CY7C191 T-46-23-10 CY7C192 Switching Waveforms Read Cycle No. 119 10] tac >| ADDRESS * x {aa | . toua DATA OUT PREVIOUSDATAVALID. = KX KX DATA VALID cis16 Read Cycle No, 20: 11] N. / tace ini IMPEDANCE PEDA\ DATA OUT HIGH IMPEDANCE Lea DATA VALID SSS tizce <__- teu a tpp Vec SUPPLY 50% CURRENT Icc 50% = ise Cis1-7 Write Cycle No. 1 (WE Controlled) {8 ADDRESS CE WE DATA IN tsp tub DATA VALID tyzwe tiawe HIGH IMPEDANCE DATA OUT NDEFINED Tou DATA U tapv DATA OUT (70191) DATA UNDEFINED DATA VALID Ci91-8 2-384CYPRESS SEMICONDUCTOR ULE D MM 2589bb2 OO0bb4? 2 mE CcYP = CY7C191 = T-46-23-19 CY7C192 SSS SEMICONDUCTOR " Nn Switching Waveforms (continued) Write Cycle No. 2 (CE Controlled)!&: 121 ADDRESS cE SRAMs a WE tsp DATA OUT HIGH IMPEDANCE (70192) DATA OUT owe (7191) DATA VALID tapv DATA IN DATA VALID Typical DC and AC Characteristics | NORMALIZED SUPPLY CURRENT NORMALIZED SUPPLY CURRENT OUTPUT SOURCE CURRENT vs, SUPPLY VOLTAGE ys. AMBIENT TEMPERATURE _ ys. OUTPUT VOLTAGE . 1.4 120 = o o loc _ B12 B12 5 100 3 3 3 10 310 f a a 5 8 N 0.8 Wo a = 06 = 06 g* a x 3 40 2 04 9 04 Veg = .0V a Vin = 5.0V 5 0.2 0.2 a 20 0.0 0.0 30 40 45 50 55 60 ~55 25 125 00 (1.0 20 30 40 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) OUTPUT VOLTAGE (V) NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME OUTPUT SINK CURRENT vs, SUPPLY VOLTAGE ys, AMBIENT TEMPERATURE ys. OUTPUT VOLTAGE 14 1.6 0 13 1.4 5 | 3 2 & 100 a 12 8 = Ni N 1.2 A 80 2 1.1 = a 8 = z 60 lied 5 1.0 a | 9 1.0 Z Voc = 5.0V 5 49 | 08 = | 0.9 a | 0.6 0 : | 45 50 8655 60 55 25 125 00 8 =1.0 20 30 40 | SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) OUTPUT VOLTAGE (V) | 2-385Sienna. a Pod WLE D MM 2549462 OOObb44S 4 BE CYP: Met CYPRESS SEMICONDUCTOR = CY7C191 SF EESoune T~46-23-19 XC Typical DC and AC Characteristics (continued) TYPICAL POWER-ON CURRENT TYPICAL ACCESS TIME CHANGE . vs. SUPPLY VOLTAGE vs. OUTPUT LOADING "NORMALIZED Icc vs. CYCLE TIME 3.0 30.0 1.25 | 9 2.5 a 25.0 8 Veo: = Bov G 2.0 s 20.0 a 1.00 - Vw osv z 16 < 15.0 z | 5 a = 5 LZ 8 10 10.0 Voc = 4.5V 9 0.75 Ta = 25C ra 0.5 5.0 0.0 0.50 00 610 20 30 40 5.0 QO 200 400 600 9800 1000 10 20 30 40 SUPPLY VOLTAGE () CAPACITANCE (pF) CYCLE FREQUENCY (MHz) Ordering Information Speed Package | Operating Speed Package | Operating (us) Ordering Code Type Range (ns) Ordering Code Type Range 12 CY7C191-12DC D22 Commercial 25 CY7C191~25DC D22 Commercial CY7C191-12LC L54 CY7C19125LC 154 CY7C191-12PC P21 CY7C191-25PC P21 CY7C191-12VC V21 CY7C19125VC V21 15 CY7C19115DC D22 Commercial CY7C191-25DMB D22 Military CY7C19115LC LS4 CY7C191-25KMB K74 CY7C19115PC P21 CY7C191-25LMB L54 CY7C191-15VC V21 35 CY7C19135DC D22 Commercial CY7C191-15DMB D22 Military CY7C19135LC 154 CY7C191-15KMB K74 CY7Ci9135PC P21 CY7C19115LMB L54 CY7C191-35VC V21 20 CY7C19120DC D22. Commercial CY7C191-35DMB D22 Military CY7C191-20LC LS4 CY7C191-35KMB K74 CY7C19120PC P2i CY7C19135LMB L54 CY7C19120VC Vv21 45 CY7C19145DC D22 Commercial CY7C191-20DMB D22 Military CY7C19145LC L54 CY7C19120KMB K74 CY7C19145PC P2i CY7C19120LMB L54 CY7C19145VC V21 Shadedarea contains advanced information. CY7C19145DMB D22 Military CY7C19145KMB K74 CY7C19145LMB L54 2-386tad vee SRAMs a CYPRESS SEMICONDUCTOR YEE D PS58%bbe OOO6b49 & EE CYP = CY7C191 S27 = ORESS T-46-23-10 CY7C192 SSS SEMICONDUCTOR Ordering Information (continued) MILITARY SPECIFICATIONS Speed Package | Operating Group A Subgroup Testing (ns) Ordering Code Type Range vo. 12 CY7C19212DC D22 | Commercial| DC Characteristics CY7C19212LC L54 Parameters Subgroups CY7C19212PC P2l Vou 1,2,3 CY7C19212VC Vai Vou 1,2,3 15 CY7C192~15DC D22 Commercial Vier 1,2,3 CY7C192-15LC L54 Viz, Max. 1,2,3 CY7C19215PC P2i ix 12,3 CY7C19215VC v21 Tor L235 CY7C19215DMB D22_ | Military joc 123 CY1C19215KMB K74 CY7C19215LMB Ls4 Isp 1,23 20 | CY7C19220DC D2 | Commercial Isp2 1,23 CY7C19220LC L54 CY7C19220PC P21 CY7C19220VE Vv2i Switching Characteristics CY7C19120DMB D22 | Military Parameters Subgroups CY7C19120KMB K74 aD GE CY7C19120LMB L54 5 CY7C19225DC D22 | Commercial Re 7,8,9, 10, Ut CY7C19225LC 154 taa 7, 8,9, 10, 11 CY7C19225PC P21 tona 7, 8,9, 10, 11 CY7C19225VC V21 tacE 7,8, 9, 10, 11 CY7C19225DMB D22 | Military WRITE CYCLE CY7C19225KMB K74 two 7,8, 9, 10, 11 CY7C19225LMB L54 tsce 7,8, 9, 10, i1 35 CY7C19235DC D22 Commercial taw 7,8, 9, 10, i1 CY1C19235LC L54 ian 7,8,9,10, 11 CY7C19235PC P21 -" 7591611 CY7C19235VC Vai CY7C192-35DMB D22 | Military 'PWE 78,9, 10, UL CY7C19235KMB Ki4 tsp 7, 8,9, 10, 11 CY7C19235LMB L54 tap 7,8,9, 10, 11 45 | CY7C19245DC D22 | Commercial tawelSl 7, 8, 9, 10, 11 CY7C19245LC L54 tapvt!3) 7, 8, 9, 10, 11 CYIC19245PC Pat Note: CY7C19245VC Vai 13. 7C191 only CY7C19245DMB D22_ | Military Document #: 38-00076G CY7C19245KMB K74 CY7C19245LMB L54 Shaded area contains advanced information. 2-387