PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Features * * * * * * * * * Applications 8 single-ended outputs Fanout Buffer Up to 200MHz output frequency Ultra low output additive jitter = 0.01ps (typ.) Selectable reference inputs support Xtal (10~50MHz), singleended and differential Low output skew ~ 50ps (typ.) 2.5V / 3.3V operation User configurable output VDDO in different banks: - Mixed 3.3V core, 2.5V, 1.8V or 1.5V output operating supply - Mixed 2.5V core, 1.8V, 1.5V or 1.2V output operating supply Industrial temperature range: -40C to +85C Packaging (Pb-free & Green available): - 32-pin TQFN (ZH) * Networking systems including switches and Routers * High frequency backplane based computing and telecom platforms Description The PI6C49X0208 is a high performance multi-voltage 8-outputs CMOS Fanout Buffer with internal Crystal Oscillator. The XTAL range is from 10MHz to 50MHz. The device has a wide range of operating voltages of 2.5V and 3.3V. The device also provides user selectable output VDD option, which provides excellent flexibilities to users. This device is ideal for systems that need to distribute low jitter clock signals to multiple destinations. GNDO ENABLE IN_SEL0 IN_SEL1 IN1 IN1# GND GNDO 31 30 29 28 27 26 25 IN_SEL0 CLK7 V DDO GNDO 16 NC GNDO CLK4 17 15 18 8 IN0# 7 GND 19 14 6 13 20 IN0 5 CLK6 GNDO CLK5 V DDO 12 21 XIN 22 4 XOUT 3 11 23 10 24 2 9 1 VDD CLK0 V DDO CLK1 GNDO CLK2 V DDO CLK3 NC Block Diagram 32 Pin Configuration XIN XOUT IN0 IN0# IN_SEL1 ENABLE VDDO Sync Crystal Oscillator Clock Input 8 CLK0~7 Control Circuit IN1 IN1# *IN0 can be single end ref clock0 and IN0# internal bias as Vdd/2 *IN1 can be single end ref clock1 and IN1# internal bias as Vdd/2 *IN-SEL[0:1] select XTAL, IN1/1# and IN0/0# input 12-0308 1 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Pin Description Pin# Pin Name Type Description 1, 3, 5, 7, 18, 20, 22, 24 CLK0~7 Output Clock Outputs 2, 6, 19, 23 VDDO Power Output Power Supplier 4, 9, 16, 21, 25, 32 GNDO Power Core Ground 8, 17 NC No Connect 15, 26 GND 10 VDD 11 XIN 12 XOUT 13 IN0 Power Power Input Output Input Pull-down Diff or Single End 14 IN0# Input Pull-up/ Pulldown When IN0 is single end IN0# internal bias as Vdd/2 27 IN1# Input Pull-up/ Pulldown When IN1 is single end IN1# internal bias as Vdd/2 28 IN1 Input Pull-down REF1 Diff or Single End 30, 29 IN_SEL[0:1] Input Pull-down IN-SEL[0:1] select XTAL, IN1/1# and IN0/ IN0# input 31 ENABLE Input Output Ground Core Power Supplier Crystal interface Crystal interface Synchronous active high Output Enable, LVCMOS/TTL Input Mode Selection Logic IN_SEL0 IN_SEL1 Selected Input 1 1 XTAL 0 1 XTAL 1 0 IN1/1# Diff or Single End 0 0 IN0/0# Diff or Single End Input/Output Operation State Input State Output State IN[0:1], IN[0:1]# open Logic Low IN[0:1], IN[0:1]# both to ground Logic Low IN[0:1]=High, IN[0:1]# =Low Logic High IN[0:1]=Low, IN[0:1]# =High Logic Low Output Mode Selection 12-0308 ENABLE Output CLK0~7 GND High-impedance VDD Enabled 2 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Power Supply DC Characteristics (VDD/VDDO = 3.3V 5%, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units VDD Core Supply Voltage 3.135 3.3 3.465 V VDDO Output Supply Voltage 3.135 3.3 3.465 V IDD Power Supply Current ENABLE = '0' 32 mA IDDO Output Supply Current ENABLE = '0' 1 mA Power Supply DC Characteristics (VDD/VDDO = 2.5V 5%, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units VDD Core Supply Voltage 2.375 2.5 2.625 V VDDO Output Supply Voltage 2.375 2.5 2.625 V IDD Power Supply Current ENABLE = '0' 15 mA IDDO Output Supply Current ENABLE = '0' 0.7 mA Power Supply DC Characteristics (VDD = 3.3V 5%, VDDO = 2.5V 5%, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units VDD Core Supply Voltage 3.135 3.3 3.465 V VDDO Output Supply Voltage 2.375 2.5 2.625 V IDD Power Supply Current ENABLE = '0' 29 mA IDDO Output Supply Current ENABLE = '0' 0.6 mA Power Supply DC Characteristics (VDD = 3.3V 5%, VDDO = 1.8V 0.2V, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units 3.135 3.3 3.465 V 1.6 1.8 2.0 V VDD Core Supply Voltage VDDO Output Supply Voltage IDD Power Supply Current ENABLE = '0' 29 mA IDDO Output Supply Current ENABLE = '0' 0.4 mA Power Supply DC Characteristics (VDD = 3.3V 5%, VDDO = 1.5V 0.15V, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units VDD Core Supply Voltage 3.135 3.3 3.465 V VDDO Output Supply Voltage 1.35 1.5 1.65 V IDD Power Supply Current ENABLE = '0' 29 mA IDDO Output Supply Current ENABLE = '0' 0.3 mA 12-0308 3 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Power Supply DC Characteristics (VDD = 2.5V 5%, VDDO = 1.8V 0.2V, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units 2.375 2.5 2.625 V 1.6 1.8 2.0 V VDD Core Supply Voltage VDDO Output Supply Voltage IDD Power Supply Current ENABLE = '0' 13 mA IDDO Output Supply Current ENABLE = '0' 0.4 mA Power Supply DC Characteristics (VDD = 2.5V 5%, VDDO = 1.5V 0.15V, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units VDD Core Supply Voltage 2.375 2.5 2.625 V VDDO Output Supply Voltage 1.35 1.5 1.65 V IDD Power Supply Current ENABLE = '0' 13 mA IDDO Output Supply Current ENABLE = '0' 0.3 mA Power Supply DC Characteristics (VDD = 2.5V 5%, VDDO = 1.2V 0.06V, TA = -40C to 85C) Symbols Parameters Test Conditions Min. Typ Max. Units VDD Core Supply Voltage 2.375 2.5 2.625 V VDDO Output Supply Voltage 1.14 1.2 1.26 V IDD Power Supply Current ENABLE = '0' 13 mA IDDO Output Supply Current ENABLE = '0' 0.3 mA Single-Ended input DC Characteristics (TA = -40C to 85C) Symbols Parameters VIH Input High Voltage VIL Input Low Voltage Test Conditions VOH Output Low Voltage (IOL = 8mA) VOL Units VDD + 0.3 V VDD = 2.5V 5% 1.7 VDD + 0.3 V VDD = 3.3V 5% -0.3 0.8 V -0.3 0.7 V VDD = 2.5V 5% VDDO = 2.5V 5% VDDO = 2.5V 5% (1) (1) 2.6 V 2 V 1.8 V 0.2V(1) 1.5 V 0.15V(1) 1.0 V VDDO = 1.2V 0.06V 0.7 V VDDO = 3.3V 5% (1) 2.6 V VDDO = 1.8V VDDO = 2.5V 5% 0.5 V VDDO = 1.8V 0.2V (1) 0.4 V 0.15V (1) 0.35 V 0.2 V VDDO = 1.5V Output Low Voltage (IOH = 1mA) Max. 2 VDDO = 1.5V Output High Voltage (IOH = -1mA) Typ VDD = 3.3V 5% VDDO = 3.3V 5% Output High Voltage (IOH = -8mA) Min. VDDO = 1.2V 0.06V Notes: 1. Outputs terminated with 50 to VDDO /2. See Parameter Measurement section, "Load Test Circuit" diagrams. 12-0308 4 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Differential input DC Characteristics (TA = -40C to 85C) Symbols Parameters Input High Current IIH Typ Max. Units 100 uA VDD = VIN =3.465V or 2.625V IN[0:1] VDD = 3.465V or 2.625V VIN = 0V -1 uA IN[0:1]# VDD = 3.465V or 2.625V VIN = 0V -50 uA VDD = 3.3V 0.25 1.3 VDD = 2.5V 0.25 1.3 VDD = 3.3V 0.5 VDD -1.35V VDD = 2.5V 0.5 VDD -0.85V Input Low Current VPP Peak-to-Peak Input Voltage (1) Common Mode Input Voltage (1,2) Notes: 1. VIL should not be less than -0.3V. 2. Common mode voltage is defined as 1/2(VIH-VIL). 12-0308 Min. IN[0:1], IN[0:1]# IIL VCMR Test Conditions 5 PI6C49X0208 Rev A V V 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer 3.3V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.) Storage Temperature............................................................-65C to +150C VDD, VDDO Voltage................................................................-0.5V to +3.6V Output Voltage ............................................................... -0.5V to VDD+0.5V Input Voltage ................................................................. -0.5V to VDD+0.5V Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. AC Characteristics (Over Operating Range: VDD/VDDO = 3.3V 5%, TA = -40 to 85C) Parameters Test Conditions(1) Description fMAX Using External Crystal Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz Min. Typ Max. Units 10 50 DC 200 45 55 % 80 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz crystal @ (Integration Range: 100Hz-1MHz) 0.05 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz reference input @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation 20% to 80% 200 (4) (4) 155.52MHz 800 ps 5 cycles 5 cycles 64 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 5 cycles. Min. setup time = 3ns. 12-0308 6 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer 2.5V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.) Storage Temperature............................................................-65C to +150C VDD, VDDO Voltage................................................................-0.5V to +3.6V Output Voltage ............................................................... -0.5V to VDD+0.5V Input Voltage ................................................................. -0.5V to VDD+0.5V Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. AC Characteristics (Over Operating Range: VDD/VDDO = 2.5V 5%, TA = -40 to 85C) Parameters Test Conditions(1) Description fMAX Using External Crystal Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz Min. Typ Max. Units 10 50 DC 200 45 55 % 80 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz @ (Integration Range: 100Hz1MHz) 0.06 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation 20% to 80% 200 (4) (4) 155.52MHz 800 ps 5 cycles 5 cycles 63 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 5 cycles. Min. setup time = 3ns. 12-0308 7 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer AC Characteristics (Over Operating Range: VDD = 3.3V 5%, VDDO = 2.5V 5%, TA = -40 to 85C) Parameters Test Conditions(1) Description Using External Crystal fMAX Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz Min. Typ Max. Units 10 50 DC 200 45 55 % 80 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz @ (Integration Range: 100Hz1MHz) 0.05 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation 20% to 80% 200 (4) (4) 155.52MHz 800 ps 5 cycles 5 cycles 62 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 5 cycles. Min. setup time = 3ns. 12-0308 8 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer AC Characteristics (Over Operating Range: VDD = 3.3V 5%, VDDO = 1.8V 0.2V, TA = -40 to 85C) Parameters Test Conditions(1) Description Using External Crystal fMAX Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz Min. Typ Max. Units 10 50 DC 200 45 55 % 80 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz @ (Integration Range: 100Hz1MHz) 0.06 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation 20% to 80% 200 (4) (4) 155.52MHz 900 ps 5 cycles 5 cycles 58 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 5 cycles. Min. setup time = 3ns. 12-0308 9 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer AC Characteristics (Over Operating Range: VDD = 3.3V 5%, VDDO = 1.5V 0.15V, TA = -40 to 85C) Parameters Test Conditions(1) Description Using External Crystal fMAX Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz Min. Typ Max. Units 10 50 DC 200 45 55 % 80 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz @ (Integration Range: 100Hz1MHz) 0.07 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation 20% to 80% 200 (4) (4) 155.52MHz 900 ps 5 cycles 5 cycles 53 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 5 cycles. Min. setup time = 3ns. 12-0308 10 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer AC Characteristics (Over Operating Range: VDD = 2.5V 5%, VDDO = 1.8V 0.2V, TA = -40 to 85C) Parameters Test Conditions(1) Description Using External Crystal fMAX Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz Min. Typ Max. Units 10 50 DC 200 45 55 % 80 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz @ (Integration Range: 100Hz1MHz) 0.06 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation 20% to 80% 200 (4) (4) 155.52MHz 900 ps 5 cycles 5 cycles 59 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 5 cycles. Min. setup time = 3ns. 12-0308 11 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer AC Characteristics (Over Operating Range: VDD = 2.5V 5%, VDDO = 1.5V 0.15V, TA = -40 to 85C) Parameters Test Conditions(1) Description Using External Crystal fMAX Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz Min. Typ Max. Units 10 50 DC 200 45 55 % 80 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz @ (Integration Range: 100Hz1MHz) 0.08 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation 20% to 80% 200 (4) (4) 155.52MHz 900 ps 5 cycles 5 cycles 55 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 5 cycles. Min. setup time = 3ns. 12-0308 12 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer AC Characteristics (Over Operating Range: VDD = 2.5V 5%, VDDO = 1.2V 0.06V, TA = -40 to 85C) Parameters Test Conditions(1) Description Using External Crystal fMAX Output Frequency Using External Clock Source (2) odc Output Duty Cycle 125MHz, 5pF load Min. Typ Max. Units 10 50 DC 125 40 60 % 60 ps (3) MHz tsk(o) Output Skew tjit(O) RMS Phase Jitter (Random) 25MHz @ (Integration Range: 100Hz1MHz) 0.13 ps tjit(additive) Additive RMS Phase Jitter (Random) 125MHz @ (Integration Range: 12kHz20MHz) 0.01 ps tR/tF Output Rise/Fall Time 20% to 80% 1000 tEN Output Enable Time tDIS Output Disable Time MUXisolation MUX Isolation (4) (4) 150MHz 1900 ps 6 cycles 6 cycles 72 dB Notes: 1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50 to VDDO/2, see waveforms. 2. Diff external clock source is driving IN0/IN0# and IN1/IN1# input. IN0/IN1 can be single end ref clock when IN0# /IN1# set as VDD/2 3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4. These parameters are guaranteed, but not tested. Max delay is 6 cycles. Min. setup time = 3ns. 12-0308 13 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Waveforms Output to Output Skew - tsk(O) Duty Cycle - tDC VOH CLKx VDDO/2 50% VOL tSK(O) VOL tSK(O) VOH CLKy tPW VOH tPERIOD VDDO/2 tDC = (tPW / tPERIOD ) x 100% VOL ENABLE Timing Diagram IN ENABLE CLK[0:7] AC Test Circuit Load [VDD - VDDO/2] [+VDDO/2] VDD VDDO Z = 50-Ohm GND Scope 50Ohm [-VDDO/2] Crystal Characteristic (link to "http://www.pericom.com/products/timing/crystals/index.php" for more detailed and different size crystal specifications) Parameters Description Min OSCmode Mode of Oscillation FREQ Frequency 10 ESR(1) Equivalent Series Resistance 30 Cload Load Capacitance Cshunt Shunt Capacitance Typ Max. Units 50 MHz 50 Ohm Fundamental 25 18 DRIVE level pF 7 pF 1 mW Note: 1. ESR value is dependent upon frequency of oscillation 12-0308 14 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Application Notes Crystal circuit connection The following diagram shows PI6C49X0208 crystal circuit connection with a parallel crystal. For the CL=18pF crystal, it is suggested to use C1=18pF, C2=18pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board layouts. R1 is not recommended. Crystal Oscillator Circuit XTAL_IN C1 18pF Crystal(CL=18pF) 0 XTAL_OUT C2 18pF 12-0308 R1 15 PI6C49X0208 Rev A 01/08/13 PI6C49X0208 High Performance 1:8 Multi-Voltage CMOS Buffer Notes: 1. All dimensions are in mm. Angles in degrees. 2. Coplanarity applies to the exposed pad as well as the terminals. 3. Refer JEDEC MO-220 4. Recommended land pattern is for reference only. 5. Thermal pad soldering area (mesh stencile design is recommended) DATE: 06/30/11 DESCRIPTION: 32-contact, Thin Quad Flat No-Lead (TQFN) PACKAGE CODE: ZH32 DOCUMENT CONTROL #: PD-2070 REVISION: B Note: 11-0147 * For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information(1,2,3) Ordering Code PI6C49X0208ZHIE Package Code Package Description ZH Pb-Free and Green 32-pin TQFN Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green 3. X suffix = Tape/Reel Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com 12-0308 16 PI6C49X0208 Rev A 01/08/13