COST EFFECTIVE GREEN PWM CONTROLLER AP3105/V/L/R
Data Sheet
10
Nov. 2012 Rev. 1. 2 BCD Semiconductor Manufacturing Limited
Operation Description
The AP3105/V/L/R is specifically designed for off-line
AC-DC power supply used in LCD monitor, n otebook
adapter and battery charger ap plications. It of fers a cost
effective solution with a versatile protection function.
Start-up Current and UVLO
The start-up current of AP3105/V/L/R is optimized to
realize ultra low current (5PA typical) so that VCC
capacitor can be charged more quickly. The direct
benefit of low start-up current is the availability of
using large start-up resistor, which minimizes the
resistor power loss for high voltage AC input.
An UVLO comparator is included in AP3105/V/L/R to
detect the voltage on VCC pin. It ensu res that AP3105/
V/L/R can draw adequate energy from hold-up
capacitor during power-on. The turn-on threshold is
15.5V and the turn-off threshold is 8.6V.
Current Sense Comparator and PWM
Latch
The AP3105/V/L/R operates as a current mode
controller, the output switch conduction is initiated by
every oscillator cycle and is terminated when the peak
inductor current reaches the threshold level established
by the FB pin. The inductor current signal is converted
to a voltage signal by inserting a reference sense
resistor RS. The inductor current under normal
operating conditions is con trolled by the voltage at FB
pin. The relation between peak inductor current (IPK)
and VFB is:
Moreover, FOCP with 1.8V threshold is only about
100ns delay, which can avoid some catastrophic
damages such as secondary rectifier short test. Few
drive cycles can alleviate the destruction range and get
better protection.
Leading
edge Blanking
A narrow spike on the leading edge of the current
waveform can usually be observed when the power
MOSFET is turned on. A 250ns leading-edge blank is
built-in to prevent the false-triggering caused by the
turn-on spike. During this period, the current limit
comparator is disabled and the gate driver can not be
switched off.
At the time of turning on the MOSFET, a negative
undershoot (maybe larger than -0.3V) can occur on the
SENSE pin. So it is strongly recommended to add a
small RC filter or at least connect a resistor ĀRā on
this pin to protect the IC (Shown as Figure 8).
Figure 8
Built-in Slope Compensation
It is well known that a continuous cu rrent mod e SMPS
may become unstable when the duty cycle exceeds
50%. The built-in slope compensation can improve the
stability, so there is no need for design engineer to
spend much time on that.
FB Pin and Short Circuit Protection
This pin is normally connect ed to the op to-coupler and
always paralleled with a capacitor for loop
compensation. When the voltage at this pin is greater
than 4.2V and lasts for about 32ms, the IC will enter
the protection mode. For AP3105/V/R, the system will
enter hiccup mode to wait the VCC decreasing to low
UVLO level, then the IC will try to restart until the
failure removed. And when this voltage is less than
1.55V, the IC will stop the drive pulse immediately.
Therefore, this feature can be used for short circuit
protection, which makes the system immune from
damage. Normally, output short m akes the VFB value
to the maximum because the opto-coupler is cut off.
VCC Maintain Mode
During light load or step load , VFB will drop and be
SFBPK RVI 3/)8.0(
FB
SENSE
GATE
GND
CTRL 6
1
3
4
AP3105
VCC
5
2
Large undershoot (more than
-0.3V) may damage the SENSE pin
R
C
Necessary