SDCFB-4-101 - SanDisk Corp.

CompactFlashTM

Memory Card

Product Manual

CORPORATE HEADQUARTERS

140 Caspian Court

Sunnyvale, CA 94089

408-542-0500

FAX: 408-542-0503

URL: http://www.sandisk.com

SanDisk¨ Corporation general policy does not recommend the use of its products in life support applications where in a

failure or malfunction of the product may directly threaten life or injury. Per SanDisk Terms and Conditions of Sale, the

user of SanDisk products in life support applications assumes all risk of such use and indemnifies SanDisk against all

damages.

The information in this manual is subject to change without notice.

SanDisk Corporation shall not be liable for technical or editorial errors or omissions contained herein; nor for incidental or

consequential damages resulting from the furnishing, performance, or use of this material.

All parts of the SanDisk CompactFlash Memory Card documentation are protected by copyright law and all rights are

reserved. This documentation may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to

any electronic medium or machine readable form without prior consent, in writing, from SanDisk Corporation.

SanDisk and the SanDisk logo are registered trademarks of SanDisk Corporation. ImageMate, CompactFlash and CF are

trademarks of SanDisk Corporation.

Product names mentioned herein are for identification purposes only and may be trademarks and/or registered trademarks

of their respective companies.

The SanDisk CompactFlash Memory Card is covered or licensed under one or more of the following U.S. Patent Nos.

5,070,032; 5,095,344; 5,168,465; 5,172,338; 5,198,380; 5,200,959; 5,268,318; 5,268,870; 5,272,669; 5,418,752;

5,602,987. Other U.S. and foreign patents awarded and pending.

Lit. No. 20-10-00038 Rev. 5 5/99 Printed in U.S.A.

Revision History

¥ Revisions before Rev. 5Ñinitial release and general changes.

¥ Revision 5Ñgeneral editorial changes, CF Type II information added, new higher capacities products added, some

lower capacities removed, new card reader/writer vendor added.

CompactFlash Memory Card Product Manual

Table of Contents

1.0 Introduction to the CompactFlash Memory Card....................................................7

1.1 Scope...............................................................................................................................8

1.2 Product Models.................................................................................................................8

1.3 System Features...............................................................................................................8

1.4 PCMCIA Standard...........................................................................................................9

1.5 CompactFlash Specification ............................................................................................9

1.6 Related Documentation....................................................................................................9

1.7 CompactFlash Memory Cards Compared to the SanDisk FlashDisk Products.....................9

1.7.1 System Power Requirements................................................................................ 10

1.7.2 Card Information Structure (CIS)........................................................................ 10

1.7.3 Capacity Specifications..................................................................................... 11

1.7.4 Voltage Sense Signal -VS1 ................................................................................. 11

1.7.5 True IDE Mode ................................................................................................... 12

1.7.6 Identify Drive Information................................................................................. 12

1.8 Functional Description ................................................................................................... 12

1.8.1 Flash Technology Independence.......................................................................... 12

1.8.2 Defect and Error Management............................................................................. 12

1.8.3 Endurance ......................................................................................................... 13

1.8.4 Wear Leveling................................................................................................... 13

1.8.5 Using the Erase Sector and Write without Erase Commands................................. 13

1.8.5.1 Interaction with Systems not Aware of the Erase Sector and

Write without Erase Commands .......................................................... 13

1.8.5.2 Limitations and Issues......................................................................... 14

1.8.6 Automatic Sleep Mode ....................................................................................... 14

1.8.7 Dynamic Adjustment of Performance versus Power Consumption ........................... 14

1.8.8 Power Supply Requirements................................................................................ 14

2.0 Product Specifications................................................................................15

2.1 System Environmental Specifications ............................................................................. 15

2.2 System Power Requirements............................................................................................ 15

2.3 System Performance ....................................................................................................... 16

2.4 System Reliability and Maintenance.............................................................................. 16

2.5 Physical Specifications.................................................................................................. 17

2.6 Capacity Specifications................................................................................................. 21

3.0 Installation .............................................................................................22

3.1 Mounting........................................................................................................................ 22

4.0 CompactFlash Memory Card Interface Description...............................................23

4.1 Physical Description...................................................................................................... 23

4.1.1 Pin Assignments and Pin Type............................................................................. 23

4.2 Electrical Description .................................................................................................... 23

4.3 Electrical Specification.................................................................................................. 30

4.3.1 Input Leakage Current........................................................................................ 30

4.3.2 Input Characteristics ......................................................................................... 30

4.3.3 Output Drive Type............................................................................................. 31

4.3.4 Output Drive Characteristics............................................................................. 31

CompactFlash Memory Card Product Manual

Table of Contents (continued)

4.3.5 Interface/Bus Timing.......................................................................................... 32

4.3.6 Attribute Memory Read Timing Specification ..................................................... 32

4.3.7 Attribute Memory Write Timing Specification.................................................... 33

4.3.8 Common Memory Read Timing Specification....................................................... 34

4.3.9 Common Memory Write Timing Specification...................................................... 35

4.3.10 I/O Input (Read) Timing Specification................................................................ 36

4.3.11 I/O Output (Write) Timing Specification............................................................ 37

4.3.12 True IDE Mode I/O Input (Read) Timing Specification......................................... 38

4.3.13 True IDE Mode I/O Output (Write) Timing Specification..................................... 39

4.4 Card Configuration ........................................................................................................ 40

4.4.1 Attribute Memory Function................................................................................. 41

4.4.2 Configuration Option Register (Address 200h in Attribute Memory)..................... 42

4.4.3 Card Configuration and Status Register (Address 202h in Attribute Memory) ....... 42

4.4.4 Pin Replacement Register (Address 204h in Attribute Memory)............................ 43

4.4.5 Socket and Copy Register (Address 206h in Attribute Memory)............................ 44

4.5 I/O Transfer Function ..................................................................................................... 45

4.5.1 I/O Function....................................................................................................... 45

4.6 Common Memory Transfer Function ................................................................................. 46

4.6.1 Common Memory Function................................................................................... 46

4.7 True IDE Mode I/O Transfer Function .............................................................................. 47

4.7.1 True IDE Mode I/O Function................................................................................ 47

5.0 ATA Drive Register Set Definition and Protocol ..................................................48

5.1 I/O Primary and Secondary Address Configurations........................................................ 49

5.2 Contiguous I/O Mapped Addressing................................................................................ 50

5.3 Memory Mapped Addressing .......................................................................................... 51

5.4 True IDE Mode Addressing.............................................................................................. 52

5.5 ATA Registers................................................................................................................ 53

5.5.1 Data Register (Address - 1F0[170]; Offset 0,8,9)................................................... 53

5.5.2 Error Register (Address - 1F1[171]; Offset 1, 0Dh Read Only)............................... 54

5.5.3 Feature Register (Address - 1F1[171]; Offset 1, 0Dh Write Only).......................... 54

5.5.4 Sector Count Register (Address - 1F2[172]; Offset 2) ............................................. 54

5.5.5 Sector Number (LBA 7-0) Register (Address - 1F3[173]; Offset 3).......................... 54

5.5.6 Cylinder Low (LBA 15-8) Register (Address - 1F4[174]; Offset 4) ......................... 54

5.5.7 Cylinder High (LBA 23-16) Register (Address - 1F5[175]; Offset 5)...................... 54

5.5.8 Drive/Head (LBA 27-24) Register (Address 1F6[176]; Offset 6)............................ 55

5.5.9 Status & Alternate Status Registers (Address 1F7[177]&3F6[376]; Offsets 7 & Eh) 56

5.5.10 Device Control Register (Address - 3F6[376]; Offset Eh)....................................... 56

5.5.11 Card (Drive) Address Register (Address 3F7[377]; Offset Fh) .............................. 57

6.0 ATA Command Description .........................................................................58

6.1 ATA Command Set......................................................................................................... 58

6.1.1 Check Power Mode - 98H, E5H............................................................................ 60

6.1.2 Execute Drive Diagnostic - 90H........................................................................... 60

6.1.3 Erase Sector(s) - C0H.......................................................................................... 61

6.1.4 Format Track - 50H ............................................................................................ 62

6.1.5 Identify Drive - ECH ......................................................................................... 62

CompactFlash Memory Card Product Manual

Table of Contents (continued)

6.1.5.1 General Configuration......................................................................... 64

6.1.5.2 Default Number of Cylinders.............................................................. 64

6.1.5.3 Default Number of Heads.................................................................... 64

6.1.5.4 Number of Unformatted Bytes per Track .............................................. 64

6.1.5.5 Number of Unformatted Bytes per Sector.............................................. 64

6.1.5.6 Default Number of Sectors per Track.................................................... 64

6.1.5.7 Number of Sectors per Card.................................................................. 64

6.1.5.8 Memory Card Serial Number............................................................... 64

6.1.5.9 Buffer Type......................................................................................... 64

6.1.5.10 Buffer Size.......................................................................................... 64

6.1.5.11 ECC Count........................................................................................... 64

6.1.5.12 Firmware Revision.............................................................................. 64

6.1.5.13 Model Number .................................................................................... 64

6.1.5.14 Read/Write Multiple Sector Count...................................................... 65

6.1.5.15 Double Word Support.......................................................................... 65

6.1.5.16 Capabilities....................................................................................... 65

6.1.5.17 PIO Data Transfer Cycle Timing Mode................................................. 65

6.1.5.18 DMA Data Transfer Cycle Timing Mode............................................... 65

6.1.5.19 Translation Parameters Valid............................................................. 65

6.1.5.20 Current Number of Cylinders, Heads, Sectors/Track............................. 65

6.1.5.21 Current Capacity ................................................................................ 65

6.1.5.22 Multiple Sector Setting ....................................................................... 65

6.1.5.23 Total Sectors Addressable in LBA Mode............................................... 65

6.1.6 Idle - 97H, E3H.................................................................................................. 66

6.1.7 Idle Immediate - 95H, E1H................................................................................. 66

6.1.8 Initialize Drive Parameters - 91H...................................................................... 67

6.1.9 Read Buffer - E4H.............................................................................................. 67

6.1.10 Read Multiple - C4H.......................................................................................... 68

6.1.11 Read Long Sector - 22H, 23H............................................................................... 69

6.1.12 Read Sector(s) - 20H, 21H................................................................................... 69

6.1.13 Read Verify Sector(s) - 40H, 41H........................................................................ 70

6.1.14 Recalibrate - 1XH.............................................................................................. 70

6.1.15 Request Sense - 03H............................................................................................ 71

6.1.16 Seek - 7XH......................................................................................................... 72

6.1.17 Set Features - EFH ............................................................................................. 72

6.1.18 Set Multiple Mode - C6H.................................................................................... 74

6.1.19 Set Sleep Mode- 99H, E6H.................................................................................. 74

6.1.20 Standby - 96H, E2H............................................................................................ 75

6.1.21 Standby Immediate - 94H, E0H .......................................................................... 75

6.1.22 Translate Sector - 87H........................................................................................ 76

6.1.23 Wear Level - F5H .............................................................................................. 77

6.1.24 Write Buffer - E8H............................................................................................. 77

6.1.25 Write Long Sector - 32H, 33H.............................................................................. 78

6.1.26 Write Multiple Command - C5H......................................................................... 78

6.1.27 Write Multiple without Erase - CDH ................................................................. 79

6.1.28 Write Sector(s) - 30H, 31H ................................................................................. 80

6.1.29 Write Sector(s) without Erase - 38H ................................................................... 81

6.1.30 Write Verify Sector(s) - 3CH.............................................................................. 82

6.2 Error Posting .................................................................................................................. 83

CompactFlash Memory Card Product Manual

Table of Contents (continued)

7.0 CIS Description .......................................................................................85

Ordering Information and Technical Support............................................................101

Ordering Information .............................................................................................................103

CompactFlash Memory Card.........................................................................................103

SanDisk ImageMateª CompactFlash Drive.................................................................103

CompactFlash Memory Card Evaluation Kit .................................................................103

System Software, Card Reader/Writers and Connectors

Compatible with the SanDisk CompactFlash Memory Cards ........................................104

Technical Support Services.....................................................................................................108

Direct SanDisk Technical Support.................................................................................108

SanDisk Worldwide Web Site.......................................................................................108

SanDisk Sales Offices......................................................................................109

Appendix CompactFlash Connector Specifications....................................................113

Limited Warranty ...........................................................................................123

CompactFlash Memory Card Product Manual

1.0 Introduction to the CompactFlash Memory Card

The SanDisk CompactFlashª Memory Card

(CFª) products provide high capacity solid state

flash memory that electrically complies with the

Personal Computer Memory Card International

Association ATA (PC Card ATA) standard. (In

Japan, the applicable standards group is JEIDA.)

The CompactFlash Memory Card Series also

supports a True IDE Mode that is electrically

compatible with an IDE disk drive.

CompactFlash Memory Cards provide up to 160

million bytes (Megabytes, MBytes or MB) of

formatted storage capacity in the CF Type II form

factor and 96 megabytes in the original CF form

factor. The original CF form factor card can be

used in any system that has a CF slot, and with a

Type II PCMCIA adapter can be used in any

system that has a PCMCIA Type II or Type III

socket. The newer CF Type II card fits into a CF

Type II slot.

SanDisk has expanded the available capacity of

the CompactFlash Storage Card by offering a new

CF Type II form factor. Just slightly thicker than

the original CF form factor, the CF Type II form

factor is 5 mm thick instead of 3.3 mm thick.

The CompactFlash Memory Card Series uses

SanDisk Flash memory chips which were

storage applications. In addition to the mass

storage specific Flash memory chips, the

CompactFlash Memory Cards include an on-card

intelligent controller that provides a high level

interface to the host computer. This interface

allows a host computer to issue commands to t h e

memory card to read or write blocks of memory. A

block of memory consists of 512 bytes of data and is

protected by a powerful Error Correcting Code

(ECC).

The CompactFlash Memory Card on-card

intelligent controller manages interface protocols,

data storage and retrieval as well as ECC, defect

handling and diagnostics, power management and

clock control. Once the CompactFlash Memory

Card has been configured by the host, it appears

to the host as a standard ATA (IDE) disk drive.

Additional ATA commands have been provided to

enhance system performance.

The host system can support as many cards as

there are CompactFlash, CompactFlash Type II

and PCMCIA Type II or III card slots. The original

form factor CompactFlash Memory Cards require

a PCMCIA Type II Adapter to be used in a

PCMCIA Type II or Type III socket.

SanDisk also offers an industrial version of the

CompactFlash Memory Card Series, which has a

broader operating and non-operating temperature

range than the standard product. Please see

Section 2 for detailed specifications.

SanDisk

Single

Chip

Controller

Host

Interface

Dat a

In/Out

Control

SanDisk

Flash

Modules

SanDisk Compact Flash

Figure 1-1 CompactFlash Memory Card Block Diagram

CompactFlash Memory Card Product Manual

1.1 Scope

This document describes the key features and

specifications of CompactFlash Memory Cards, as

well as the information required to interface this

product to a host system.

1.2 Product Models

The CompactFlash Memory Card Series is

available in a variety of capacities as shown in

the following table. The CompactFlash Memory

Card is also available with Windows and DOS

compatible compression software preloaded. All

models are shipped formatted with a DOS 5.0 file

structure.

Standard Model Industrial Model Capacity

(formatted)

SDCFB-4 SDCFBI-4 4.0 MB

SDCFB-8 SDCFBI-8 8.0 MB

SDCFB-10 SDCFBI-10 10.4 MB

SDCFB-15 SDCFBI-15 15.0 MB

SDCFB-16* SDCFBI-16* 16.0 MB

SDCFB-20 SDCFB-20 20.0 MB

SDCFB-30 SDCFBI-30 30.0 MB

SDCFB-32* SDCFBI-32* 32.1 MB

SDCFB-40 SDCFBI-40 40.1 MB

SDCFB-48 SDCFBI-48 48.1 MB

SDCFB-64* SDCFBI-64* 64.2 MB

SDCFB-80* SDCFBI-80* 80.2 MB

SDCFB-96* SDCFBI-96* 96.2 MB

SDCF2B-160*

(CF Type II) SDCFBI-160* 160.4 MB

*Preliminary information based on 128 Mbit technology.

1.3 System Features

¥ The industryÕs smallest form factor

¥ Up to 160 MBytes of mass storage data (in

CF Type II form factor)

¥ PC Card ATA protocol compatible

¥ True IDE Mode compatible

¥ Very low CMOS power

¥ Very high performance

¥ Programmable power versus performance

¥ Very rugged

¥ Low weight

¥ Noiseless

¥ Low Profile

¥ +5 Volts or +3.3 Volts operation

¥ Automatic error correction and retry

capabilities

¥ Supports power down commands and sleep

modes

¥ Non-volatile storage (no battery required)

¥ MTBF >1,000,000 hours

¥ Minimum 10,000 insertions

¥ Standard (SDCFB and SDCF2B Series)

and Industrial versions (SDCF2BI and

SDCFBI Series)

CompactFlash Memory Card Product Manual

1.4 PCMCIA Standard

CompactFlash Memory Cards are fully

electrically compatible with the PCMCIA

specifications listed below. These specifications

may be obtained from:

PCMCIA

2635 North First St., Ste. 209

San Jose, CA 95131

USA

Phone: 408-433-2273

FAX: 408-433-9558

1) PCMCIA PC Card Standard, January 1995

2) PCMCIA PC Card ATA Specification,

January 1995

1.5 CompactFlash Specification

CompactFlash Memory Cards are fully

compatible with the CompactFlash Specification

published by the CompactFlash Association.

Contact the CompactFlash Association for more

information.

CompactFlash Association

P.O. Box 51537

Palo Alto, CA 94303

USA

Phone: 415-843-1220

FAX: 415-493-1871

www.compactflash.org

1.6 Related Documentation

1) American National Standard X3.221

AT Attachment for Interface for Disk

Drives Document

This document can be ordered from Global

Engineering Documents by calling

1-800-854-7179.

1.7 CompactFlash Memory Cards

Compared to the SanDisk

FlashDisk Products

The CompactFlash Memory Card Series, when

used with a PCMCIA Type II adapter, is

compatible with SanDiskÕs FlashDisk products.

Differences between the CompactFlash Memory

Card and the FlashDisk that could be noticed by

previous FlashDisk users are explained in the

following sections.

CompactFlash Memory Card Product Manual

1.7.1 System Power Requirements

The system power requirements for the

CompactFlash Memory Card are different from

those of the SDP5A FlashDisk. The two tables

below show the SDP5A FlashDisk and th e

CompactFlash Memory Card power requirements.

SDCFB-XX and SDCF2B-XX

(Standard Version) SDCFBI-XX and SDCF2BI-XX

(Industrial Version)

DC Input Voltage (VCC)

100 mV max. ripple (p-p) 3.3V ±5% 5V ± 1 0 % 3.3V ±5% 5 V ±5%

+5 V Currents

(maximum Average value)

See Notes 1 to 3.

Sleep:

Reading:

Writing:

Read/Write Peak

200 µA

(Slow - Fast)

32 mA - 45 mA

32 mA - 60 mA

150 mA/50µs

500 µA

(Slow - Fast)

46 mA - 75 mA

46 mA - 90 mA

150 mA/50µs

200 µA

(Slow - Fast)

32 mA - 45 mA

32 mA - 60 mA

150 mA/50µs

500 µA

(Slow - Fast)

46 mA - 75 mA

46 mA - 90 mA

150 mA/50µs

Note 1. All values quoted are typical at ambient temperature and nominal supply voltage unless otherwise stated.

Note 2. Sleep mode currently is specified under the condition that all card inputs are static CMOS levels and in a

“Not Busy“ operating state.

Note 3. The currents specified show the bounds of programmability of the product.

Model SDP5A Standard FlashDisk Industrial FlashDisk

DC Input Voltage (VPP) (Note 4) Not Used Not Used

DC Input Voltage (VCC)

100 mv max. ripple (p-p) 5 V ±10% 5 V ±5%

+5 V Currents

(maximum average value)

See Notes 1 to 5

Sleep:

Reading:

Writing:

Type III

Reading:

Writing:

≤ 1 mA

(Slow - Fast)

36 mA - 100 mA

36 mA - 125 mA

36 mA - 150 mA

≤ 1 mA

(Slow - Fast)

36 mA - 100 mA

36 mA - 125 mA

36 mA - 150 mA

Note 1. Sleep mode current is specified under the condition that all FlashDisk inputs are at static CMOS levels and

in a “Not Busy” operating state.

Note 2. The currents specified show the complete range of programmability in the PC Card ATA FlashDisk. A

tradeoff between performance and maximum current used can be done using the Set Features command.

The FlashDisk defaults to the fastest speed and highest current. See the Set Features command for more

details.

Note 3. For information on peak currents during power on, hot insertion and writing, please contact SanDisk

Technical Support at (408) 542-0400.

Note 4. The Vpp pins are not connected in this product.

Note 5. At maximum performance, typical average Read current is 70 mA and typical average write current is 100

mA.

1.7.2 Card Information Structure (CIS)

The Card Information Structure (CIS) of the

CompactFlash Memory Card is different from t he

SDP5A FlashDisk CIS. The CompactFlash

Memory Card CIS indicates support for twin card

and 3.3 volt operation which are not supported in

the SDP5A FlashDisk. Both the SDP5A

FlashDisk and the CompactFlash Memory Card

support 5 volt operation.

CompactFlash Memory Card Product Manual

1.7.3 Capacity Specifications

The capacity specifications for the SDP5A

FlashDisk are different from the capacity

specifications of the CompactFlash Memory Card.

The tables below show the capacity specifications

of the SDP5A FlashDisk and the CompactFlash

Memory Card.

Note: SanDisk defines a megabyte as one million

bytes.

Model Number Capacity

(formatted) Sectors/Card

(Max LBA+1) No. of

Heads No. of

Sectors/

Track

No. of

Cylinders

SDP5A-5 5,242,880 bytes 10,240 2 32 160

SDP5A-10 10,485,760 bytes 20,480 2 32 320

SDP5A-20 20,971,520 bytes 40,960 2 32 640

SDP5A-40 41,943,040 bytes 81,920 4 32 640

SDP5A-110 110,100,480 bytes 215,040 8 32 840

SDP5A-175 175,374,336 bytes 342,528 12 32 892

Model Number Capacity

(formatted) Sectors/Card

(Max LBA+1) No. of

Heads No. of

Sectors/

Track

No. of

Cylinders

SDCFB-4 4,030,464 bytes 7,872 2 32 123

SDCFB-8 8,028,160 bytes 15,680 2 32 245

SDCFB-10 10,485,760 bytes 20,480 2 32 320

SDCFB-15 15,007,744 bytes 29,312 2 32 458

SDCFB-16* 16,056,320 bytes 31,360 2 32 490

SDCFB-20 20,054,016 bytes 39,168 2 32 612

SDCFB-30 30,081,024 bytes 58,752 6 32 306

SDCFB-32* 32,112,640 bytes 62,720 4 32 490

SDCFB-40 40,108,032 bytes 78,336 4 32 612

SDCFB-48 48,103,424 bytes 93,952 4 32 734

SDCFB-64* 64,225,280 bytes 125,440 8 32 490

SDCFB-80* 80,216,064 bytes 156,672 8 32 612

SDCFB-96* 96,206,848 bytes 187,904 8 32 734

SDCF2B-160* 160,432,128 bytes 313,344 12 32 816

*Preliminary information based on 128 Mbit technology.

1.7.4 Voltage Sense Signal -VS1

The Voltage Sense Signal -VS1, pin 43, of the

CompactFlash Memory Card is grounded because

the Card Information Structure (CIS) can be read

at 3.3 volts. In the earlier SDP5A FlashDisk, this

pin is not grounded because the SDP5A FlashDisk

CIS can only be read at 5 volts.

Note: In some early platforms, the -VS1 pin (pin 43) i s

also the Refresh pin for DRAM cards. Plugging

the CompactFlash Memory Card into a platform

supporting the Refresh pin will hang the bus.

CompactFlash Memory Card Product Manual

1.7.5 True IDE Mode

The CompactFlash Memory Card differs from t h e

SDP5A FlashDisk in that it can be configured in

True IDE Mode. See section 4.6 True IDE Mode I/O

Transfer Function.

1.7.6 Identify Drive Information

Word 51 of the Identify Drive Command

information has a default value of 0000H for the

SDP5A FlashDisk. The data field type

information for this word is ÒPIO data transfer

cycle timing mode 0.Ó

For the CompactFlash Memory Card, word 51 of

the Identify Drive Command information has a

default value of 0001H. The data field type

information for this word is ÒPIO data transfer

cycle timing mode 1.Ó

1.8 Functional Description

CompactFlash Memory Cards contain a high

level, intelligent subsystem as shown in the block

diagram, Figure 1-1. This intelligent

(microprocessor) subsystem provides many

capabilities not found in other types of memory

cards. These capabilities include:

1. Standard ATA register and command set

(same as found on most magnetic disk

drives).

2. Host independence from details of erasing

and programming flash memory.

3. Sophisticated system for managing

defects (analogous to systems found in

magnetic disk drives).

4. Sophisticated system for error recovery

including a powerful error correction code

(ECC).

5. Power management for low power

operation.

1.8.1 Flash Technology Independence

The 512 byte sector size of CompactFlash Memory

Card is the same as that in an IDE magnetic disk

drive. To write or read a sector (or multiple

sectors), the host computer software simply issues

a Read or Write command to the CompactFlash

Memory Card. This command contains the address

and the number of sectors to write/read. The host

software then waits for the command to complete.

The host software does not get involved in the

details of how the flash memory is erased,

programmed or read. This is extremely important

as flash devices are expected to get more and more

complex in the future. Since the CompactFlash

Memory Card Series uses an intelligent on-board

controller, the host system software will not

require changing as new flash memory evolves. In

other words, systems that support th e

CompactFlash Memory Card today will be able to

access future SanDisk cards built with new flash

technology without having to update or change

host software.

1.8.2 Defect and Error Management

CompactFlash Memory Cards contain a

sophisticated defect and error management

system. This system is analogous to the systems

found in magnetic disk drives and in many cases

offers enhancements. For instance, disk drives do

not typically perform a read after write to confirm

the data is written correctly because of t he

performance penalty that would be incurred.

CompactFlash Memory Cards do a read after

write under margin conditions to verify that the

data is written correctly (except in the case of a

Write without Erase Command). In the rare case

that a bit is found to be defective, CompactFlash

Memory Cards replace this bad bit with a spare

bit within the sector header. If necessary,

CompactFlash Memory Cards will even replace

the entire sector with a spare sector. This is

completely transparent to the host and does not

consume any user data space.

The CompactFlash Memory Card soft error rate

specification is much better than the magnetic

disk drive specification. In the extremely rare

case a read error does occur, CompactFlash

Memory Cards have innovative algorithms to

CompactFlash Memory Card Product Manual

recover the data. This is similar to using retries on

a disk drive but is much more sophisticated. The

last line of defense is to employ a powerful ECC to

correct the data. If ECC is used to recover data,

defective bits are replaced with spare bits to

ensure they do not cause any future problems.

These defect and error management systems

coupled with the solid state construction give

CompactFlash Memory Cards unparalleled

reliability.

1.8.3 Endurance

CompactFlash Memory Cards have an endurance

specification for each sector of 300,000 writes

(reading a logical sector is unlimited). This is far

beyond what is needed in nearly all applications

of CompactFlash Memory Cards. Even very heavy

use of CompactFlash Card in digital cameras,

cellular phones, PDAs, personal communicators,

pagers, voice recorders, ruggedized handheld

computers, palmtop and notebook computers will

use only a fraction of the total endurance over t h e

typical computerÕs five year lifetime. For

instance, it would take over 34 years to wear out

an area on the CompactFlash Card on which a

file of any size (from 512 bytes to capacity) was

rewritten 3 times per hour, 8 hours a day, 365 days

per year.

With typical applications (PIM software, word

processing, spreadsheets, etc.), the endurance

limit is not of any practical concern to the vast

majority of users.

1.8.4 Wear Leveling

CompactFlash Memory Card Series products do

not require or perform a Wear Level operation.

The command is supported as a NOP operation to

maintain backward compatibility with existing

software utilities.

1.8.5 Using the Erase Sector and Write without

Erase Commands

The Erase Sector and Write without Erase

commands provide the capability to substantially

increase the write performance of the

CompactFlash Memory Card. Once a sector has

been erased using the Erase Sector command, a

write to that sector will be much faster. This is

because a normal write operation includes a

separate sector erase prior to write.

An example of where these commands may be

useful is in a digital camera. The camera user may

have plenty of time to erase pictures but may wish

to take several pictures in rapid succession. To

accomplish this, the host system (i.e., camera)

would use the Erase Sectors command to pre-erase

the sectors that will store the pictures. When the

pictures are taken, the camera can store them in

the previously erased sectors much faster than in

non-erased sectors.

1.8.5.1 Interaction with Systems not Aware of

the Erase Sector and Write without

Erase Commands

Many systems that can read and write

CompactFlash Memory Cards may not be aware of

the Erase Sector and Write without Erase

Commands. These systems would not issue these

commands but such a system might attempt a

normal write or a normal read to a pre-erased

sector.

A normal write to a pre-erased sector will function

correctly, but will be at the normal write speed

that is slower than a Write without Erase

command.

If a normal read is attempted to a Òpre-erasedÓ

sector, CompactFlash Memory Cards will detect it

is pre-erased and will return zero data and will

not report an error even though the data ECC is

not valid.

If an Òun-awareÓ host system over-writes a pre-

erased sector with a normal write and then the

CompactFlash Memory Card is moved to t h e

system that created the erased sectors, a situation

exists where a Write without Erase might be

CompactFlash Memory Card Product Manual

attempted to a ÒnormalÓ sector. If this occurs, the

CompactFlash Card will perform a normal write

which means it will first erase the sector and then

do a full write with all margin modes enabled.

This write will of course be slower than if the

sector were in fact pre-erased.

1.8.5.2 Limitations and Issues

The advantage of the Write without Erase and

Erase Sector commands is that they shift the bulk

of the erase and write time to the Erase Sector

command. The Erase Sector command performs

most of the normal tasks needed. To increase the

speed of the Write without Erase command, t h e

final margin verify done in a normal write

command is skipped for the first 16K writes.

When the cycle count (hot count) of a sector

exceeds 16K, the system controller automatically

reverts to a full write, including the final margin

verify. Since the erase is not required in this case,

a write to a pre-erased sector with a hot count of

over 16K is still faster than to a sector that has

not been pre-erased. The Translate Sector

command can be used to determine the Òhot countÓ

of a sector.

1.8.6 Automatic Sleep Mode

A unique feature of the SanDisk CompactFlash

Memory Card (and other SanDisk products) is

automatic entrance and exit from sleep mode.

Upon completion of a command, t h e

CompactFlash Card will enter the sleep mode to

conserve power if no further commands are

received within 5 msec. The host does not have to

take any action for this to occur. In most systems,

the CompactFlash Memory Card is in sleep mode

except when the host is accessing it, thus

conserving power. Note that the delay from

command completion to entering sleep mode can be

adjusted.

When the host is ready to access t he

CompactFlash Memory Card and it is in sleep

mode, any command issued to the CompactFlash

Card will cause it to exit sleep and respond. The

host does not have to follow the ATA protocol of

issuing a reset first. It may do this if desired, but

it is not needed. By not issuing the reset,

performance is improved through the reduction of

overhead but this must be done only for the

SanDisk products as other ATA products may not

support this feature.

1.8.7 Dynamic Adjustment of Performance

versus Power Consumption

A very unique and valuable feature of the

CompactFlash Memory Card is the ability of the

host to control the power the card consumes. This

allows CompactFlash Cards to work across a

broad cross section of platforms without

compromising performance. For instance, it can

operate in a platform that provides only 32 mA a t

3.3 volts average current (of course at reduced

performance) or in a platform that provides 90 mA

at full performance. Please see the Set Features

command for details.

1.8.8 Power Supply Requirements

This is a dual voltage product which means i t

will operate at a voltage range of 3.30 volts ± 5%

or 5.00 volts ± 10% (± 5% for industrial versions).

Per the PCMCIA specification section 2.1.1, the

host system must apply 0 volts in order to change a

voltage range. This same procedure of providing 0

volts to the card is required if the host system

applies an input voltage outside the desired

voltage by more than 20%. This means less than

4.0 volts for the 5.00 volt range and less than 2.70

volts for the 3.30 volt range.

CompactFlash Memory Card Product Manual

2.0 Product Specifications

For all the following specifications, values are

defined at ambient temperature and nominal

supply voltage unless otherwise stated.

2.1 System Environmental

Specifications

Standard Product

(SDCFB and SDCF2B) Industrial Product

(SDCFBI and SDCF2BI)

Temperature Operating:

Non-Operating: 0° C to 60° C

-25° C to 85° C -40° C to 85° C

-50° C to 100° C

Humidity Operating:

Non-Operating: 8% to 95%, non-condensing

8% to 95%, non-condensing 8% to 95%, non-condensing

8% to 95%, non-condensing

Acoustic Noise: 0 d B 0 d B

Vibration Operating:

Non-Operating: 15 G peak to peak max.

15 G peak to peak max. 15 G peak to peak max.

15 G peak to peak max.

Shock Operating:

Non-Operating: 2,000 G max.

2,000 G max. 2,000 G max.

2,000 G max.

Altitude (relative to sea level) Operating:

Non-Operating: 80,000 feet max.

80,000 feet max. 80,000 feet max.

80,000 feet max.

2.2 System Power Requirements

Standard Product

(SDCFB and SDCF2B) Industrial Product

(SDCFBI and SDCF2BI)

DC Input Voltage (VCC)

100 mV max. ripple (p-p) 3.3V ±5% 5V ± 1 0 % 3.3V ±5% 5V ±5%

+5 V Currents

(maximum Average value)

See Notes 1 to 3.

Sleep:

Reading:

Writing:

Read/Write Peak

200 µA

(Slow - Fast)

32 mA - 45 mA

32 mA - 60 mA

150 mA/50µs

500 µA

(Slow - Fast)

46 mA - 75 mA

46 mA - 90 mA

150 mA/50µs

200 µA

(Slow - Fast)

32 mA - 45 mA

32 mA - 60 mA

150 mA/50µs

500 µA

(Slow - Fast)

46 mA - 75 mA

46 mA - 90 mA

150 mA/50µs

Note 1. All values quoted are typical at ambient temperature and nominal supply voltage unless otherwise stated.

Note 2. Sleep mode currently is specified under the condition that all card inputs are statis CMOS levels and in a

“Not Busy“ operating state.

Note 3. The currents specified show the bounds of programmability of the product.

CompactFlash Memory Card Product Manual

2.3 System Performance

All performance timings assume t h e

CompactFlash Memory Card Series controller is in

the default (i.e., fastest) mode.

Start Up Times Sleep to write:

Sleep to read:

Reset to ready:

2.5 msec maximum

2.0 msec maximum

50 msec typical

400 msec maximum

Active to Sleep Delay Programmable

Data Transfer Rate

To/From Flash 4.0 MBytes/sec burst

Data Transfer Rate

To/From Host 6.0 MBytes/sec burst

Controller Overhead Command to DRQ 1.25 msec maximum

Note: The Sleep to Write and Sleep to Read times are the times it takes the CompactFlash Memory Card to exit

sleep mode when any command is issued by the host to when the card is reading or writing. CompactFlash

Memory Cards do not require a reset to exit sleep mode. See section 1.8.6.

2.4 System Reliability and

Maintenance

MTBF (@ 25°C) >1,000,000 hours

Preventive Maintenance None

Data Reliability <1 non-recoverable error in 1014 bits read

Endurance SDCFB-XX 300,000 erase / program cycles per logical sector

guaranteed

Endurance SDCFBI-XX Industrial Product 100,000 erase / program cycles per logical sector

guaranteed

CompactFlash Memory Card Product Manual

2.5 Physical Specifications

Refer to the following table and to Figures 2-1 and

2-2 for CompactFlash Memory Card physical

specifications and dimensions.

CompactFlash CompactFlash Type II

Weight: 11.4 g (.40 oz) typical

14.2 g (.50 oz) maximum 13.5 g (.47 oz) typical

Length: 36.40 ± 0.15 mm (1.433 ±.006 in) 36.4 ± 0.15 mm (1.433 ± .006 in.)

Width: 42.80 ± 0.10 mm (1.685 ±.004 in) 42.80 ± 0.10 mm (1.685 ± .004 in.)

Thickness: 3.3 mm ± 0.10 mm (.130 ±.004 in)

(Excluding Lip) 5.0 mm maximum (.1968 in.

maximum)

1.685±.004

[42.80]

1.433±.006

[36.40]

.039±.002

[1.00]

.063±.002

[1.60]

.040±.003

[1.00] .040±.003

[1.00]

.130±.004

[3.30]

2X 1.015±.003

[25.78]

2X .472±.004

[12.00]

2X .118±.003

[3.00]

TOP

1.640±.005 [41.66]

.096±.003

[2.4]

.030±.003

[0.8]

.025±.003

[0.6]

4X R.020±.004

[0.5]

Figure 2-1 CompactFlash Memory Card Dimensions

CompactFlash Memory Card Product Manual

1.01mm ± .07

(.039 in. ± .003)

10.00mm

min.

BOTTOM

Centered Finger Grip

0.5mm ± .076

AAA

Section C-C

(Finger Grip)

0.6mm ± .076

Detail A

3.3mm

1mm

min.

1.65mm

Detail B

1mm

min.

3.3mm

1.65mm

(2 X) 6.16mm

.99mm ±.05

(.039 in. ± .002)

1.60mm ± .05

(.063 in. ± .002)

1.01mm ± .007

(.039 in. ± .003)

26 50

1Top

Bottom

(1.685 in. ±.004)

(1.433 in. ± .006)

36.40mm ± .15

2X 25.78mm ± .07

(2X 1.015 in. ± .003)

TOP

4X R 0.5mm ± .1

(4X .020 in. ± .004)

42.80mm ± .101

(See Note 1)

8.5mm max.

Note 1: Area between dotted line and connector face

may have reduced height. Height in this region is

5.0mm maximum and 3.2mm minimum.

3.3mm ± .10

(.130 in. ± .004)

5mm

max.

2X 26.97mm ± .07

4.5mm ± .07

Ground Contact Area (optional)

Figure 2-2 CompactFlash Type II Memory Card Dimensions

CompactFlash Memory Card Product Manual

Refer to the following table and to Figure 2-3 for CompactFlash Memory Card PC Card Adapter

physical specifications and dimensions.

CF Adapter CF Type II Adapter

Weight: 33 g (1.16 oz) typical 26.6 g (.93 oz) maximum

Length: 85.6 ± 0.20 mm (3.370 ±.008 in) 85.6 ± 0.20 mm (3.370 ±.008 in)

Width: 54.0 ± 0.10 mm (2.126 ±.004 in) 54.0 ± 0.10 mm (2.126 ±.004 in)

Thickness: 5.0 mm Max (0.1968 in) 5.0 mm Max (0.1968 in)

0.130

[3.3]

0.196

[5.0]

1.196

[30.4]

3.370

[85.6]

2.126

[54.0]

1.694

[43.03] 0.138

[3.5]

.866

[22.0]

1.536

[39.03]

.472

[12.0] .078

[2.0]

Figure 2-3 CompactFlash Memory Card Adapter Dimensions

CompactFlash Memory Card Product Manual

Figure 2-4 CompactFlash Type II Memory Card Adapter Dimensions

CompactFlash Memory Card Product Manual

2.6 Capacity Specifications

The table below shows the specific capacity for

the various models and the default number of

heads, sectors/track and cylinders.

Model Number Capacity

(formatted) Sectors/Card

(Max LBA+1) No. of

Heads No. of

Sectors/

Track

No. of

Cylinders

SDCFB-4 4,030,464 bytes 7,872 2 32 123

SDCFB-8 8,028,160 bytes 15,680 2 32 245

SDCFB-10 10,485,760 bytes 20,480 2 32 320

SDCFB-15 15,007,744 bytes 29,312 2 32 458

SDCFB-16* 16,056,320 bytes 31,360 2 32 490

SDCFB-20 20,054,016 bytes 39,168 2 32 612

SDCFB-30 30,081,024 bytes 58,752 6 32 306

SDCFB-32* 32,112,640 bytes 62,720 4 32 490

SDCFB-40 40,108,032 bytes 78,336 4 32 612

SDCFB-48 48,103,424 bytes 93,952 4 32 734

SDCFB-64* 64,225,280 bytes 125,440 8 32 490

SDCFB-80* 80,216,064 bytes 156,672 8 32 612

SDCFB-96* 96,206,848 bytes 187,904 8 32 734

SDCF2B-160* 160,432,128 bytes 313,344 12 32 816

*Preliminary information based on 128 Mbit technology.

CompactFlash Memory Card Product Manual

3.0 Installation

3.1 Mounting

The CompactFlash Memory Card may be

installed in any platform with a 50 position

Surface Mount Interface Header (3M P/N N7E50-

7516VY-20) and Ejector (3M P/N D7E50-7316-02),

or equivalent, properly installed. Refer to the

appendix at the end of this manual for additional

technical information.

In addition, the CompactFlash Memory Card may

be used in any standard PCMCIA Type II (5 mm) or

Type III (10.5 mm) socket as supplied by an OEM

using a Type II PCMCIA adapter.

The CompactFlash Type II Memory Card fits into

a CF Type II slot.

CompactFlash Memory Card Product Manual

4.0 CompactFlash Memory Card Interface

Description

4.1 Physical Description

The host is connected to the CompactFlash

Memory Card using a standard 50 pin connector

consisting of two rows of 25 female contacts each on

50 mil (1.27 mm) centers.

4.1.1 Pin Assignments and Pin Type

The signal/pin assignments are listed in Table 4-1.

Low active signals have a Ò-Ó prefix. Pin types are

Input, Output or Input/Output. Table 4-2 defines

the DC characteristics for all input and output

type structures.

4.2 Electrical Description

The CompactFlash Memory Card Series is

optimized for operation with hosts which support

the PCMCIA I/O interface standard conforming to

the PC Card ATA specification. However, the

CompactFlash Card may also be configured to

operate in systems that support only the memory

interface standard. The configuration of the

CompactFlash Card will be controlled using t h e

standard PCMCIA configuration registers starting

at address 200h in the Attribute Memory space of

the CompactFlash Memory Card.

Table 4-2 describes the I/O signals. Signals whose

source is the host are designated as inputs while

signals that the CompactFlash Memory Card

sources are outputs. The CompactFlash Card logic

levels conform to those specified in the PCMCIA

Release 2.1 specification. Refer to section 4.3 for

definitions of Input and Output type.

CompactFlash Memory Card Product Manual

Table 4-1 Pin Assignments and Pin Type

PC Card Memory Mode PC Card I/O Mode True IDE Mode

Num Signal

Name Pin

Type In, Out4

Type Pin

Num Signal

Name Pin

Type In, Out4

Type Pin

Num Signal

Name Pin

Type In, Out4

Type

1 GND Ground 1 GND Ground 1 GND Ground

2 D03 I/O I1Z,OZ3 2 D03 I/O I1Z,OZ3 2 D03 I/O I1Z,OZ3

3 D04 I/O I1Z,OZ3 3 D04 I/O I1Z,OZ3 3 D04 I/O I1Z,OZ3

4 D05 I/O I1Z,OZ3 4 D05 I/O I1Z,OZ3 4 D05 I/O I1Z,OZ3

5 D06 I/O I1Z,OZ3 5 D06 I/O I1Z,OZ3 5 D06 I/O I1Z,OZ3

6 D07 I/O I1Z,OZ3 6 D07 I/O I1Z,OZ3 6 D07 I/O I1Z,OZ3

7 -CE1 I I3U 7 -CE1 I I3U 7 -CS0 I I3Z

8 A10 I I1Z 8 A10 I I1Z 8 A102I I1Z

9 -OE I I3U 9 -OE I I3U 9 -ATA SEL I I3U

10 A09 I I1Z 10 A09 I I1Z 10 A092I I1Z

11 A08 I I1Z 11 A08 I I1Z 11 A082I I1Z

12 A07 I I1Z 12 A07 I I1Z 12 A072I I1Z

13 VCC Power 13 VCC Power 13 VCC Power

14 A06 I I1Z 14 A06 I I1Z 14 A062I I1Z

15 A05 I I1Z 15 A05 I I1Z 15 A052I I1Z

16 A04 I I1Z 16 A04 I I1Z 16 A042I I1Z

17 A03 I I1Z 17 A03 I I1Z 17 A032I I1Z

18 A02 I I1Z 18 A02 I I1Z 18 A02 I I1Z

19 A01 I I1Z 19 A01 I I1Z 19 A01 I I1Z

20 A00 I I1Z 20 A00 I I1Z 20 A00 I I1Z

21 D00 I/O I1Z,OZ3 21 D00 I/O I1Z,OZ3 21 D00 I/O I1Z,OZ3

22 D01 I/O I1Z,OZ3 22 D01 I/O I1Z,OZ3 22 D01 I/O I1Z,OZ3

23 D02 I/O I1Z,OZ3 23 D02 I/O I1Z,OZ3 23 D02 I/O I1Z,OZ3

24 WP O OT3 24 -IOIS16 O OT3 24 -IOCS16 O ON3

25 -CD2 O Ground 25 -CD2 O Ground 25 -CD2 O Ground

26 -CD1 O Ground 26 -CD1 O Ground 26 -CD1 O Ground

27 D111I/O I1Z,OZ3 27 D111I/O I1Z,OZ3 27 D111I/O I1Z,OZ3

28 D121I/O I1Z,OZ3 28 D121I/O I1Z,OZ3 28 D121I/O I1Z,OZ3

29 D131I/O I1Z,OZ3 29 D131I/O I1Z,OZ3 29 D131I/O I1Z,OZ3

30 D141I/O I1Z,OZ3 30 D141I/O I1Z,OZ3 30 D141I/O I1Z,OZ3

31 D151I/O I1Z,OZ3 31 D151I/O I1Z,OZ3 31 D151I/O I1Z,OZ3

32 -CE21I I3U 32 -CE21I I3U 32 -CS11I I3Z

33 -VS1 O Ground 33 -VS1 O Ground 33 -VS1 O Ground

34 -IORD I I3U 34 -IORD I I3U 34 -IORD I I3Z

CompactFlash Memory Card Product Manual

Table 4-1 Pin Assignments and Pin Type (continued)

PC Card Memory Mode PC Card I/O Mode True IDE Mode

Num Signal

Name Pin

Type In, Out4

Type Pin

Num Signal

Name Pin

Type In, Out4

Type Pin

Num Signal

Name Pin

Type In, Out4

Type

35 -IOWR I I3U 35 -IOWR I I3U 35 -IOWR I I3Z

36 -WE I I3U 36 -WE I I3U 36 -WE3I I3U

37 RDY/BSY O OT1 37 IREQ O OT1 37 INTRQ O OZ1

38 VCC Power 38 VCC Power 38 VCC Power

39 -CSEL I I2Z 39 -CSEL I I2Z 39 -CSEL I I2U

40 -VS2 O OPEN 40 -VS2 O OPEN 40 -VS2 O OPEN

41 RESET I I2Z 41 RESET I I2Z 41 -RESET I I2Z

42 -WAIT O OT1 42 -WAIT O OT1 42 IORDY O ON1

43 -INPACK O OT1 43 -INPACK O OT1 43 -INPACK O OZ1

44 -REG I I3U 44 -REG I I3U 44 -REG3I I3U

45 BVD2 I/O I1U,OT1 45 -SPKR I/O I1U,OT1 45 -DASP I/O I1U,ON1

46 BVD1 I/O I1U,OT1 46 -STSCHG I/O I1U,OT1 46 -PDIAG I/O I1U,ON1

47 D081I/O I1Z,OZ3 47 D081I/O I1Z,OZ3 47 D081I/O I1Z,OZ3

48 D091I/O I1Z,OZ3 48 D091I/O I1Z,OZ3 48 D091I/O I1Z,OZ3

49 D101I/O I1Z,OZ3 49 D101I/O I1Z,OZ3 49 D101I/O I1Z,OZ3

50 GND Ground 50 GND Ground 50 GND Ground

Note: 1. These signals are required only for 16 bit access and not required when installed in 8-bit systems.

For lowest power dissipation, leave these signals open.

2. Should be grounded by the host.

3. Should be tied to VCC by the host.

4. Please refer to section 4.3 for definitions of In, Out type.

CompactFlash Memory Card Product Manual

Table 4-2 Signal Description

Signal Name Dir. Pin Description

A10 - A0

(PC Card Memory Mode) I 8, 10, 11, 12,

14, 15, 16, 17,

18, 19, 20

These address lines along with the -REG signal are used to

select the following: The I/O port address registers within the

CompactFlash Card, the memory mapped port address registers

within the card, a byte in the card's information structure and its

configuration control and status registers.

A10 - A0

(PC Card I/O Mode) This signal is the same as the PC Card Memory Mode signal.

A2 - A0

(True IDE Mode)

A10 - A3

(True IDE Mode)

I 18, 19, 20 In True IDE Mode only A[2:0] are used to select the one of eight

registers in the Task File.

In True IDE Mode, these remaining address lines should be

grounded by the host.

BVD1

(PC Card Memory Mode) I/O 46 This signal is asserted high as the BVD1 signal since a battery

is not used with this product.

-STSCHG

(PC Card I/O Mode)

Status Changed

This signal is asserted low to alert the host to changes in the

RDY/-BSY and Write Protect states, while the I/O interface is

configured. Its use is controlled by the Card Config and Status

-PDIAG

(True IDE Mode) In the True IDE Mode, this input / output is the Pass Diagnostic

signal in the Master / Slave handshake protocol.

BVD2

(PC Card Memory Mode) I/O 45 This output line is always driven to a high state in Memory Mode

since a battery is not required for this product.

-SPKR

(PC Card I/O Mode) This output line is always driven to a high state in I/O Mode

since this product does not support the audio function.

-DASP

(True IDE Mode) In the True IDE Mode, this input/output is the Disk Active/Slave

Present signal in the Master/Slave handshake protocol.

-CD1, -CD2

(PC Card Memory Mode) O 26, 25 These Card Detect pins are connected to ground on the

CompactFlash Card. They are used by the host to determine if

the card is fully inserted into its socket.

-CD1, -CD2

(PC Card I/O Mode) This signal is the same for all modes.

-CD1, -CD2

(True IDE Mode) This signal is the same for all modes.

-CE1, -CE2

(PC Card Memory Mode)

Card Enable

I 7, 32 These input signals are used both to select the card and to

indicate to the card whether a byte or a word operation is being

performed. -CE2 always accesses the odd byte of the word.

-CE1 accesses the even byte or the Odd byte of the word

depending on A0 and -CE2. A multi-plexing scheme based on

A0, -CE1, -CE2 allows 8 bit hosts to access all data on D0-D7.

See Tables 4-11, 4-12, 4-15, and 4-16.

-CE1, -CE2

(PC Card I/O Mode)

Card Enable

This signal is the same as the PC Card Memory Mode signal.

-CS0, -CS1

(True IDE Mode) In the True IDE Mode -CS0 is the chip select for the task file

registers while -CS1 is used to select the Alternate Status

CompactFlash Memory Card Product Manual

Table 4-2 Signal Description (continued)

Signal Name Dir. Pin Description

-CSEL

(PC Card Memory Mode) I 39 This signal is not used for this mode.

-CSEL

(PC Card I/O Mode) This signal is not used for this mode.

-CSEL

(True IDE Mode) This internally pulled up signal is used to configure this device

as a Master or a Slave when configured in the True IDE Mode.

When this pin is grounded, this device is configured as a

Master. When the pin is open, this device is configured as a

Slave.

D15 - D00

(PC Card Memory Mode) I/ O 31, 30, 29, 28,

27, 49, 48, 47,

6, 5, 4, 3, 2,

23, 22, 21

These lines carry the Data, Commands and Status information

between the host and the controller. D00 is the LSB of the Even

Byte of the Word. D08 is the LSB of the Odd Byte of the Word.

D15 - D00

(PC Card I/O Mode) This signal is the same as the PC Card Memory Mode signal.

D15 - D00

(True IDE Mode) In True IDE Mode, all Task File operations occur in byte mode on

the low order bus D00-D07 while all data transfers are 16 bit

using D00-D15.

GND

(PC Card Memory Mode) -- 1, 50 Ground.

GND

(PC Card I/O Mode) This signal is the same for all modes.

GND

(True IDE Mode) This signal is the same for all modes.

-INPACK

( PC Card Memory Mode) O 43 This signal is not used in this mode.

-INPACK

( PC Card I/O Mode)

Input Acknowledge

The Input Acknowledge signal is asserted by the CompactFlash

Card when the card is selected and responding to an I/O read

cycle at the address that is on the address bus. This signal is

used by the host to control the enable of any input data buffers

between the card and the CPU.

-INPACK

(True IDE Mode) In True IDE Mode this output signal is not used and should not

be connected at the host.

-IORD

(PC Card Memory Mode) I 34 This signal is not used in this mode.

-IORD

(PC Card I/O Mode) This is an I/O Read strobe generated by the host. This signal

gates I/O data onto the bus from the CompactFlash Card when

the card is configured to use the I/O interface.

-IORD

(True IDE Mode) In True IDE Mode, this signal has the same function as in PC

Card I/O Mode.

CompactFlash Memory Card Product Manual

Table 4-2 Signal Description (continued)

Signal Name Dir. Pin Description

-IOWR

(PC Card Memory Mode) I 35 This signal is not used in this mode.

-IOWR

(PC Card I/O Mode) The I/O Write strobe pulse is used to clock I/O data on the Card

Data bus into the CompactFlash controller registers when the

card is configured to use the I/O interface.

The clocking will occur on the negative to positive edge of the

signal (trailing edge).

-IOWR

(True IDE Mode) In True IDE Mode, this signal has the same function as in PC

Card I/O Mode.

-OE

(PC Card Memory Mode) I 9 This is an Output Enable strobe generated by the host interface.

It is used to read data from the CompactFlash Card in Memory

Mode and to read the CIS and configuration registers.

-OE

(PC Card I/O Mode) In PC Card I/O Mode, this signal is used to read the CIS and

configuration registers.

-ATA SEL

(True IDE Mode) To enable True IDE Mode this input should be grounded by the

host.

RDY/-BSY

(PC Card Memory Mode) O 37 In Memory Mode this signal is set high when the CompactFlash

Card is ready to accept a new data transfer operation and held

low when the card is busy. The Host memory card socket must

provide a pull-up resistor.

At power up and at Reset, the RDY/-BSY signal is held low

(busy) until the CompactFlash Card has completed its power up

or reset function. No access of any type should be made to the

CompactFlash Card during this time. The RDY/-BSY signal is

held high (disabled from being busy) whenever the following

condition is true: The CompactFlash Card has been powered up

with +RESET continuously disconnected or asserted.

-IREQ

( PC Card I/O Mode) I/O Operation - After the CompactFlash Card has been

configured for I/O operation, this signal is used as -Interrupt

Request. This line is strobed low to generate a pulse mode

interrupt or held low for a level mode interrupt.

INTRQ

(True IDE Mode) In True IDE Mode signal is the active high Interrupt Request to

the host.

-REG

(PC Card Memory Mode)

Attribute Memory Select

I 44 This signal is used during Memory Cycles to distinguish between

Common Memory and Register (Attribute) Memory accesses.

High for Common Memory, Low for Attribute Memory.

-REG

(PC Card I/O Mode) The signal must also be active (low) during I/O Cycles when the

I/O address is on the Bus.

-REG

(True IDE Mode) In True IDE Mode this input signal is not used and should be

connected to VCC by the host.

CompactFlash Memory Card Product Manual

Table 4-2 Signal Description (continued)

Signal Name Dir. Pin Description

RESET

(PC Card Memory Mode) I 41 When the pin is high, this signal resets the CompactFlash Card.

The card is Reset only at power up if this pin is left high or open

from power-up. The card is also reset when the Soft Reset bit in

the Card Configuration Option Register is set.

RESET

(PC Card I/O Mode) This signal is the same as the PC Card Memory Mode signal.

-RESET

(True IDE Mode) In the True IDE Mode this input pin is the active low hardware

reset from the host.

VCC

(PC Card Memory Mode) -- 13, 38 +5 V, +3.3 V power.

VCC

(PC Card I/O Mode) This signal is the same for all modes.

VCC

(True IDE Mode) This signal is the same for all modes.

-VS1

-VS2

(PC Card Memory Mode)

O33

40 Voltage Sense Signals. -VS1 is grounded so that the

CompactFlash Card CIS can be read at 3.3 volts and -VS2 is

open and reserved by PCMCIA for a secondary voltage.

-VS1

-VS2

(PC Card I/O Mode)

This signal is the same for all modes.

-VS1

-VS2

(True IDE Mode)

This signal is the same for all modes.

-WAIT

(PC Card Memory Mode) O 42 The -WAIT signal is driven low by the CompactFlash Card to

signal the host to delay completion of a memory or I/O cycle that

is in progress.

-WAIT

(PC Card I/O Mode) This signal is the same as the PC Card Memory Mode signal.

IORDY

(True IDE Mode) In True IDE Mode this output signal may be used as IORDY.

-WE

(PC Card Memory Mode) I 36 This is a signal driven by the host and used for strobing memory

write data to the registers of the CompactFlash Card when the

card is configured in the memory interface mode. It is also used

for writing the configuration registers.

-WE

(PC Card I/O Mode) In PC Card I/O Mode, this signal is used for writing the

configuration registers.

-WE

(True IDE Mode) In True IDE Mode this input signal is not used and should be

connected to VCC by the host.

(PC Card Memory Mode)

Write Protect

O 24 Memory Mode - The CompactFlash Card does not have a write

protect switch. This signal is held low after the completion of the

reset initialization sequence.

-IOIS16

( PC Card I/O Mode) I/O Operation - When the CompactFlash Card is configured for

I/O Operation, Pin 24 is used for the -I/O Selected is 16 Bit Port

(-IOIS16) function. A Low signal indicates that a 16 bit or odd

byte only operation can be performed at the addressed port.

-IOCS16

(True IDE Mode) In True IDE Mode this output signal is asserted low when this

device is expecting a word data transfer cycle.

CompactFlash Memory Card Product Manual

4.3 Electrical Specification

The following table defines all D.C.

Characteristics for the CompactFlash Memory

Card Series.

Unless otherwise stated, conditions are:

SDCFB-XX SDCFBI-XX

Vcc = 5V ±10% Vcc = 5V ± 5%

Vcc = 3.3V ± 5% Vcc = 3.3V ± 5%

Ta = 0°C to 60°C Ta = -40°C to 85°C

Absolute Maximum conditions are:

Vcc = -0.3V min. to 7.0V max.

V* = -0.5V min. to Vcc + 0.5V max.

* Voltage on any pin except Vcc with respect

to GND.

4.3.1 Input Leakage Current

Note: In the table below, x refers to the characteristics described in section 4.3.2. For example, I1U indicates a

pull up resistor with a type 1 input characteristic.

Type Parameter Symbol Conditions MIN TYP MAX Units

IxZ Input Leakage Current IL Vih = Vcc / Vil = Gnd -1 1 µA

IxU Pull Up Resistor RPU1 Vcc = 5.0V 50k 500k Ohm

IxD Pull Down Resistor RPD1 Vcc = 5.0V 50k 500k Ohm

Note: The minimum pullup resistor leakage current meets the PCMCIA specification of 10k ohms but is

intentionally higher in the CompactFlash Memory Card Series product to reduce power use.

4.3.2 Input Characteristics

Type Parameter Symbol MIN TYP MAX MIN TYP MAX Units

VCC = 3.3 V VCC = 5.0 V

1 Input Voltage

CMOS Vih

Vil 2.4 0.6 2.4 0.8 Volts

2 Input Voltage

CMOS Vih

Vil 1.5 0.6 2.0 0.8 Volts

3 Input Voltage

CMOS

Schmitt Trigger

Vth

Vtl

1.8

1.0

2.8

2.0 Volts

CompactFlash Memory Card Product Manual

4.3.3 Output Drive Type

Note: In the table below, x refers to the characteristics described in section 4.3.4. For example, OT3 refers to

Totempole output with a type 3 output drive characteristic.

Type Output Type Valid Conditions

OTx Totempole Ioh & Iol

OZx Tri-State N-P Channel Ioh & Iol

OPx P-Channel Only Ioh Only

ONx N-Channel Only Iol Only

4.3.4 Output Drive Characteristics

Type Parameter Symbol Conditions MIN TYP MAX Units

1 Output Voltage Voh

Vol

Ioh = -4 mA

Iol = 4 mA

Vcc

-0.8V Gnd

+0.4V

Volts

2 Output Voltage Voh

Vol

Ioh = -8 mA

Iol = 8 mA

Vcc

-0.8V Gnd

+0.4V

Volts

3 Output Voltage Voh

Vol

Ioh = -8 mA

Iol = 8 mA

Vcc

-0.8V Gnd

+0.4V

Volts

X Tri-State

Leakage Current Ioz Vol = Gnd

Voh = Vcc -10 10 µA

CompactFlash Memory Card Product Manual

4.3.5 Interface/Bus Timing

There are two types of bus cycles and timing

sequences that occur in the PCMCIA type

interface, a direct mapped I/O transfer and a

memory access. The two timing sequences are

explained in detail in the PCMCIA PC Card

Standard Release 2.1. The CompactFlash Memory

Card conforms to the timing in that reference

document.

4.3.6 Attribute Memory Read Timing

Specification

The Attribute Memory access time is defined as

300 ns. Detailed timing specifications are shown

in Table 4-3.

Table 4-3 Attribute Memory Read Timing

Speed Version 300 ns

Item Symbol IEEE Symbol Min ns. Max ns.

Read Cycle Time tc(R) tAVAV 300

Address Access Time ta(A) tAVQV 300

Card Enable Access Time ta(CE) tELQV 300

Output Enable Access Time ta(OE) tGLQV 150

Output Disable Time from CE tdis(CE) tEHQZ 100

Output Disable Time from OE tdis(OE) tGHQZ 100

Address Setup Time tsu (A) tAVWL 30

Output Enable Time from CE ten(CE) tELQNZ 5

Output Enable Time from OE ten(OE) tGLQNZ 5

Data Valid from Address Change tv(A) tAXQX 0

-CE

-OE

Dout

tc(R)

ta(A)

ta(CE)

ta(OE)

ten(OE)

ten(CE)

tv(A)

tdis(CE)

tdis(OE)

-REG

tsu(A)

Figure 4-1 Attribute Memory Read Timing Diagram

Notes: All times are in nanoseconds. Dout signifies data provided by the CompactFlash Memory Card to the

system. The -CE signal or both the -OE signal and the -WE signal must be de-asserted between consecutive

cycle operations.

CompactFlash Memory Card Product Manual

4.3.7 Attribute Memory Write Timing

Specification

The Card Configuration write access time is

defined as 250 ns. Detailed timing specifications

are shown in Table 4-4.

Note: SanDisk does not allow writing from the Host to

CIS Memory. Only writes to the Configuration

Table 4-4 Attribute Memory Write Timing

Speed Version 250 ns

Item Symbol IEEE Symbol Min ns Max ns

Write Cycle Time tc(W) tAVAV 250

Write Pulse Width tw(WE) tWLWH 150

Address Setup Time tsu(A) tAVWL 30

Write Recovery Time trec(WE) tWMAX 30

Data Setup Time for WE tsu(D-WEH) tDVWH 80

Data Hold Time th(D) tWMDX 30

-WE

-CE

Din

tc(W)

tsu(D-WEH)

tsu(A)

th(D)

trec(WE)

tw(WE)

Data In Valid

-OE

-Reg

Figure 4-2 Attribute Memory Write Timing Diagram

Notes: All times are in nanoseconds.

Din signifies data provided by the system to the CompactFlash Memory Card.

CompactFlash Memory Card Product Manual

4.3.8 Common Memory Read Timing

Specification

Table 4-5 Common Memory Read Timing

Item Symbol IEEE Symbol Min ns. Max ns.

Output Enable Access Time ta(OE) tGLQV 125

Output Disable Time from OE tdis(OE) tGHQZ 100

Address Setup Time tsu(A) tAVGL 30

Address Hold Time th(A) tGHAX 20

CE Setup before OE tsu(CE) tELGL 0

CE Hold following OE th(CE) tGHEH 20

Wait Delay Falling from OE tv(WT-OE) tGLWTV 35

Data Setup for Wait Release tv(WT) tQVWTH 0

Wait Width Time (Default Speed) tw(WT) tWTLWTH 350

-REG

Dout

tsu(A)

-CE

-OE

tsu(CE)

-WAIT tdis(OE)

tw(WT)

tv(WT-OE) tv(WT)

ta(OE)

th(A)

th(CE)

Figure 4-3 Common Memory Read Timing Diagram

Notes: The maximum load on -WAIT is 1 LSTTL with 50pF total load. All times are in nanoseconds.

Dout signifies data provided by the CompactFlash Memory Card to the system.

The -WAIT signal may be ignored if the -OE cycle to cycle time is greater than the Wait Width time.

The Max Wait Width time (in the slowest mode) can be determined from the Card Information Structure.

CompactFlash Memory Card Product Manual

4.3.9 Common Memory Write Timing

Specification

Table 4-6 Common Memory Write Timing

Item Symbol IEEE Symbol Min ns. Max ns.

Data Setup before WE tsu(D-WEH) tDVWH 80

Data Hold following WE th(D) tlWMDX 30

WE Pulse Width tw(WE) tWLWH 150

Address Setup Time tsu(A) tAVWL 30

CE Setup before WE tsu(CE) tELWL 0

Write Recovery Time trec(WE) tWMAX 30

CE Hold following WE th(CE) tGHEH 20

Wait Delay Falling from WE tv(WT-WE) tWLWTV 35

WE High from Wait Release tv(WT) tWTHWH 0

Wait Width Time (Default Speed) tw (WT) tWTLWTH 350

-REG

Din

tsu(A)

-CE

-WE

tsu(CE)

-WAIT

th(D)

tw(WT)

tv(WT-WE) tsu(D-WEH)

tw(WE)

th(CE)

Din Valid

tv(WT)

trec(WE)

Figure 4-4 Common Memory Write Timing Diagram

Notes: The maximum load on -WAIT is 1 LSTTL with 50pF total load. All times are in nanoseconds.

Din signifies data provided by the system to the CompactFlash Memory Card.

The -WAIT signal may be ignored if the -WE cycle to cycle time is greater than the Wait Width time.

The Max Wait Width time (in the slowest mode) can be determined from the Card Information Structure.

CompactFlash Memory Card Product Manual

4.3.10 I/O Input (Read) Timing Specification

Table 4-7 I/O Read Timing

Item Symbol IEEE Symbol Min ns. Max ns.

Data Delay after IORD td(IORD) tlGLQV 100

Data Hold following IORD th(IORD) tlGHQX 0

IORD Width Time tw(IORD) tlGLIGH 165

Address Setup before IORD tsuA(IORD) tAVIGL 70

Address Hold following IORD thA(IORD) tlGHAX 20

CE Setup before IORD tsuCE(IORD) tELIGL 5

CE Hold following IORD thCE(IORD) tlGHEH 20

REG Setup before IORD tsuREG(IORD) tRGLIGL 5

REG Hold following IORD thREG(IORD) tlGHRGH 0

INPACK Delay Falling from IORD tdfINPACK(IORD) tlGLIAL 0 45

INPACK Delay Rising from IORD tdrINPACK(IORD) tlGHIAH 45

IOIS16 Delay Falling from Address tdfIOIS16(ADR) tAVISL 35

IOIS16 Delay Rising from Address tdrIOIS16(ADR) tAVISH 35

Wait Delay Falling from IORD tdWT(IORD) tlGLWTL 35

Data Delay from Wait Rising td(WT) tWTHQV 0

Wait Width Time (Default Speed) tw(WT) tWTLWTH 350

-REG

-IOIS16

Dout

tsuA(IORD)

-CE

tsuREG(IORD)

-IORD

-INPACK

tsuCE(IORD)

-WAIT

th(IORD)

twWT

tdWT(IORD) td(WT)

td(IORD)

thA(IORD)

thREG(IORD)

thCE(IORD)

tdrINPACK(IORD)

tdrIOIS16(ADR)

tdfINPACK(IORD)

tdfIO IS16(ADR)

tw(IORD)

Figure 4-5 I/O Read Timing Diagram

Notes: The maximum load on -WAIT, -INPACK and -IOIS16 is 1 LSTTL with 50pF total load. All times are in

nanoseconds.

Minimum time from -WAIT high to -IORD high is 0 nsec, but minimum -IORD width must still be met.

Dout signifies data provided by the CompactFlash Memory Card to the system.

CompactFlash Memory Card Product Manual

4.3.11 I/O Output (Write) Timing Specification

Table 4-8 I/O Write Timing

Item Symbol IEEE Symbol Min ns. Max ns.

Data Setup before IOWR tsu(IOWR) tDVIWH 60

Data Hold following IOWR th(IOWR) tlWHDX 30

IOWR Width Time twIOWR tlWLIWH 165

Address Setup before IOWR tsuA(IOWR) tAVIWL 70

Address Hold following IOWR thA(IOWR) tlWHAX 20

CE Setup before IOWR tsuCE(IOWR) tELIWL 5

CE Hold following IOWR thCE(IOWR) tlWHEH 20

REG Setup before IOWR tsuREG(IOWR) tRGLIWL 5

REG Hold following IOWR thREG(IOWR) tlWHRGH 0

IOIS16 Delay Falling from Address tdfIOIS16(ADR) tAVISL 35

IOIS16 Delay Rising from Address tdrIOIS16(ADR) tAVISH 35

Wait Delay Falling from IOWR tdWT(IOWR) tlWLWTL 35

IOWR high from Wait high tdrIOWR(WT) tWTJIWH 0

Wait Width Time (Default Speed)

(Set Feature Speed <68 mA.) tw(WT) tWTLWTH 350

700

-REG

-IOIS16

Din

tsuA(IOWR)

-CE

tsuREG(IOWR)

-IOWR

tsuCE(IOWR)

-WAIT

th(IOWR)

tw(WT)

tdWT(IOWR)

thA(IOWR)

thREG(IOWR)

thCE(IOWR)

tdrIOIS16(ADR)

tdfIO IS16(ADR) tsu(IOWR)

tw(IOWR)

tdrIOWR(WT)

Din Valid

Figure 4-6 I/O Write Timing Diagram

Notes: The maximum load on -WAIT, -INPACK, and -IOIS16 is 1 LSTTL with 50pF total load. All times are in

nanoseconds.

Minimum time from -WAIT high to -IOWR high is 0 nsec, but minimum -IOWR width must still be met.

Din signifies data provided by the system to the CompactFlash Memory Card.

CompactFlash Memory Card Product Manual

4.3.12 True IDE Mode I/O Input (Read) Timing

Specification

Table 4-9 True IDE Mode I/O Read Timing

Item Symbol IEEE Symbol Min ns. Max ns.

Data Delay after IORD td(IORD) tlGLQV 100

Data Hold following IORD th(IORD) tlGHQX 0

IORD Width Time tw(IORD) tlGLIGH 165

Address Setup before IORD tsuA(IORD) tAVIGL 70

Address Hold following IORD thA(IORD) tlGHAX 20

CE Setup before IORD tsuCE(IORD) tELIGL 5

CE Hold following IORD thCE(IORD) tlGHEH 20

IOIS16 Delay Falling from Address tdfIOIS16(ADR) tAVISL 35

IOIS16 Delay Rising from Address tdrIOIS16(ADR) tAVISH 35

-IOIS16

Dout

tsuA(IORD)

-CE

-IORD

tsuCE(IORD)

th(IORD)

td(IORD)

thA(IORD)

thCE(IORD)

tdrIOIS16(ADR)

tdfIO IS16(ADR)

tw(IORD)

Figure 4-7 True IDE Mode I/O Read Timing Diagram

Notes: The maximum load on -IOIS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds.

Minimum time from -WAIT high to -IORD high is 0 nsec, but minimum -IORD width must still be met.

Dout signifies data provided by the CompactFlash Memory Card to the system.

CompactFlash Memory Card Product Manual

4.3.13 True IDE Mode I/O Output (Write) Timing

Specification

Table 4-10 True IDE Mode I/O Write Timing

Item Symbol IEEE Symbol Min ns. Max ns.

Data Setup before IOWR tsu(IOWR) tDVIWH 60

Data Hold following IOWR th(IOWR) tlWHDX 30

IOWR Width Time tw(IOWR) tlWLIWH 165

Address Setup before IOWR tsuA(IOWR) tAVIWL 70

Address Hold following IOWR thA(IOWR) tlWHAX 20

CE Setup before IOWR tsuCE(IOWR) tELIWL 5

CE Hold following IOWR thCE(IOWR) tlWHEH 20

IOIS16 Delay Falling from Address tdfIOIS16(ADR) tAVISL 35

IOIS16 Delay Rising from Address tdrIOIS16(ADR) tAVISH 35

-IOIS16

Din

tsuA(IOWR)

-CE

-IOWR

tsuCE(IOWR)

th(IOWR)tsu(IOWR)

thA(IOWR)

thCE(IOWR)

tdrIOIS16(ADR)

tdfIO IS16(ADR)

tw(IOWR)

Din Valid

Figure 4-8 True IDE Mode I/O Write Timing Diagram

Notes: The maximum load on -IOIS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds.

Minimum time from -WAIT high to -IOWR high is 0 nsec, but minimum -IOWR width must still be met.

Din signifies data provided by the system to the CompactFlash Memory Card.

CompactFlash Memory Card Product Manual

4.4 Card Configuration

The CompactFlash Memory Cards are identified

by appropriate information in the Card

Information Structure (CIS). The following

configuration registers are used to coordinate t h e

I/O spaces and the Interrupt level of cards that

are located in the system. In addition, these

registers provide a method for accessing status

information about the CompactFlash Card that

may be used to arbitrate between multiple

interrupt sources on the same interrupt level or to

replace status information that appears on

dedicated pins in memory cards that have

alternate use in I/O cards.

Table 4-11 Registers and Memory Space Decoding

-CE2 -CE1 -REG -OE-WE A10 A9 A8-A4 A3 A2 A1 A0 SELECTED SPACE

1 1 X X X X X XX X X X X Standby

X 0 0 0 1 X 1 XX X X X 0 Configuration Registers Read

1 0 1 0 1 X X XX X X X X Common Memory Read (8 Bit D7-D0)

0 1 1 0 1 X X XX X X X X Common Memory Read (8 Bit D15-D8)

0 0 1 0 1 X X XX X X X 0 Common Memory Read (16 Bit D15-D0)

X 0 0 1 0 X 1 XX X X X 0 Configuration Registers Write

1 0 1 1 0 X X XX X X X X Common Memory Write (8 Bit D7-D0)

0 1 1 1 0 X X XX X X X X Common Memory Write (8 Bit D15-D8)

0 0 1 1 0 X X XX X X X 0 Common Memory Write (16 Bit D15-D0)

X 0 0 0 1 0 0 XX X X X 0 Card Information Structure Read

1 0 0 1 0 0 0 XX X X X 0 Invalid Access (CIS Write)

1 0 0 0 1 X X XX X X X 1 Invalid Access (Odd Attribute Read)

1 0 0 1 0 X X XX X X X 1 Invalid Access (Odd Attribute Write)

0 1 0 0 1 X X XX X X X X Invalid Access (Odd Attribute Read)

0 1 0 1 0 X X XX X X X X Invalid Access (Odd Attribute Write)

Configuration Registers Decoding

-CE2 -CE1 -REG -OE -WE A10 A9 A8-A4 A3 A2 A1 A0 SELECTED REGISTER

X 0 0 0 1 0 1 00 0 0 0 0 Configuration Option Reg Read

X 0 0 1 0 0 1 00 0 0 0 0 Configuration Option Reg Write

X 0 0 0 1 0 1 00 0 0 1 0 Card Status Register Read

X 0 0 1 0 0 1 00 0 0 1 0 Card Status Register Write

X 0 0 0 1 0 1 00 0 1 0 0 Pin Replacement Register Read

X 0 0 1 0 0 1 00 0 1 0 0 Pin Replacement Register Write

X 0 0 0 1 0 1 00 0 1 1 0 Socket and Copy Register Read

X 0 0 1 0 0 1 00 0 1 1 0 Socket and Copy Register Write

Note: The location of the card configuration registers should always be read from the CIS since these locations

may vary in future products. No writes should be performed to the CompactFlash Memory Card attribute

memory except to the card configuration register addresses. All other attribute memory locations are

reserved.

CompactFlash Memory Card Product Manual

4.4.1 Attribute Memory Function

Attribute memory is a space where CompactFlash

Memory Card identification and configuration

information is stored, and is limited to 8-bit wide

accesses only at even addresses. The card

configuration registers are also located here.

For the Attribute Memory Read function, signals

-REG and -OE must be active and -WE inactive

during the cycle. As in the Main Memory Read

functions, the signals -CE1 and -CE2 control the

even-byte and odd-byte address, but only the

even-byte data is valid during the Attribute

Memory access. Refer to Table 4-12 below for

signal states and bus validity for the Attribute

Memory function.

Table 4-12 Attribute Memory Function

Function Mode -REG -CE2 -CE1 A9 A0 -OE -WE D15-D8 D7-D0

Standby Mode X H H XXXXHigh Z High Z

Read Byte Access

CIS ROM (8 bits) LHLLLLHHigh Z Even Byte

Write Byte Access

CIS (8 bits) (Invalid) LHLLLHLDon't Care Even Byte

Read Byte Access

Configuration (8 bits) L H L H L L H High Z Even Byte

Write Byte Access

Configuration (8 bits) L H L H L H L Don't Care Even Byte

Read Word Access

CIS (16 bits) LLLLXLHNot Valid Even Byte

Write Word Access

CIS (16 bits) (Invalid) LLLLXHLDon't Care Even Byte

Read Word Access

Configuration (16 bits) LLLHXLHNot Valid Even Byte

Write Word Access

Configuration (16 bits) LLLHXHLDon't Care Even Byte

Note: The -CE signal or both the -OE signal and the -WE signal must be de-asserted between consecutive cycle

operations.

CompactFlash Memory Card Product Manual

4.4.2 Configuration Option Register (Address

200h in Attribute Memory)

The Configuration Option Register is used to

configure the cards interface, address decoding and

interrupt and to issue a soft reset to the

CompactFlash Memory Card.

Operation D7 D6 D5 D4 D3 D2 D1 D0

R/W SRESET LevlREQ Conf5 Conf4 Conf3 Conf2 Conf1 Conf0

SRESET Soft Reset - Setting this bit to one (1), waiting the minimum reset width time and returning to zero

(0) places the CompactFlash Memory Card in the Reset state. Setting this bit to one (1) is

equivalent to assertion of the +RESET signal except that the SRESET bit is not cleared.

Returning this bit to zero (0) leaves the CompactFlash Memory Card in the same un-configured,

Reset state as following power-up and hardware reset. This bit is set to zero (0) by power-up and

hardware reset. Using the PCMCIA Soft Reset is considered a hard Reset by the ATA

Commands. Contrast with Soft Reset in the Device Control Register.

LevlREQ This bit is set to one (1) when Level Mode Interrupt is selected, and zero (0) when Pulse Mode i s

selected. Set to zero (0) by Reset.

Conf5 - Conf0 Configuration Index. Set to zero (0) by reset. It's used to select operation mode of the

CompactFlash Memory Card as shown below.

Note: Conf5 and Conf4 are reserved and must be written as zero (0)

Table 4-13 Card Configurations

Conf5 Conf4 Conf3 Conf2 Conf1 Conf0 Disk Card Mode

0000 0 0Memory Mapped

0000 0 1I/O Mapped, Any 16 byte system

decoded boundary

0000 1 0I/O Mapped, 1F0-1F7/3F6-3F7

0000 1 1I/O Mapped, 170-177/376-377

4.4.3 Card Configuration and Status Register

(Address 202h in Attribute Memory)

The Card Configuration and Status Register

contains information about the CardÕs condition.

Card Configuration and Status Register Organization:

Operation D7 D6 D5 D4 D3 D2 D1 D0

Read Changed SigChg IOis8 0 0 PwrDwn Int 0

Write 0 SigChg IOis8 0 0 PwrDwn 0 0

CompactFlash Memory Card Product Manual

Changed Indicates that one or both of the Pin Replacement register CRdy, or CWProt bits are set to one (1).

When the Changed bit is set, -STSCHG Pin 46 is held low if the SigChg bit is a One (1) and the

CompactFlash Memory Card is configured for the I/O interface.

SigChg This bit is set and reset by the host to enable and disable a state-change “signal” from the Status

desired, this bit should be set to zero (0) and pin 46 (-STSCHG) signal will be held high while the

CompactFlash Memory Card is configured for I/O.

IOis8 The host sets this bit to a one (1) if the CompactFlash Memory Card is to be configured in an 8 bit

I/O mode. The CompactFlash Card is always configured for both 8- and 16-bit I/O, so this bit is

ignored.

PwrDwn This bit indicates whether the host requests the CompactFlash Memory Card to be in the power

saving or active mode. When the bit is one (1), the CompactFlash Card enters a power down mode.

When zero (0), the host is requesting the CompactFlash Card to enter the active mode. The

PCMCIA Rdy/-Bsy value becomes BUSY when this bit is changed. Rdy/-Bsy will not become Ready

until the power state requested has been entered. The CompactFlash Card automatically powers

down when it is idle and powers back up when it receives a command.

Int This bit represents the internal state of the interrupt request. This value is available whether or not

I/O interface has been configured. This signal remains true until the condition which caused the

interrupt request has been serviced. If interrupts are disabled by the -IEN bit in the Device Control

4.4.4 Pin Replacement Register (Address 204h

in Attribute Memory)

Operation D7 D6 D5 D4 D3 D2 D1 D0

Read 0 0 CRdy/-Bsy CWProt 1 1 RRdy/-Bsy RWProt

Write 0 0 CRdy/-Bsy CWProt 0 0 MRdy/-Bsy MWProt

CRdy/-Bsy This bit is set to one (1) when the bit RRdy/-Bsy changes state. This bit can also be written by the

host.

CWProt This bit is set to one (1) when the RWprot changes state. This bit may also be written by the host.

RRdy/-Bsy This bit is used to determine the internal state of the Rdy/-Bsy signal. This bit may be used to

determine the state of the Ready/-Busy as this pin has been reallocated for use as Interrupt

Request on an I/O card. When written, this bit acts as a mask for writing the corresponding bit

CRdy/-Bsy.

RWProt This bit is always zero (0) since the CompactFlash Memory Card does not have a Write Protect

switch. When written, this bit acts as a mask for writing the corresponding bit CWProt.

MRdy/-Bsy This bit acts as a mask for writing the corresponding bit CRdy/-Bsy.

MWProt This bit when written acts as a mask for writing the corresponding bit CWProt.

CompactFlash Memory Card Product Manual

Table 4-14 Pin Replacement Changed Bit/Mask Bit Values

Initial Value Written by Host Final Comments

of (C) Status “C” Bit “M” Bit “C” Bit

0 X 0 0 Unchanged

1 X 0 1 Unchanged

X 0 1 0 Cleared by Host

X 1 1 1 Set by Host

4.4.5 Socket and Copy Register (Address 206h in

Attribute Memory)

This register contains additional configuration

information. This register is always written by

the system before writing the cardÕs Configuration

Index Register.

Socket and Copy Register Organization:

Operation D7 D6 D5 D4 D3 D2 D1 D0

Read Reserved 0 0 Drive # 0 0 0 0

Write 0 0 0 Drive # (0) X X X X

Reserved This bit is reserved for future standardization. This bit must be set to zero (0) by the software when

the register is written.

Drive # This bit indicates the drive number of the card if twin card configuration is supported.

XThe socket number is ignored by the CompactFlash Memory Card.

CompactFlash Memory Card Product Manual

4.5 I/O Transfer Function

4.5.1 I/O Function

The I/O transfer to or from the CompactFlash

Memory Card can be either 8 or 16 bits. When a

16-bit accessible port is addressed, the signal

-IOIS16 is asserted by the CompactFlash Card.

Otherwise, the -IOIS16 signal is de-asserted.

When a 16 bit transfer is attempted, and the

-IOIS16 signal is not asserted by the

CompactFlash Card, the system must generate a

pair of 8-bit references to access the wordÔs even

byte and odd byte. The CompactFlash Card

permits both 8 and 16 bit accesses to all of its I/O

addresses, so -IOIS16 is asserted for all addresses

to which the CompactFlash Card responds.

The CompactFlash Memory Card may request t he

host to extend the length of an input cycle until

data is ready by asserting the -WAIT signal a t

the start of the cycle.

Table 4-15 I/O Function

Function Code -REG -CE2 -CE1 A0 -IORD -IOWR D15-D8 D7-D0

Standby Mode X H H X X X High Z High Z

Byte Input Access

(8 bits) L

HHigh Z

High Z Even-Byte

Odd-Byte

Byte Output

Access

(8 bits)

LDon't Care

Don't Care Even-Byte

Odd-Byte

Word Input

Access

(16 bits)

L L L L L H Odd-Byte Even-Byte

Word Output

Access

(16 bits)

L L L L H L Odd-Byte Even-Byte

I/O Read Inhibit H X X X L H Don't Care Don't Care

I/O Write Inhibit H X X X H L High Z High Z

High Byte Input

Only

(8 bits)

L L H X L H Odd-Byte High Z

High Byte Output

Only

(8 bits)

L L H X H L Odd-Byte Don't Care

CompactFlash Memory Card Product Manual

4.6 Common Memory Transfer Function

4.6.1 Common Memory Function

The Common Memory transfer to or from t h e

CompactFlash Memory Card can be either 8 or 16

bits.

The CompactFlash Memory Card permits both 8

and 16 bit accesses to all of its Common Memory

addresses.

The CompactFlash Memory Card may request t he

host to extend the length of a memory write cycle

or extend the length of a memory read cycle until

data is ready by asserting the -WAIT signal a t

the start of the cycle.

Table 4-16 Common Memory Function

Function Code -REG -CE2 -CE1 A0 -OE -WE D15-D8 D7-D0

Standby Mode X H H X X X High Z High Z

Byte ReadAccess

(8 bits) H

HHigh Z

High Z Even-Byte

Odd-Byte

Byte Write Access

(8 bits) H

LDon't Care

Don't Care Even-Byte

Odd-Byte

Word Read Access

(16 bits) H L L X L H Odd-Byte Even-Byte

Word Write Access

(16 bits) H L L X H L Odd-Byte Even-Byte

Odd Byte Read Only

(8 bits) H L H X L H Odd-Byte High Z

Odd Byte Write Only

(8 bits) H L H X H L Odd-Byte Don't Care

CompactFlash Memory Card Product Manual

4.7 True IDE Mode I/O Transfer Function

4.7.1 True IDE Mode I/O Function

The CompactFlash Memory Card can be

configured in a True IDE Mode of operation. This

CompactFlash Card is configured in this mode

only when the -OE input signal is grounded by t h e

host. In this True IDE Mode, the PCMCIA protocol

and configuration are disabled and only I/O

operations to the Task File and Data Register are

allowed. In this mode, no Memory or Attribute

Registers are accessible to the host.

CompactFlash Cards permit 8 bit data accesses i f

the user issues a Set Feature Command to put th e

device in 8 bit Mode.

Note: Removing and reinserting the CompactFlash

Memory Card while the host computer’s power is

on will reconfigure the CompactFlash Card to PC

Card ATA mode from the original True IDE Mode.

To configure the CompactFlash Card in True IDE

Mode, the 68-pin socket must be power cycled

with the CompactFlash Card inserted and -OE

(output enable) grounded by the host.

The following table defines the function of th e

operations for the True IDE Mode.

Table 4-17 IDE Mode I/O Function

Function Code -CE2 -CE1 A0 -IORD -IOWR D15-D8 D7-D0

Invalid Mode L L X X X High Z High Z

Standby Mode H H X X X High Z High Z

Task File Write H L 1-7h H L Don't Care Data In

Task File Read H L 1-7h L H High Z Data Out

Data Register

Write H L 0 H L Odd-Byte

In Even-Byte

Data Register

Read H L 0 L H Odd-Byte

Out Even-Byte

Out

Control Register

Write L H 6h H L Don't Care Control In

Alt Status Read L H 6h L H High Z Status Out

CompactFlash Memory Card Product Manual

5.0 ATA Drive Register Set Definition and Protocol

The CompactFlash Memory Card can be

configured as a high performance I/O device

through:

a.) Standard PC-AT disk I/O address spaces

1F0h-1F7h, 3F6h-3F7h (primary); 170h-

177h, 376h-377h (secondary) with IRQ 14

(or other available IRQ).

b.) Any system decoded 16 byte I/O block

using any available IRQ.

c.) Memory space.

The communication to or from the CompactFlash

Memory Card is done using the Task File registers

which provide all the necessary registers for

control and status information. The PCMCIA

interface connects peripherals to the host using

four register mapping methods. The following is a

detailed description of these methods:

Table 5-1 I/O Configurations

Standard Configurations

Config

Index IO or

Memory Address Drive # Description

0 Memory 0-F, 400-7FF 0 Memory Mapped

1 I/O XX0-XXF 0 I/O Mapped 16 Contiguous Registers

2 I/O 1F0-1F7, 3F6-3F7 0 Primary I/O Mapped Drive 0

2 I/O 1F0-1F7, 3F6-3F7 1 Primary I/O Mapped Drive 1

3 I/O 170-177, 376-377 0 Secondary I/O Mapped Drive 0

3 I/O 170-177, 376-377 1 Secondary I/O Mapped Drive 1

CompactFlash Memory Card Product Manual

5.1 I/O Primary and Secondary

Address Configurations

Table 5-2 Primary and Secondary I/O Decoding

-REG A9-A4 A3 A2 A1 A0 -IORD=0 -IOWR=0 Note

0 1F(17) 0 0 0 0 Even RD Data Even WR Data 1, 2

0 1F(17) 0 0 0 1 Error Register Features 1

0 1F(17) 0 0 1 0 Sector Count Sector Count

0 1F(17) 0 0 1 1 Sector No. Sector No.

0 1F(17) 0 1 0 0 Cylinder Low Cylinder Low

0 1F(17) 0 1 0 1 Cylinder High Cylinder High

0 1F(17) 0 1 1 0 Select Card/Head Select Card/Head

0 1F(17) 0 1 1 1 Status Command

0 3F(37) 0 1 1 0 Alt Status Device Control

0 3F(37) 0 1 1 1 Drive Address Reserved

Notes: 1. Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Don't Care) as a word register on the

combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte

accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register

overlaps the address space of the Error and Feature byte-wide registers which lie at offset 1. When

accessed twice as byte register with -CE1 low, the first byte to be accessed is the even byte of the word and

the second byte accessed is the odd byte of the equivalent word access.

2. A byte access to register 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write)

CompactFlash Memory Card Product Manual

5.2 Contiguous I/O Mapped

Addressing

When the system decodes a contiguous block of I/O

registers to select the CompactFlash Memory

Card, the registers are accessed in the block of I/O

space decoded by the system as follows:

Table 5-3 Contiguous I/O Decoding

-REG A3 A2 A1 A0 Offset -IORD=0 -IOWR=0 Notes

0 0 0 0 0 0 Even RD Data Even WR Data 1

0 0 0 0 1 1 Error Features 2

0 0 0 1 0 2 Sector Count Sector Count

0 0 0 1 1 3 Sector No. Sector No.

0 0 1 0 0 4 Cylinder Low Cylinder Low

0 0 1 0 1 5 Cylinder High Cylinder High

0 0 1 1 0 6 Select Card /Head Select Card/Head

0 0 1 1 1 7 Status Command

0 1 0 0 0 8 Dup Even RD Data Dup. Even WR Data 2

0 1 0 0 1 9 Dup. Odd RD Data Dup. Odd WR Data 2

0 1 1 0 1 D Dup. Error Dup. Features 2

0 1 1 1 0 E Alt Status Device Ctl

0 1 1 1 1 F Drive Address Reserved

Notes: 1. Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Don't Care) as a word register on the

combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte

accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register

overlaps the address space of the Error and Feature byte-wide registers that lie at offset 1. When accessed

twice as byte register with -CE1 low, the first byte to be accessed is the even byte of the word and the

second byte accessed is the odd byte of the equivalent word access.

A byte access to register 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register.

2. Registers at offset 8, 9 and D are non-overlapping duplicates of the registers at offset 0 and 1.

byte accessed in the order 9 then 8 the data will be transferred odd byte then even byte.

Repeated byte accesses to register 8 or 0 will access consecutive (even than odd) bytes from the data

buffer. Repeated word accesses to register 8, 9 or 0 will access consecutive words from the data buffer.

Repeated byte accesses to register 9 are not supported. However, repeated alternating byte accesses to

registers 8 then 9 will access consecutive (even then odd) bytes from the data buffer. Byte accesses to

3. Address lines which are not indicated are ignored by the CompactFlash Memory Card for accessing all the

registers in this table.

CompactFlash Memory Card Product Manual

5.3 Memory Mapped Addressing

When the CompactFlash Memory Card registers

are accessed via memory references, the registers

appear in the common memory space window:

0-2K bytes as follows:

Table 5-4 Memory Mapped Decoding

-REG A10 A9-A4 A3 A2 A1 A0 Offset -OE=0 -WE=0 Notes

1 0 X 0 0 0 0 0 Even RD Data Even WR Data 1

1 0 X 0 0 0 1 1 Error Features 2

1 0 X 0 0 1 0 2 Sector Count Sector Count

1 0 X 0 0 1 1 3 Sector No. Sector No.

1 0 X 0 1 0 0 4 Cylinder Low Cylinder Low

1 0 X 0 1 0 1 5 Cylinder High Cylinder High

1 0 X 0 1 1 0 6 Select Card /Head Select Card/Head

1 0 X 0 1 1 1 7 Status Command

1 0 X 1 0 0 0 8 Dup. Even RD Data Dup. Even WR Data 2

1 0 X 1 0 0 1 9 Dup. Odd RD Data Dup. Odd WR Data 2

1 0 X 1 1 0 1 D Dup. Error Dup. Features 2

1 0 X 1 1 1 0 E Alt Status Device Ctl

1 0 X 1 1 1 1 F Drive Address Reserved

1 1 X X X X 0 8 Even RD Data Even WR Data 3

1 1 X X X X 1 9 Odd RD Data Odd WR Data 3

Notes: 1. Register 0 is accessed with -CE1 low and -CE2 low as a word register on the combined Odd Data Bus and

Even Data Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with

-CE1 low and -CE2 high. Note that the address space of this word register overlaps the address space of the

Error and Feature byte-wide registers that lie at offset 1. When accessed twice as byte register with -CE1

low, the first byte to be accessed is the even byte of the word and the second byte accessed is the odd byte

of the equivalent word access.

A byte access to address 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register.

2. Registers at offset 8, 9 and D are non-overlapping duplicates of the registers at offset 0 and 1.

byte accessed in the order 9 then 8 the data will be transferred odd byte then even byte.

Repeated byte accesses to register 8 or 0 will access consecutive (even then odd) bytes from the data

buffer. Repeated word accesses to register 8, 9 or 0 will access consecutive words from the data buffer.

Repeated byte accesses to register 9 are not supported. However, repeated alternating byte accesses to

registers 8 then 9 will access consecutive (even then odd) bytes from the data buffer. Byte accesses to

3. Accesses to even addresses between 400h and 7FFh access register 8. Accesses to odd addresses

between 400h and 7FFh access register 9. This 1 Kbyte memory window to the data register is provided so

that hosts can perform memory to memory block moves to the data register when the register lies in memory

space.

Some hosts, such as the X86 processors, must increment both the source and destination addresses when

executing the memory to memory block move instruction. Some PCMCIA socket adapters also have auto

incrementing address logic embedded within them. This address window allows these hosts and adapters to

function efficiently.

Note that this entire window accesses the Data Register FIFO and does not allow random access to the data

buffer within the CompactFlash Memory Card.

CompactFlash Memory Card Product Manual

5.4 True IDE Mode Addressing

When the CompactFlash Memory Card is

configured in the True IDE Mode the I/O decoding

is as follows:

Table 5-5 True IDE Mode I/O Decoding

-CE2 -CE1 A2 A1 A0 -IORD=0 -IOWR=0 Note

1 0 0 0 0 Even RD Data Even WR Data

1 0 0 0 1 Error Register Features

1 0 0 1 0 Sector Count Sector Count

1 0 0 1 1 Sector No. Sector No.

1 0 1 0 0 Cylinder Low Cylinder Low

1 0 1 0 1 Cylinder High Cylinder High

1 0 1 1 0 Select Card/Head Select Card/Head

1 0 1 1 1 Status Command

0 1 1 1 0 Alt Status Device Control

0 1 1 1 1 Drive Address Reserved

CompactFlash Memory Card Product Manual

5.5 ATA Registers

Note: In accordance with the PCMCIA specification:

each of the registers below which is located at

an odd offset address may be accessed at its

normal address and also the corresponding

even address (normal address -1) using data

bus lines (D15-D8) when -CE1 is high and -CE2

is low unless -IOIS16 is high (not asserted) and

an I/O cycle is being performed.

5.5.1 Data Register (Address - 1F0[170];Offset

0,8,9)

The Data Register is a 16 bit register, and it is

used to transfer data blocks between the

CompactFlash Memory Card data buffer and t h e

Host. This register overlaps the Error Register.

The table below describes the combinations of

data register access and is provided to assist in

understanding the overlapped Data Register and

Error/Feature Register rather than to attempt to

define general PCMCIA word and byte access

modes and operations. See the PCMCIA PC Card

Standard Release 2.0 for definitions of the Card

Accessing Modes for I/O and Memory cycles.

Note that because of the overlapped registers,

access to the 1F1, 171 or offset 1 are not defined for

word (-CE2 = 0 and -CE1 = 0) operations. SanDisk

products treat these accesses as accesses to the

Word Data Register. The duplicated registers a t

offsets 8, 9 and Dh have no restrictions on the

operations that can be performed by the socket.

Data Register CE2- CE1- A0 Offset Data Bus

Word Data Register 0 0 X 0,8,9 D15-D0

Even Data Register 1 0 0 0,8 D7-D0

Odd Data Register 1 0 1 9 D7-D0

Odd Data Register 0 1 X 8,9 D15-D8

Error / Feature Register 1 0 1 1, Dh D7-D0

Error / Feature Register 0 1 X 1 D15-D8

Error / Feature Register 0 0 X Dh D15-D8

CompactFlash Memory Card Product Manual

5.5.2 Error Register (Address - 1F1[171];

Offset 1, 0Dh Read Only)

This register contains additional information

about the source of an error when an error is

indicated in bit 0 of the Status register. The bits

are defined as follows:

D7 D6 D5 D4 D3 D2 D1 D0

BBK UNC 0 IDNF 0 ABRT 0 AMNF

This register is also accessed on data bits D15-D8

during a write operation to offset 0 with -CE2 low

and -CE1 high.

Bit 7 (BBK) This bit is set when a Bad Block is detected.

Bit 6 (UNC) This bit is set when an Uncorrectable Error is encountered.

Bit 5 This bit is 0.

Bit 4 (IDNF) The requested sector ID is in error or cannot be found.

Bit 3 This bit is 0.

Bit 2 (Abort) This bit is set if the command has been aborted because of a CompactFlash Memory Card status

condition: (Not Ready, Write Fault, etc.) or when an invalid command has been issued.

Bit 1 This bit is 0.

Bit 0 (AMNF) This bit is set in case of a general error.

5.5.3 Feature Register (Address - 1F1[171];

Offset 1, 0Dh Write Only)

This register provides information regarding

features of the CompactFlash Memory Card that

the host can utilize. This register is also accessed

on data bits D15-D8 during a write operation to

Offset 0 with -CE2 low and -CE1 high.

5.5.4 Sector Count Register

(Address - 1F2[172]; Offset 2)

This register contains the number of sectors of data

requested to be transferred on a read or write

operation between the host and t he

CompactFlash Memory Card. If the value in this

If the command was successful, this register is zero

at command completion. If not successfully

completed, the register contains the number of

sectors that need to be transferred in order to

complete the request.

5.5.5 Sector Number (LBA 7-0) Register

(Address - 1F3[173]; Offset 3)

This register contains the starting sector number or

bits 7-0 of the Logical Block Address (LBA) for

any CompactFlash Memory Card data access for

the subsequent command.

5.5.6 Cylinder Low (LBA 15-8) Register

(Address - 1F4[174]; Offset 4)

This register contains the low order 8 bits of the

starting cylinder address or bits 15-8 of the

Logical Block Address.

5.5.7 Cylinder High (LBA 23-16) Register

(Address - 1F5[175]; Offset 5)

This register contains the high order bits of the

starting cylinder address or bits 23-16 of the

Logical Block Address.

CompactFlash Memory Card Product Manual

5.5.8 Drive/Head (LBA 27-24) Register

(Address 1F6[176]; Offset 6)

The Drive/Head register is used to select the

drive and head. It is also used to select LBA

addressing instead of cylinder/head/sector

addressing. The bits are defined as follows:

D7 D6 D5 D4 D3 D2 D1 D0

1 LBA 1 DRV HS3 HS2 HS1 HS0

Bit 7 This bit is set to 1.

Bit 6 LBA is a flag to select either Cylinder/Head/Sector (CHS) or Logical Block Address Mode (LBA).

When LBA=0, Cylinder/Head/Sector mode is selected. When LBA=1, Logical Block Address is

selected. In Logical Block Mode, the Logical Block Address is interpreted as follows:

LBA07-LBA00: Sector Number Register D7-D0.

LBA15-LBA08: Cylinder Low Register D7-D0.

LBA23-LBA16: Cylinder High Register D7-D0.

LBA27-LBA24: Drive/Head Register bits HS3-HS0.

Bit 5 This bit is set to 1.

Bit 4 (DRV) This bit will have the following meaning. DRV is the drive number. When DRV=0, drive (card) 0 is

selected When DRV=1, drive (card) 1 is selected. The CompactFlash Card is set to be Card 0 or 1

using the copy field of the PCMCIA Socket & Copy configuration register.

Bit 3 (HS3) When operating in the Cylinder , Head, Sector mode, this is bit 3 of the head number. It is Bit 27 in

the Logical Block Address mode.

Bit 2 (HS2) When operating in the Cylinder, Head, Sector mode, this is bit 2 of the head number. It is Bit 26 in

the Logical Block Address mode.

Bit 1 (HS1) When operating in the Cylinder, Head, Sector mode, this is bit 1 of the head number. It is Bit 25 in

the Logical Block Address mode.

Bit 0 (HS0) When operating in the Cylinder, Head, Sector mode, this is bit 0 of the head number. It is Bit 24 in

the Logical Block Address mode.

CompactFlash Memory Card Product Manual

5.5.9 Status & Alternate Status Registers

(Address 1F7[177]&3F6[376];

Offsets 7 & Eh)

These registers return the CompactFlash Memory

Card status when read by the host. Reading the

Status register does clear a pending interrupt

while reading the Auxiliary Status register does

not. The meaning of the status bits are described as

follows:

D7 D6 D5 D4 D3 D2 D1 D0

BUSY RDY DWF DSC DRQ CORR 0 ERR

Bit 7 (BUSY) The busy bit is set when the CompactFlash Memory Card has access to the command buffer and

registers and the host is locked out from accessing the command register and buffer. No other bits

in this register are valid when this bit is set to a 1.

Bit 6 (RDY) RDY indicates whether the device is capable of performing CompactFlash Memory Card operations.

This bit is cleared at power up and remains cleared until the CompactFlash Card is ready to accept

a command.

Bit 5 (DWF) This bit, if set, indicates a write fault has occurred.

Bit 4 (DSC) This bit is set when the CompactFlash Memory Card is ready.

Bit 3 (DRQ) The Data Request is set when the CompactFlash Memory Card requires that information be

transferred either to or from the host through the Data register.

Bit 2 (CORR) This bit is set when a Correctable data error has been encountered and the data has been

corrected. This condition does not terminate a multi-sector read operation.

Bit 1 (IDX) This bit is always set to 0.

Bit 0 (ERR) This bit is set when the previous command has ended in some type of error. The bits in the Error

5.5.10 Device Control Register

(Address - 3F6[376]; Offset Eh)

This register is used to control the CompactFlash

Memory Card interrupt request and to issue an

ATA soft reset to the card. The bits are defined as

follows:

D7 D6 D5 D4 D3 D2 D1 D0

XXXX1SW Rst-IEn 0

Bit 7 This bit is an X (don't care).

Bit 6 This bit is an X (don't care).

Bit 5 This bit is an X (don't care).

Bit 4 This bit is an X (don't care).

Bit 3 This bit is ignored by the CompactFlash Memory Card.

Bit 2 (SW Rst) This bit is set to 1 in order to force the CompactFlash Memory Card to perform an AT Disk

controller Soft Reset operation. This does not change the PCMCIA Card Configuration Registers

(4.3.2 to 4.3.5) as a hardware Reset does. The Card remains in Reset until this bit is reset to '0'.

Bit 1 (-IEn) The Interrupt Enable bit enables interrupts when the bit is 0. When the bit is 1, interrupts from the

CompactFlash Memory Card are disabled. This bit also controls the Int bit in the Configuration

and Status Register. This bit is set to 1 at power on and Reset.

Bit 0 This bit is ignored by the CompactFlash Memory Card.

CompactFlash Memory Card Product Manual

5.5.11 Card (Drive) Address Register

(Address 3F7[377]; Offset Fh)

This register is provided for compatibility with

the AT disk drive interface. It is recommended

that this register not be mapped into the host's

I/O space because of potential conflicts on Bit 7.

The bits are defined as follows:

D7 D6 D5 D4 D3 D2 D1 D0

X -WTG -HS3 -HS2 -HS1 -HS0 -nDS1 -nDS0

Bit 7 This bit is unknown.

Implementation Note:

Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller

operating at the same addresses as the CompactFlash Memory Card. Following are some possible

solutions to this problem for the PCMCIA implementation:

1. Locate the CompactFlash Memory Card at a non-conflicting address, i.e. Secondary address

(377) or in an independently decoded Address Space when a Floppy Disk Controller is located at

the Primary addresses.

2. Do not install a Floppy and a CompactFlash Memory Card in the system at the same time.

3. Implement a socket adapter which can be programmed to (conditionally) tri-state D7 of I/0

address 3F7/377 when a CompactFlash Memory Card is installed and conversely to tri-state D6-D0

of I/O address 3F7/377 when a floppy controller is installed.

4. Do not use the CompactFlash Memory Card's Drive Address register. This may be accomplished

by either a) If possible, program the host adapter to enable only I/O addresses 1F0-1F7, 3F6 (or

170-177, 176) to the CompactFlash Memory Card or b) if provided use an additional Primary /

Secondary configuration in the CompactFlash Card which does not respond to accesses to I/O

locations 3F7 and 377. With either of these implementations, the host software must not attempt to

use information in the Drive Address Register.

Bit 6 (-WTG) This bit is 0 when a write operation is in progress, otherwise, it is 1.

Bit 5 (-HS3) This bit is the negation of bit 3 in the Drive/Head register.

Bit 4 (-HS2) This bit is the negation of bit 2 in the Drive/Head register.

Bit 3 (-HS1) This bit is the negation of bit 1 in the Drive/Head register.

Bit 2 (-HS0) This bit is the negation of bit 0 in the Drive/Head register.

Bit 1 (-nDS1) This bit is 0 when drive 1 is active and selected.

Bit 0 (-nDS0) This bit is 0 when the drive 0 is active and selected.

CompactFlash Memory Card Product Manual

6.0 ATA Command Description

This section defines the software requirements and

the format of the commands the host sends to t h e

CompactFlash Memory Cards. Commands are

issued to the CompactFlash Card by loading the

required registers in the command block with the

supplied parameters, and then writing the

command code to the Command Register. The

manner in which a command is accepted varies.

There are three classes (see Table 6-1) of command

acceptance, all dependent on the host not issuing

commands unless the CompactFlash Card is not

busy. (The BUSY bit in the status and alternate

status registers is 0.)

¥ Upon receipt of a Class 1 command, t h e

CompactFlash Card sets the BUSY bit

within 400 nsec.

¥ Upon receipt of a Class 2 command, th e

CompactFlash Memory Card sets the

BUSY bit within 400 nsec, sets up the

sector buffer for a write operation, sets

DRQ within 700 µsec, and clears the

BUSY bit within 400 nsec of setting DRQ.

¥ Upon receipt of a Class 3 command, t h e

CompactFlash Memory Card sets the

BUSY bit within 400 nsec, sets up the

sector buffer for a write operation, sets

DRQ within 20 msec (assuming no re-

assignments), and clears the BUSY bit

within 400 nsec of setting DRQ.

6.1 ATA Command Set

Table 6-1 summarizes the ATA command set with

the paragraphs that follow describing the

individual commands and the task file for each.

CompactFlash Memory Card Product Manual

Table 6-1 ATA Command Set

Class COMMAND Code FR SC SN CY DH LBA

1 Check Power Mode E5h or 98h ----D-

1 Execute Drive Diagnostic 90h ----D-

1 Erase Sector(s) (Note 1) C0h - YYYYY

2 Format Track 50h - Y - Y Y Y

1 Identify Drive ECh ----D-

1 Idle E3h or 97h - Y - - D -

1 Idle Immediate E1h or 95h ----D-

1 Initialize Drive Parameters 91h - Y - - Y -

1 Read Buffer E4h ----D-

1 Read Multiple C4h - YYYYY

1 Read Long Sector 22h or 23h - - YYYY

1 Read Sector(s) 20h or 21h - YYYYY

1 Read Verify Sector(s) 40h or 41h - YYYYY

1 Recalibrate 1Xh ----D-

1 Request Sense (Note 1) 03h ----D-

1 Seek 7Xh - - YYYY

1 Set Features EFh Y - - - D -

1 Set Multiple Mode C6h - Y - - D -

1 Set Sleep Mode E6h or 99h ----D-

1 Stand By E2h or 96h ----D-

1 Stand By Immediate E0h or 94h ----D-

1 Translate Sector (Note 1) 87h - YYYYY

1 Wear Level (Note 1) F5h ----Y-

2 Write Buffer E8h ----D-

2 Write Long Sector 32h or 33h - - YYYY

3 Write Multiple C5h - YYYYY

3 Write Multiple w/o Erase ( 1) CDh - YYYYY

2 Write Sector(s) 30h or 31h - YYYYY

2 Write Sector(s) w/o Erase ( 1) 38h - YYYYY

2 Write Verify Sector(s) 3Ch - YYYYY

Note 1: This command is not a standard PC Card ATA command but provides additional functionality.

Definitions: FR = Features Register, SC = Sector Count Register, SN = Sector Number Register, CY = Cylinder

Registers, DH = Card/Drive/Head Register, LBA = Logical Block Address Mode Supported (see

command descriptions for use).

Y - The register contains a valid parameter for this command. For the Drive/Head Register Y means both

the CompactFlash Memory Card and head parameters are used; D - only the CompactFlash Memory

Card parameter is valid and not the head parameter.

CompactFlash Memory Card Product Manual

6.1.1 Check Power Mode - 98H, E5H

Bit -> 7 6 543210

Command (7) E5H or 98H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command checks the power mode.

If the CompactFlash Memory Card is in, going to,

or recovering from the sleep mode, t h e

CompactFlash Card sets BSY, sets the Sector

Count Register to 00h, clears BSY and generates an

interrupt.

If the CompactFlash Memory Card is in Idle

mode, the CompactFlash Card sets BSY, sets the

Sector Count Register to FFh, clears BSY and

generates an interrupt.

6.1.2 Execute Drive Diagnostic - 90H

Bit -> 7 6 543210

Command (7) 90H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command performs the internal diagnostic

tests implemented by the CompactFlash Memory

Card.

The Diagnostic codes shown in Table 6-2 are

returned in the Error Register at the end of t h e

command.

CompactFlash Memory Card Product Manual

Table 6-2 Diagnostic Codes

Code Error Type

01h No Error Detected

02h Formatter Device Error

03h Sector Buffer Error

04h ECC Circuitry Error

05h Controlling Microprocessor Error

8Xh Slave Failed (True IDE Mode)

6.1.3 Erase Sector(s) - C0H

Bit -> 7 6 543210

Command (7) C0H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) Sector Count

Feature (1) X

This command is used to pre-erase and condition

data sectors in advance of a Write without Erase

or Write Multiple without Erase command. There

is no data transfer associated with this command

but since an implied write ID (header) operation

is performed, a Write Fault error status can occur.

Refer to section 1.8.5 Using the Erase Sector and

Write without Erase Commands for an expanded

definition of the Erase Sector(s) command.

CompactFlash Memory Card Product Manual

6.1.4 Format Track - 50H

Bit -> 7 6 543210

Command (7) 50H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) X (LBA 7-0)

Sec Cnt (2) Count (LBA mode only)

Feature (1) X

This command writes the desired head and

cylinder of the selected drive with a FFh pattern.

To remain host backward compatible, the

CompactFlash Memory Card expects a sector

buffer of data from the host to follow the

command with the same protocol as the Write

Sector(s) command although the information in

the buffer is not used by the CompactFlash Card.

If LBA=1 then the number of sectors to format is

taken from the Sec Cnt register (0=256).

6.1.5 Identify Drive - ECH

Bit -> 7 6 543210

Command (7) ECH

C/D/H (6) X X X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

The Identify Drive command enables the host to

receive parameter information from th e

CompactFlash Memory Card. This command h a s

the same protocol as the Read Sector(s) command.

The parameter words in the buffer have the

arrangement and meanings defined in Table 6-3.

All reserved bits or words are zero. Table 6-3 is

the definition for each field in the Identify Drive

Information.

CompactFlash Memory Card Product Manual

Table 6-3 Identify Drive Information

Word

Address Default

Value Total

Bytes Data Field Type Information

0 848AH 2 General configuration bit-significant information

1 XXXX 2 Default number of cylinders

2 0000H 2 Reserved

3 XXXX 2 Default number of heads

4 0000H 2 Number of unformatted bytes per track

5 0240H 2 Number of unformatted bytes per sector

6 XXXX 2 Default number of sectors per track

7-8 XXXX 4 Number of sectors per card (Word 7 = MSW, Word 8 = LSW)

9 0000H 2 Reserved

10-19 aaaa 20 Serial number in ASCII (Right Justified)

20 0002H 2 Buffer type (dual ported)

21 0002H 2 Buffer size in 512 byte increments

22 0004H 2 # of ECC bytes passed on Read/Write Long Commands

23-26 aaaa 8 Firmware revision in ASCII (Rev M.ms) set by code Big Endian Byte Order in

Word

27-46 aaaa 40 Model number in ASCII (Left Justified) Big Endian Byte Order in Word

47 0001H 2 Maximum of 1 sector on Read/Write Multiple command

48 0000H 2 Double Word not supported

49 0200H 2 Capabilities: DMA NOT Supported (bit 8), LBA supported (bit 9)

50 0000H 2 Reserved

51 0100H 2 PIO data transfer cycle timing mode 1

52 0000H 2 DMA data transfer cycle timing mode Not Supported

53 0001H 2 Translation parameters are valid

54 XXXX 2 Current numbers of cylinders

55 XXXX 2 Current numbers of heads

56 XXXX 2 Current sectors per track

57-58 XXXX 4 Current capacity in sectors (LBAs)(Word 57 = LSW, Word 58 = MSW)

59 010XH 2 Multiple sector setting is valid

60-61 XXXX 4 Total number of sectors addressable in LBA Mode

62-127 0000H 138 Reserved

128-159 0000H 64 Reserved vendor unique bytes

160-255 0000H 192 Reserved

CompactFlash Memory Card Product Manual

6.1.5.1 General Configuration

This field informs the host that this is a non-

magnetic, hard sectored, removable storage device

with a transfer rate greater than 10 mb/sec and is

not MFM encoded.

6.1.5.2 Default Number of Cylinders

This field contains the number of translated

cylinders in the default translation mode. This

value will be the same as the number of cylinders.

6.1.5.3 Default Number of Heads

This field contains the number of translated heads

in the default translation mode.

6.1.5.4 Number of Unformatted Bytes per

Track

This field contains the number of unformatted

bytes per translated track in the default

translation mode.

6.1.5.5 Number of Unformatted Bytes per

Sector

This field contains the number of unformatted

bytes per sector in the default translation mode.

6.1.5.6 Default Number of Sectors per Track

This field contains the number of sectors per track

in the default translation mode.

6.1.5.7 Number of Sectors per Card

This field contains the number of sectors per

CompactFlash Memory Card. This double word

value is also the first invalid address in LBA

translation mode.

6.1.5.8 Memory Card Serial Number

The contents of this field are right justified and

padded with spaces (20h).

6.1.5.9 Buffer Type

This field defines the buffer capability with the

0002h meaning a dual ported multi-sector buffer

capable of simultaneous data transfers to or from

the host and the CompactFlash Memory Card.

6.1.5.10 Buffer Size

This field defines the buffer capacity of 2 sectors

or 1 kilobyte of SRAM.

6.1.5.11 ECC Count

This field defines the number of ECC bytes used on

each sector in the Read and Write Long commands.

6.1.5.12 Firmware Revision

This field contains the revision of the firmware

for this product.

6.1.5.13 Model Number

This field contains the model number for this

product and is left justified and padded with

spaces (20h).

CompactFlash Memory Card Product Manual

6.1.5.14 Read/Write Multiple Sector Count

This field contains the maximum number of sectors

that can be read or written per interrupt using t h e

Read Multiple or Write Multiple commands.

6.1.5.15 Double Word Support

This field indicates this product will not support

double word transfers.

6.1.5.16 Capabilities

This field indicates this product will not support

DMA Data transfers but does support LBA mode.

6.1.5.17 PIO Data Transfer Cycle Timing Mode

This field defines the mode for PIO data transfer.

6.1.5.18 DMA Data Transfer Cycle Timing

Mode

This field states this product doesnÕt support any

DMA data transfer mode.

6.1.5.19 Translation Parameters Valid

This field contains the value 0001h indicating

that words 54 to 58 are valid and reflect the

current number of cylinders, heads and sectors.

6.1.5.20 Current Number of Cylinders, Heads,

Sectors/Track

These fields contains the current number of user

addressable Cylinders, Heads, and Sectors/Track

in the current translation mode.

6.1.5.21 Current Capacity

This field contains the product of the current

cylinders times heads times sectors.

6.1.5.22 Multiple Sector Setting

This field contains a validity flag in the odd byte

and the current number of sectors that can be

transferred per interrupt for R/W Multiple in the

even byte. The odd byte is always 01H which

indicates that the even byte is always valid.

The even byte value depends on the value set by

the Set Multiple command. The even byte of this

word by default contains a 00H which indicates

that R/W Multiple commands are not valid. The

only other value returned by the CompactFlash

Memory Card in the even byte is a 01H value

which indicates that 1 sector per interrupt can be

transferred in R/W Multiple mode.

6.1.5.23 Total Sectors Addressable in LBA

Mode

This field contains the number of sectors

addressable for the CompactFlash Memory Card

in LBA mode only.

CompactFlash Memory Card Product Manual

6.1.6 Idle - 97H, E3H

Bit -> 7 6 543210

Command (7) E3H or 97H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) Timer Count (5 msec increments)

Feature (1) X

This command causes the CompactFlash Memory

Card to set BSY, enter the Idle (Read) mode, clear

BSY and generate an interrupt. If the sector count

is non-zero, it is interpreted as a timer count with

each count being 5 milliseconds and the automatic

power down mode is enabled. If the sector count i s

zero, the automatic power down mode is disabled.

Note that this time base (5 msec) is different from

the ATA specification.

6.1.7 Idle Immediate - 95H, E1H

Bit -> 7 6 543210

Command (7) E1H or 95H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command causes the CompactFlash Memory

Card to set BSY, enter the Idle (Read) mode, clear

BSY and generate an interrupt.

CompactFlash Memory Card Product Manual

6.1.8 Initialize Drive Parameters - 91H

Bit -> 7 6 543210

Command (7) 91H

C/D/H (6) X 0 X Drive Max Head (no. of heads-1)

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) Number of Sectors

Feature (1) X

This command enables the host to set the number

of sectors per track and the number of heads per

cylinder. Only the Sector Count and th e

Card/Drive/Head registers are used by this

command.

Note: SanDisk recommends NOT using this command

in any system because DOS determines the

offset to the Boot Record based on the number

of heads and sectors per track. If a

CompactFlash Memory Card is “Formatted” with

one head and sector per track value, the same

CompactFlash Card will not operate correctly

with DOS configured with another heads and

sectors per track value.

6.1.9 Read Buffer - E4H

Bit -> 7 6 543210

Command (7) E4H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

The Read Buffer command enables the host to

read the current contents of the CompactFlash

Memory CardÕs sector buffer. This command h a s

the same protocol as the Read Sector(s) command.

CompactFlash Memory Card Product Manual

6.1.10 Read Multiple - C4H

Bit -> 7 6 543210

Command (7) C4H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) Sector Count

Feature (1) X

Note: The current revision of the CompactFlash Memory Card only supports a block count of 1 as indicated in the

Identify Drive Information command. This command is provided for compatibility with future products which

may support a larger block count.

The Read Multiple command performs similarly

to the Read Sectors command. Interrupts are not

generated on every sector, but on the transfer of a

block which contains the number of sectors defined

by a Set Multiple command.

Command execution is identical to the Read

Sectors operation except that the number of sectors

defined by a Set Multiple command is transferred

without intervening interrupts. DRQ qualification

of the transfer is required only at the start of the

data block, not on each sector.

The block count of sectors to be transferred without

intervening interrupts is programmed by the Set

Multiple Mode command, which must be executed

prior to the Read Multiple command. When the

Read Multiple command is issued, the Sector

Count Register contains the number of sectors (not

the number of blocks or the block count) requested.

If the number of requested sectors is not evenly

divisible by the block count, as many full blocks as

possible are transferred, followed by a final,

partial block transfer. The partial block transfer

is for n sectors, where

n = (sector count) - modulo (block count).

If the Read Multiple command is attempted

before the Set Multiple Mode command has been

executed or when Read Multiple commands are

disabled, the Read Multiple operation is rejected

with an Aborted Command error. Disk errors

encountered during Read Multiple commands are

posted at the beginning of the block or partial

block transfer, but DRQ is still set and the data

transfer will take place as it normally would,

including transfer of corrupted data, if any.

Interrupts are generated when DRQ is set at the

beginning of each block or partial block. The error

reporting is the same as that on a Read Sector(s)

Command. This command reads from 1 to 256

sectors as specified in the Sector Count register. A

sector count of 0 requests 256 sectors. The transfer

begins at the sector specified in the Sector Number

At command completion, the Command Block

Registers contain the cylinder, head and sector

number of the last sector read.

If an error occurs, the read terminates at the sector

where the error occurred. The Command Block

Registers contain the cylinder, head and sector

number of the sector where the error occurred. The

flawed data is pending in the sector buffer.

Subsequent blocks or partial blocks are transferred

only if the error was a correctable data error. All

other errors cause the command to stop after

transfer of the block which contained the error.

CompactFlash Memory Card Product Manual

6.1.11 Read Long Sector - 22H, 23H

Bit -> 7 6 543210

Command (7) 22H or 23H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) X

Feature (1) X

The Read Long command performs similarly to the

Read Sector(s) command except that it returns 516

bytes of data instead of 512 bytes. During a Read

Long command, the CompactFlash Memory Card

does not check the ECC bytes to determine if there

has been a data error. Only single sector read long

operations are supported. The transfer consists of

512 bytes of data transferred in word mode

followed by 4 bytes of random data transferred in

byte mode. Random data is returned instead of

ECC bytes because of the nature of the ECC system

used. This command has the same protocol as t h e

Read Sector(s) command.

6.1.12 Read Sector(s) - 20H, 21H

Bit -> 7 6 543210

Command (7) 20H or 21H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) Sector Count

Feature (1) X

This command reads from 1 to 256 sectors as

specified in the Sector Count register. A sector

count of 0 requests 256 sectors. The transfer begins

at the sector specified in the Sector Number

each sector of data (except the last one) has been

read by the host, the CompactFlash Memory Card

sets BSY, puts the sector of data in the buffer, sets

DRQ, clears BSY, and generates an interrupt. The

host then reads the 512 bytes of data from th e

buffer.

At command completion, the Command Block

Registers contain the cylinder, head and sector

number of the last sector read. If an error occurs,

the read terminates at the sector where the error

occurred. The Command Block Registers contain

the cylinder, head, and sector number of the sector

where the error occurred. The flawed data is

pending in the sector buffer.

CompactFlash Memory Card Product Manual

6.1.13 Read Verify Sector(s) - 40H, 41H

Bit -> 7 6 543210

Command (7) 40H or 41H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) Sector Count

Feature (1) X

This command is identical to the Read Sectors

command, except that DRQ is never set and no

data is transferred to the host. When the

command is accepted, the CompactFlash Memory

Card sets BSY.

When the requested sectors have been verified,

the CompactFlash Memory Card clears BSY and

generates an interrupt. Upon command completion,

the Command Block Registers contain the

cylinder, head, and sector number of the last sector

verified.

If an error occurs, the verify terminates at the

sector where the error occurs. The Command Block

Registers contain the cylinder, head and sector

number of the sector where the error occurred. The

Sector Count Register contains the number of

sectors not yet verified.

6.1.14 Recalibrate - 1XH

Bit -> 7 6 543210

Command (7) 1XH

C/D/H (6) 1 LBA 1 Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command is effectively a NOP command to

the CompactFlash Memory Card and is provided

for compatibility purposes. After this command i s

executed the Cyl High and Cyl Low as well as the

Head number will be 0 and Sec Num will be 1 i f

LBA=0 and 0 if LBA=1 (i.e. the first block in LBA

is 0 while CHS mode the sector number starts

atÊ1).

CompactFlash Memory Card Product Manual

6.1.15 Request Sense - 03H

Bit -> 7 6 543210

Command (7) 03H

C/D/H (6) 1 X 1 Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command requests an extended error code

after a command ends with an error. Table 6-4

defines the valid extended error codes for the

CompactFlash Memory Card Series product. The

extended error code is returned to the host in the

Error Register. This command must be the next

command issued to the CompactFlash Card

following the command which returned an error.

Table 6-4 Extended Error Codes

Extended Error Code Description

00h No Error Detected

01h Self Test OK (No Error)

09h Miscellaneous Error

20h Invalid Command

21h Invalid Address (Requested Head or Sector Invalid)

2Fh Address Overflow (Address Too Large)

35h, 36h Supply or generated Voltage Out of Tolerance

11h Uncorrectable ECC Error

18h Corrected ECC Error

05h, 30-34h, 37h, 3Eh Self Test or Diagnostic Failed

10h, 14h ID Not Found

3Ah Spare Sectors Exhausted

1Fh Data Transfer Error / Aborted Command

0Ch, 38H, 3Bh, 3Ch, 3Fh Corrupted Media Format

03h Write / Erase Failed

CompactFlash Memory Card Product Manual

6.1.16 Seek - 7XH

Bit -> 7 6 543210

Command (7) 7XH

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) X (LBA 7-0)

Sec Cnt (2) X

Feature (1) X

This command is effectively a NOP command to

the CompactFlash Memory Card although it does

perform a range check of cylinder and head or

LBA address and returns an error if the address is

out of range.

6.1.17 Set Features - EFH

Bit -> 7 6 543210

Command (7) EFH

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) Config

Feature (1) Feature

This command is used by the host to establish or

select certain features. Table 6-5 defines a l l

features that are supported. Please note that the

9AH feature is unique to the CompactFlash

Memory Card and are not part of the ATA

Specification.

CompactFlash Memory Card Product Manual

Table 6-5 Features Supported

Feature Operation

01H Enable 8 bit data transfer.

55H Disable Read Look Ahead.

66H Disable Power on Reset (POR) establishment of defaults at Soft Reset.

69H Accepted for backward compatibility with the SDP Series but has no impact on the CF Memory Card.

81H Disable 8 bit data transfer.

96H Accepted for backward compatibility with the SDP Series but has no impact on the CF Memory Card.

9AH Set the host current source capability. Allows tradeoff between current drawn and read/write speed.

BBH 4 bytes of data apply on Read/Write Long commands.

CCH Enable Power on Reset (POR) establishment of defaults at Soft Reset.

Features 01H and 81H are used to enable and clear

8 bit data transfer mode. If the 01H feature com-

mand is issued, all data transfers will occur on the

low order D7-D0 data bus and the IOIS16 signal

will not be asserted for data register accesses.

Features 55H and BBH are the default features

for the CompactFlash Memory Card; thus, the

host does not have to issue this command with

these features unless it is necessary for

compatibility reasons.

The 9AH Feature is a CompactFlash Memory

Card unique option that provides a mechanism for

the host system to adjust how much current t h e

CompactFlash Card will use. The CompactFlash

Card reduces the current it draws by reducing its

operating frequency. This has the impact of also

reducing the performance of the CompactFlash

Card. The default for the CompactFlash Card

after a power on reset is to operate at the highest

performance and therefore the highest current

mode. However after a power on, t h e

CompactFlash Card will not draw more than its

minimum current as long as the host does not issue

any command which reads or writes to the flash

memory. This allows the host to issue the Set

Features command to set the desired power level

without exceeding the minimum requirement of

the CompactFlash Card.

To reduce the current the CompactFlash Memory

Card draws, the host issues the Set Features

command with the Feature register set to 9AH and

the Sector Count register (Config) set to a current

value which is equal to 4 mA times the value in

the Sector Count register. When this is done, t he

controller will utilize a look-up table to program

the controllerÕs frequency, microprocessorÕs speed

and flash clocks with an optimum value to

provide the highest performance without

exceeding the hostÕs current limit. For example, i f

a host can supply 75 mA of current to t he

CompactFlash Card, the Sector Count register

would be set to 75 divided by 4 (rounded down) or a

value of 18. The CompactFlash Card would then

automatically reduce its clock frequencies so that

it will not draw more than 75 mA (average, a t

nominal Vcc and room temperature) of current. I f

the host always wanted to operate at the lowest

possible current the Sector Count value should be

set to 1. The CompactFlash Card will then

operate at the lowest possible current (and also

the lowest performance).

At the completion of this command, the controller

will update the Cylinder Low register with the

controllerÕs minimum valid current value (i.e. the

minimum current with which the CompactFlash

Memory Card can operate) and the Cylinder High

the maximum current the CompactFlash Card

will draw at the highest performance level). The

controller will use its minimum value for any

Sector Count value which is less than its minimum

value. For example, if the Sector Count is set to 4

which is equivalent to 16 mA, the controller will

operate at the lowest possible power point but

will not reject the command. Similarly the

controller will use its maximum value for any

Sector Count value which is more than the

maximum current it can use.

There is no error associated with the 9AH feature.

Features 66H and CCH can be used to enable and

disable whether the Power On Reset (POR)

Defaults will be set when a soft reset occurs. The

default setting is to revert to the POR defaults

when a soft reset occurs. POR defaults the number

of heads and sectors along with 16 bit data

transfers and the read/write multiple block count.

CompactFlash Memory Card Product Manual

6.1.18 Set Multiple Mode - C6H

Bit -> 7 6 543210

Command (7) C6H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) Sector Count

Feature (1) X

This command enables the CompactFlash Card to

perform Read and Write Multiple operations and

establishes the block count for these commands.

The Sector Count Register is loaded with the

number of sectors per block. The current version of

the CompactFlash Card supports only a block size

of 1 sector per block. Future versions may support

larger block sizes. Upon receipt of the command,

the CompactFlash Card sets BSY to 1 and checks

the Sector Count Register.

If the Sector Count Register contains a valid value

and the block count is supported, the value is

loaded for all subsequent Read Multiple and

Write Multiple commands and execution of those

commands is enabled. If a block count is not

supported, an Aborted Command error is posted,

and Read Multiple and Write Multiple commands

are disabled. If the Sector Count Register contains

0 when the command is issued, Read and Write

Multiple commands are disabled. At power on, or

after a hardware or (unless disabled by a Set

Feature command) software reset, the default

mode is Read and Write Multiple disabled.

6.1.19 Set Sleep Mode- 99H, E6H

Bit -> 7 6 543210

Command (7) E6H or 99H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command causes the CompactFlash Memory

Card to set BSY, enter the Sleep mode, clear BSY

and generate an interrupt. Recovery from sleep

mode is accomplished by simply issuing another

command (a reset is permitted but not required).

Sleep mode is also entered when internal timers

expire so the host does not need to issue this

command except when it wishes to enter Sleep

mode immediately. The default value for the

read to sleep timer is 5 milliseconds. Note that

this time base (5 msec) is different from the ATA

Specification.

CompactFlash Memory Card Product Manual

6.1.20 Standby - 96H, E2H

Bit -> 7 6 543210

Command (7) E2H or 96H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command causes the CompactFlash Memory

Card to set BSY, enter the Sleep mode (which

corresponds to the ATA ÒStandbyÓ Mode), clear

BSY and return the interrupt immediately.

Recovery from sleep mode is accomplished by

simply issuing another command (a reset is not

required).

6.1.21 Standby Immediate - 94H, E0H

Bit -> 7 6 543210

Command (7) E0H or 94H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

This command causes the CompactFlash Memory

Card to set BSY, enter the Sleep mode (which

corresponds to the ATA ÒStandbyÓ Mode), clear

BSY and return the interrupt immediately.

Recovery from sleep mode is accomplished by

simply issuing another command (a reset is not

required).

CompactFlash Memory Card Product Manual

6.1.22 Translate Sector - 87H

Bit -> 7 6 543210

Command (7) 87H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) X

Feature (1) X

This command allows the host a method of

determining the exact number of times a user sector

has been erased and programmed. The controller

responds with a 512 byte buffer of information on

the desired cylinder, head and sector with the

actual Logical Address along with the Hot Count

for that sector. Table 6-6 represents th e

information in the buffer. Please note that this

command is unique to the SanDisk CompactFlash

Memory Card.

Table 6-6 Translate Sector Information

Address Information

00h-01h Cylinder MSB (00), Cylinder LSB (01)

02h Head

03h Sector

04h-06h LBA MSB (04) - LSB (06)

07h-12h Reserved

13h Erased Flag (FFh) = Erased 00h = Not Erased

14h - 17h Reserved

18h-1Ah Hot Count MSB (18) - LSB (1A)

1Bh-1FFh Reserved

CompactFlash Memory Card Product Manual

6.1.23 Wear Level - F5H

Bit -> 7 6 543210

Command (7) F5H

C/D/H (6) X X X Drive Flag

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) Completion Status

Feature (1) X

This command is effectively a NOP command and

only implemented for backward compatability

with earlier SanDisk SDP series products. The

Sector Count Register will always be returned

with an 00H indicating Wear Level is not needed.

6.1.24 Write Buffer - E8H

Bit -> 7 6 543210

Command (7) E8H

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

The Write Buffer command enables the host to

overwrite contents of the CompactFlash Memory

CardÕs sector buffer with any data pattern

desired. This command has the same protocol as

the Write Sector(s) command and transfers 512

bytes.

CompactFlash Memory Card Product Manual

6.1.25 Write Long Sector - 32H, 33H

Bit -> 7 6 543210

Command (7) 32H or 33H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) X

Feature (1) X

This command is provided for compatibility

purposes and is similar to the Write Sector(s)

command except that it writes 516 bytes instead of

512 bytes. Only single sector Write Long

operations are supported. The transfer consists of

512 bytes of data transferred in word mode

followed by 4 bytes of ECC transferred in byte

mode. Because of the unique nature of the solid-

state CompactFlash Memory Card, the four bytes

of ECC transferred by the host cannot be used by

the CompactFlash Card. The CompactFlash Card

discards these four bytes and writes the sector

with valid ECC fields. This command has the

same protocol as the Write Sector(s) command.

6.1.26 Write Multiple Command - C5H

Bit -> 7 6 543210

Command (7) C5H

C/D/H (6) X LBA X Drive Head

Cyl High (5) Cylinder High

Cyl Low (4) Cylinder Low

Sec Num (3) Sector Number

Sec Cnt (2) Sector Count

Feature (1) X

Note: The current revision of the CompactFlash

Memory Card only supports a block count of 1

as indicated in the Identify Drive Command

information. This command is provided for

compatibility with future products which may

support a larger block count.

This command is similar to the Write Sectors

command. The CompactFlash Memory Card sets

BSY within 400 nsec of accepting the command.

Interrupts are not presented on each sector but on

the transfer of a block which contains the number

of sectors defined by Set Multiple. Command

execution is identical to the Write Sectors

operation except that the number of sectors

defined by the Set Multiple command is

transferred without intervening interrupts.

DRQ qualification of the transfer is required only

at the start of the data block, not on each sector.

The block count of sectors to be transferred without

intervening interrupts is programmed by the Set

Multiple Mode command, which must be executed

prior to the Write Multiple command.

CompactFlash Memory Card Product Manual

When the Write Multiple command is issued, t h e

Sector Count Register contains the number of

sectors (not the number of blocks or the block count)

requested. If the number of requested sectors is not

evenly divisible by the sector/block, as many full

blocks as possible are transferred, followed by a

final, partial block transfer. The partial block

transfer is for n sectors, where:

n = remainder (sector count/block count).

If the Write Multiple command is attempted

before the Set Multiple Mode command has been

executed or when Write Multiple commands are

disabled, the Write Multiple operation will be

rejected with an aborted command error.

Errors encountered during Write Multiple

commands are posted after the attempted writes

of the block or partial block transferred. The

Write command ends with the sector in error, even

if it is in the middle of a block. Subsequent blocks

are not transferred in the event of an error.

Interrupts are generated when DRQ is set at the

beginning of each block or partial block.

The Command Block Registers contain the

cylinder, head and sector number of the sector

where the error occurred and the Sector Count

that need to be transferred for successful

completion of the command e.g. each block has 4

sectors, a request for 8 sectors is issued and an error

occurs on the third sector. The Sector Count

third sector.

6.1.27 Write Multiple without Erase - CDH

Bit -> 7 6 543210

Command (7) CDH

C/D/H (6) X LBA X Drive Head

Cyl High (5) Cylinder High

Cyl Low (4) Cylinder Low

Sec Num (3) Sector Number

Sec Cnt (2) Sector Count

Feature (1) X

This command is similar to the Write Multiple

command with the exception that an implied

erase before write operation is not performed. The

sectors should be pre-erased with the Erase

Sector(s) command before this command is issued.

Refer to section 1.8.5 Using the Erase Sector and

Write without Erase Commands and to section

6.1.29 Write Sector(s) Without Erase - 38H for an

expanded definition of the Write Sector(s)

without Erase command.

CompactFlash Memory Card Product Manual

6.1.28 Write Sector(s) - 30H, 31H

Bit -> 7 6 543210

Command (7) 30H or 31H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) Sector Count

Feature (1) X

This command writes from 1 to 256 sectors as

specified in the Sector Count Register. A sector

count of zero requests 256 sectors. The transfer

begins at the sector specified in the Sector Number

CompactFlash Memory Card sets BSY, then sets

DRQ and clears BSY, then waits for the host to

fill the sector buffer with the data to be written.

No interrupt is generated to start the first buffer

fill operation. No data should be transferred by

the host until BSY has been cleared by the host.

For multiple sectors, after the first sector of data

is in the buffer, BSY will be set and DRQ will be

cleared. After the next buffer is ready for data,

BSY is cleared, DRQ is set and an interrupt is

generated. When the final sector of data is

transferred, BSY is set and DRQ is cleared. It will

remain in this state until the command i s

completed at which time BSY is cleared and an

interrupt is generated.

If an error occurs during a write of more than one

sector, writing terminates at the sector where the

error occurs. The Command Block Registers contain

the cylinder, head and sector number of the sector

where the error occurred. The host may then read

the command block to determine what error has

occurred, and on which sector.

CompactFlash Memory Card Product Manual

6.1.29 Write Sector(s) without Erase - 38H

Bit -> 7 6 543210

Command (7) 38H

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) Sector Count

Feature (1) X

This command is similar to the Write Sector(s)

command with the exception that an implied

erase before write operation is not performed. This

command has the same protocol as the Write

Sector(s) command. The sectors should be pre-

erased with the Erase Sector(s) command before

this command is issued. If the sector is not pre-

erased with the Erase Sector(s) command, a

normal write sector operation will occur.

This command is much faster than a Write

Sector(s) command if the sector is pre-erased. The

overall performance of the combined Erase

Sector(s) command along with the Write Sector(s)

without Erase command is less than the normal

Write Sector(s) command but has the advantage

of splitting up the overall time so the write only

portion is more than two times the transfer rate of

the normal Write Sector(s) command. Refer to

section 1.8.5 Using the Erase Sector and Write

without Erase Commands for an expanded

definition of these commands.

CompactFlash Memory Card Product Manual

6.1.30 Write Verify Sector(s) - 3CH

Bit -> 7 6 543210

Command (7) 3CH

C/D/H (6) 1 LBA 1 Drive Head (LBA 27-24)

Cyl High (5) Cylinder High (LBA 23-16)

Cyl Low (4) Cylinder Low (LBA 15-8)

Sec Num (3) Sector Number (LBA 7-0)

Sec Cnt (2) Sector Count

Feature (1) X

This command writes from 1 to 256 sectors as

specified in the Sector Count Register. A sector

count of zero requests 256 sectors. The transfer

begins at the sector specified in the Sector Number

CompactFlash Memory Card sets BSY, then sets

DRQ and clears BSY, then waits for the host to

fill the sector buffer with the data to be written.

No interrupt is generated to start the first buffer

fill operation. No data should be transferred by

the host until BSY has been cleared by the host.

For multiple sectors, after the first sector of data

is in the buffer, BSY will be set and DRQ will be

cleared. After the next buffer is ready for data,

BSY is cleared, DRQ is set and an interrupt is

generated. When the final sector of data is

transferred, BSY is set and DRQ is cleared. It will

remain in this state until the command i s

completed at which time BSY is cleared and an

interrupt is generated.

If an error occurs during a write of more than one

sector, writing terminates at the sector where the

error occurs. The Command Block Registers contain

the cylinder, head and sector number of the sector

where the error occurred. The host may then read

the command block to determine what error has

occurred, and on which sector.

CompactFlash Memory Card Product Manual

6.2 Error Posting

The following table summarizes the valid status and error value for all the ATA Command set.

Table 6-7 Error and Status Register

Error Register Status Register

Command BBK UNC IDNF ABRT AMNF DRDY DWF DSC CORR ERR

Check Power Mode V V V V V

Execute Drive Diagnostic* V V V

Erase Sector(s) V V V VVVV V

Format Track V V VVVV V

Identify Drive V V V V V

Idle V V V V V

Idle Immediate V V V V V

Initialize Drive Parameters V V V

Read Buffer V V V V V

Read Multiple V V V V VVVV VV

Read Long Sector V V V VVVV V

Read Sector(s) V V V V VVVV VV

Read Verify Sectors V V V V VVVV VV

Recalibrate V V V V V

Request Sense V V V V

Seek V V V V V V

Set Features V V V V V

Set Multiple Mode V V V V V

Set Sleep Mode V V V V V

Stand By V V V V V

Stand By Immediate V V V V V

Translate Sector V V V VVVV V

Wear Level V V V V VVVV V

Write Buffer V V V V V

Write Long Sector V V V VVVV V

Write Multiple V V V VVVV V

Write Multiple w/o Erase V V V VVVV V

Write Sector(s) V V V VVVV V

Write Sector(s) w/o Erase V V V VVVV V

Write Verify Sector(s) V V V VVVV V

Invalid Command Code V V V V V

V = valid on this command * See Table 6-2

CompactFlash Memory Card Product Manual

7.0 CIS Description

This section describes the Card Information Structure (CIS) for the CompactFlash Memory Card.

CompactFlash Memory Card Product Manual

Attribute

Offset Data 76543210Description of Contents CIS Function

000h 01h CISTPL_DEVICE Device Info Tuple Tuple Code

002h 04h Link is 4 bytes Link to next tuple

004h DFh Dev ID Type

Dh = I/O W

1Speed

7h = ext I/O Device, No WPS, ext

speed Device ID, WPS, Speed

006h 72h X Spd Mantis

Eh == 7.0 Spd Expo

2h=100

nsec

700 nsec if no wait Extended Speed

008h 01h 1x 2K units 2 Kilobytes of Address Space Device Size

00Ah FFh List End Marker End of Devices End Marker

00Ch 1Ch CISTPL_DEVICE_OC Other Conditions Info Tuple Tuple Code

00Eh 04h Link is 4 bytes Link to next tuple

010h 03h Reserved

Conditions:

3V operation is allowed, and

WAIT is used

3 Volts Operation, Wait

Function

012h D9h Dev ID Type

Dh = I/O W

1Speed

01h=250ns

I/O Device, No WPS, Speed is

250 nsec with Wait Device ID, WPS, Speed

014h 01h 1 x 2K units 2Kilobytes of Address Space Device Size

016h FFh List End Marker End of Devices End Marker

018h 18h CISTPL_JEDEC_C JEDEC ID Common Mem Tuple Code

01Ah 02h Link is 2 bytes Link Length

01Ch DFh PCMCIA JEDEC Manufacturer's

ID First Byte of JEDEC ID for

SanDisk PC Card-ATA 12V Byte 1, JEDEC ID of Device

(0-2K)

01Eh 01h PCMCIA Code for

PC Card-ATA

No Vpp Required

Second Byte of JEDEC ID Byte 2, JEDEC ID

020h 20h CISTPL_MANFID Manufacturer's ID Tuple Tuple Code

022h 04h Link is 4 bytes Link Length

024h 45h Low Byte of PCMCIA

Manufacturer's Code SanDisk JEDEC

Manufacturer's ID Low Byte of PCMCIA Mfg

026h 00h High Byte of PCMCIA

Manufacturer's Code Code of 0 because other byte

is JEDEC 1 byte

Manufacturer’s ID

High Byte of PCMCIA Mfg

028h 01h Low Byte of Product Code SanDisk Code for SDP Series Low Byte Product Code

02Ah 04h High Byte of Product Code SanDisk Code for PC CARD

ATA High Byte Product Code

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

02Ch 15h CISTPL_VER_1 Level 1 version / product info Tuple Code

02Eh 17h Link to next tuple is 23 bytes Link Length

030h 04h TPPLV1_MAJOR PCMCIA 2.0 /JEIDA 4.1 Major Version

032h 01h TPPLV1_MINOR PCMCIA 2.0 /JEIDA 4.1 Minor Version

034h 53h ASCII Manufacturer String ' S ' String 1

036h 75h 'u'

038h 6Eh 'n'

03Ah 44h 'D'

03Ch 69h 'i'

03Eh 73h 's'

040h 6Bh 'k'

042h 00h End of Manufacturer String Null terminator

044h 53h ASCII Product Name String 'S' Info String 2

046h 44h 'D'

048h 50h 'P'

04Ah 00h End of Product Name String Null terminator

04Ch 35h '5' Info String 3

04Eh 2Fh '/'

050h 33h '3'

052h 20h ' '

054h 30h SanDisk Card CIS Revision

Number '0'

056h 2Eh '.'

058h 36h '6'

05Ah 00h End of CIS Revision Number Null terminator

05Ch FFh End of List Marker FFh List terminator No Info String 4

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

05Eh 80h CISTPL_VEND_SPECIF_80 SanDisk Parameters Tuple Tuple Code

060h 03h (Field Bytes 3-4 taken as 0) Link length is 3 byte Link to next tuple and length

of info in this tuple

062h 14h W

No Wear Level & NO Vpp

W:No Wear Level

12:Vpp Not used on Write

NI:-INPACK connected

PP:Programmable Power

PDNA:Pwr Down Not Abort--

Cmd

RIA:RBsy, ATBsy connected

RIR:RBsy Inhibited at Reset

SP:No Security Present

This definition applies only to

cards with

Manufacturer's ID tuple 1st 3

bytes 45 00 01.

SanDisk Fields,

1 to 4 bytes

limited by link

length.

064h 08h R

R8:8 bit ROM present

TAR:Temp Bsy on AT Reset

TPR:Temp Bsy on PCMCIA --

Reset

E:Erase Ahead Available

R:Reserved, 0 for now

This definition applies only to

card with

Manufacturer's ID tuple 1st 3

bytes 45 00 01.

SanDisk Fields,

1 to 4 bytes

limited by link

length.

066h 00h For Specific platform use

Only

068h 21h CISTPL_FUNCID Function ID Tuple Tuple Code

06Ah 02h Link length is 2 bytes Link to next tuple

06Ch 04h Function Type Code Disk Function Function Code

06Eh 01h R

Attempt installation at Post

P:Install at POST

R:Reserved(0)

070h 22h CISTPL_FUNCE Function Extension Tuple Tuple Code

072h 02h Link length is 2 bytes Link to next tuple

074h 01h Disk Function Extension Tuple

Type Extension tuple describes the

Interface Protocol Extension Tuple Type for

Disk

076h 01h Interface Type Code PC Card-ATA Interface Extension Info

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

078h 22h CISTPL_FUNCE Function Extension tuple Tuple Code

07Ah 03h This tuple has 3 info bytes Link Length

07Ch 02h Disk Function Extension Tuple

Type Basic PCMCIA-ATA

Extension tuple Extension Tuple Type for Disk

07Eh 0Ch R

No Vpp, Silicon Drive with

Unique Manufacturer / Serial

Number combined string

V=0:No Vpp Required

V=1:Vpp on Modify Media

V=2:Vpp on any operation

V=3:Vpp continuous

S:Silicon, else Rotating

U:ID Drive Mfg/SN Unique

Basic ATA Option Parameters

080h 0Fh R

All power down modes and

power commands are not

needed to minimize power.

P0:Sleep Mode Supported

P1:Standby Mode Supported

P2:Idle Mode Supported

P3:Drive Auto Power Control

N:Some Config Excludes 3X7

E:Index Bit is Emulated

I:Twin -IOis16 Data Reg Only

Extended ATA Option

Parameters

082h 1Ah CISTPL_CONF Configuration Tuple Tuple Code

084h 05h Link Length is 5 bytes Link to next tuple

086h 01h RFS

RMS

RAS

Size of Reserved Field is 0

bytes, Size of Register Mask

is 1 Byte, Size of Config Base

Address is 2 bytes

RFS:Bytes in Reserved Field

RMS:Bytes in Reg Mask-1

RAS:Bytes in Base Addr-1

Size of fields byte (TPCC_SZ)

088h 07h TPCC_LAST Entry with Config Index of

07h is final entry in table Last entry of configuration

table

08Ah 00h TPCC_RADR (lsb) Configuration Registers are Location of

08Ch 02h TPCC_RADR (msb) located at 200h in Reg

Space. Config Registers

08Eh 0Fh R

First 4 Configuration

Registers are present

I:Configuration Index

C:Configuration and Status

P:Pin Replacement

S:Socket and Copy

R:Reserved for future use

TPCC_RMSK

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

090h 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

092h 0Bh Link to next tuple is 11

bytes. Also limits size of

this tuple to 13 bytes.

Link to next tuple

094h C0h I

Configuration Index

Memory Mapped I/O

Configuration

Configuration Index for this

entry is 0. Interface Byte

follows this byte.

Default Configuration, so is

not dependent on previous

Default Configuration.

D:Default Configuration

I:Interface Byte Follows

TPCE_INDX

096h C0h W

Interface Type

Memory Only Interface(0),

Bvd's and wProt not used,

Ready/-Busy and Wait for

memory cycles active.

B:Battery Volt Detects Used

P:Write Protect Used

R:Ready/-Busy Used

W:Wait Used for Memory

Cycles

TPCE_IF

098h A1h M

Vcc only Power; No Timing,

I/O, or IRQ;

2 Byte Mem Space Length;

Misc Entry Present

P:Power info type

T:Timing info present

IO:I/O port info present

IR:Interrupt info present

MS:Mem space info type

M:Misc info byte(s) present

TPCE_FS

09Ah 27h R

Nominal Voltage Follows

NV:Nominal Voltage

LV:Mimimum Voltage

HB:Maximum Voltage

SI:Static Current

AI:Average Current

PI:Peak Current

DI:Power Down Current

Power Parameters for Vcc

09Ch 55h X

0Mantissa

Ah = 5.0 Exponent

5h = 1V Vcc Nominal is 5 Volts Vcc Nominal Value

09Eh 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 1V Vcc Nominal is 4.5 Volts Vcc Minimum Value

0A0h 5Dh X

0Mantissa

Bh = 5.5 Exponent

5h = 1V Vcc Nominal is 5.5 Volts Vcc Maximum Value

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

0A2h 75h X

0Mantissa

Eh = 8.0 Exponent

5h = 10 Max Average Current over 10

msec is 80 mA Max Average Current

0A4h 08h Length in 256 bytes pages (lsb) Length of Mem Space is

2 KB TPCE_MS

Length LSB

0A6h 00h Length in 256 bytes pages (msb) Start at 0 on card TPCE_MS

Length MSB

0A8h 21h X

Power-Down, and Twin Card.

T:Twin Cards Allowed

A:Audio Supported

RO:Read Only Mode

P:Power Down Supported

R:Reserved

X:More Misc Fields Bytes

TPCE_MI

0AAh 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

0ACh 06h Link to next tuple is 6 bytes.

Also limits size of this tuple

to 8 bytes.

Link to next tuple

0AEh 00h I

Configuration Index

Memory mapped I/O 3.3V

configuration. TPCE_INDX

0B0h 01h M

P:Power info type TPCE_FS

0B2h 21h R

PI:Peak Current

NV:Nominal Operation Supply

Voltage

TPCE_PD

0B4h B5h X

1Mantissa

6h = 3.0 Exponent

5h = 1 Nominal Operation Supply

Voltage = 3.0V Nominal Operation Supply

Voltage

0B6h 1Eh X

01Eh +.30 Nominal Operation Supply

Voltage Extension Byte

0B8h 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 10 Max Average Current over 10

msec is 45mA Max Average Current

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

0BAh 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

0BCh 0Dh Link to next tuple is 13 bytes.

Also limits size of this tuple to 15

bytes.

Link to next tuple

0BEh C1h I

Configuration Index

I/O Mapped Contiguous

16 registers

configuration

Configuration Index for this

entry is 1. Interface Byte

follows this byte.

Default Configuration, so is not

dependent on previous Default

Configuration.

D:Default Configuration

I:Interface Byte Follows

TPCE_INDX

0C0h 41h W

Interface Type

I/O Interface(1), Bvd's and

wProt not used; Ready/-Busy

active but Wait not used for

memory cycles.

B:Battery Volt Detects Used

P:Write Protect Used

R:Ready/-Busy Used

W:Wait Used for Memory

Cycles

TPCE_IF

0C2h 99h M

Vcc Only Power Descriptors;

No Timing; I/O and IRQ

present; No Mem Space; Misc

Entry Present

P:Power info type

T:Timing info present

IO:I/O port info present

IR:Interrupt info present

MS:Mem space info type

M:Misc info byte(s) present

TPCE_FS

0C4h 27h R

Nominal Voltage Follows

NV:Nominal Voltage

LV:Mimimum Voltage

HB:Maximum Voltage

SI:Static Current

AI:Average Current

PI:Peak Current

DI:Power Down Current

Power Parameters for Vcc

0C6h 55h X

0Mantissa

Ah = 5.0 Exponent

5h = 1V Vcc Nominal is 5Volts Vcc Nominal Value

0C8h 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 1V Vcc Nominal is 4.5 Volts Vcc Minimum Value

0CAh 5Dh X

0Mantissa

Bh = 5.5 Exponent

5h = 1V Vcc Nominal is 5.5Volts Vcc Maximum Value

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 543210 Description of Contents CIS Function

0CCh 75h X

0Mantissa

Eh = 8.0 Exponent

5h = 10 Max Average Current over 10

msec is 80 mA Max Average Current

0CEh 64h R

IO AddeLines

Supports both 8 and 16 bit I/O

hosts. 4 Address lines and no

range so 16 registers and

host must do all selection

decoding.

IO AddrLines:#lines decoded

E:Eight bit only hosts

supported

S:Sixteen bit hosts supported

R:Range Follows

TPCE_IO

0D0h F0h S

IRQ Sharing Logic Active in

Card Control & Status

Mode Interrupts supported,

Recommended IRQ's any of 0

through 15(F)

S:Share Logic Active

P:Pulse Mode IRQ Supported

L:Level Mode IRQ Supported

M:Bit Mask of IRQs Present

V:Vendor Unique IRQ

B:Bus Error IRQ

I:IO Check IRQ

N:Non-Maskable IRQ

TPCE_IR

0D2h FFh 7

IRQ Levels to be routed 0 - 15

recommended. TPCE_IR

Mask Extension

Byte 1

0D4h FFh F

Recommended routing to any

"normal, maskable" IRQ. TPCE_IR

Mask Extension

Byte 2

0D6h 21h X

Power-Down, and Twin Card.

T:Twin Cards Allowed

A:Audio Supported

RO:Read Only Mode

P:Power Down Supported

R:Reserved

X:More Misc Fields Bytes

TPCE_MI

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 543210 Description of

Contents CIS Function

0D8h 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

0DAh 06h Link to next tuple is 6

bytes. Also limits size of

this tuple to 8 bytes.

Link to next tuple

0DCh 01h I

Configuration Index

I/O mapped contiguous 16

3.3V configuration TPCE_INDX

0DEh 01h M

P:Power info type TPCE_FS

0E0h 21h R

PI:Peak Current

NV:Nominal Operation

Supply Voltage

Power Parameters for Vcc

0E2h B5h X

1Mantissa

6h = 3.0 Exponent

5h = 1 Nominal Operation Supply

Voltage = 3.0V Nominal Operation Supply

Voltage

0E4h 1Eh X

01Eh +.30 Nominal Operation Supply

Voltage

Extension Byte

0E6h 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 10 Max Average Current over

10 msec is 45 mA Max Average Current

0E8h 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

0EAh 12h Link to next tuple is 18

bytes. Also limits size of

this tuple to 20 bytes.

Link to next tuple

0ECh C2h I

Configuration Index

AT Fixed Disk

Primary I/O Address

Configuration

Configuration Index for

this entry is 2. Interface

Byte follows this byte.

Default Configuration

TPCE_INDX

0EEh 41h W

Interface Type

I/O Interface(1), Bvd's and

wProt not used; Ready/-

Busy active but Wait not

used for memory cycles.

B:Battery Volt Detects

Used

P:Write Protect Used

R:Ready/-Busy Used

W:Wait Used for Memory

Cycles

TPCE_IF

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

0F0h 99h M

Vcc Only Power

Description; No Timing; I/O

and IRQ present; No Mem

Space; Misc Entry present

P:Power info type

T:Timing info present

IO:I/O port info present

IR:Interrupt info present

MS:Mem space info type

M:Misc info byte(s) present

TPCE_FS

0F2h 27h R

Nominal Voltage Follows

NV:Nominal Voltage

LV:Mimimum Voltage

HB:Maximum Voltage

SI:Static Current

AI:Average Current

PI:Peak Current

DI:Power Down Current

Power Parameters for Vcc

0F4h 55h X

0Mantissa

Ah = 5.0 Exponent

5h = 1V Vcc Nominal is 5Volts Vcc Nominal Value

0F6h 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 1V Vcc Nominal is 4.5Volts Vcc Minimum Value

0F8h 5Dh X

0Mantissa

Bh = 5.5 Exponent

5h = 1V Vcc Nominal is 5.5Volts Vcc Maximum Value

0FAh 75h X

0Mantissa

Eh = 8.0 Exponent

5h = 10 Max Average Current over 10

msec is 80 mA Max Average Current

0FCh EAh R

IO AddeLines

Ah = 10

Supports both 8 and 16 bit

I/O hosts. 10 Address lines

with range so card will

respond only to indicated

(1F0-1F7, 3F6-3F7) on A9

through A0 for I/O cycles. IO

AddrLines:#lines decoded

E:Eight bit only hosts

supported

S:Sixteen bit hosts

supported

R:Range Follows

TPCE_IO

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

0FEh 61h LS

N Ranges - 1

Number of Ranges is 2; Size

of each address is 2 bytes;

Size of each length is 1 byte.

AS:Size of Addresses

0:No Address Present

1:1Byte (8 bit) Addresses

2:2Byte (16 bit) Addresses

3:4Byte (32 bit) Addresses

LS:Size of length

0:No Lengths Present

1:1Byte (8 bit) Lengths

2:2Byte (16 bit) Lengths

3:4Byte (32 bit) Lengths

I/O Range Format Description

100h F0h 1st I/O Base Address (lsb) First I/O Range base is

102h 01h 1st I/O Base Address (msb) 1F0h

104h 07h 1st I/O Range Length - 1 8 bytes total ==> 1F0-1F7h I/O Length - 1

106h F6h 2nd I/O Base Address (lsb) 2nd I/O Range base is

108h 03h 2nd I/O Base Address (msb) 3F6h

10Ah 01h 2nd I/O Range Length - 1 2 bytes total ==> 3F6-3F7h I/O Length - 1

10Ch EEh S

Recommend

IRQ Level

Eh = 14

IRQ Sharing Logic Active in

Card Control & Status

Mode Interrupts supported,

Recommended IRQ's any of 0

through 15(F)

S:Share Logic Active

P:Pulse Mode IRQ Supported

L:Level Mode IRQ Supported

M:Bit Mask of IRQs Present

M=0 so bits 3-0 are single

level, binary encoded

TPCE_IR

10Eh 21h X

Power-Down, and Twin Card.

T:Twin Cards Allowed

A:Audio Supported

RO:Read Only Mode

P:Power Down Supported

R:Reserved

X:More Misc Fields Bytes

TPCE_MI

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 543210 Description of

Contents CIS Function

110h 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

112h 06h Link to next tuple is 6 bytes.

Also limits size of this tuple

to 8 bytes.

Link to next tuple

114h 02h I

Configuration Index

AT Fixed Disk Primary I/O

3.3V configuration TPCE_INDX

116h 01h M

P:Power info type TPCE_FS

118h 21h R

PI:Peak Current

NV:Nominal Operation

Supply Voltage

Power Parameters for Vcc

11Ah B5h X

1Mantissa

6h = 3.0 Exponent

5h = 1 Nominal Operation Supply

Voltage = 3.0V Nominal Operation Supply

Voltage

11Ch 1Eh X

01Eh +.30 Nominal Operation Supply

Voltage

Extension Byte

11Eh 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 10 Max Average Current over

10 msec is 45mA Max Average Current

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 5 43210Description of Contents CIS Function

120h 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

122h 12h Link to next tuple is 18 bytes.

Also limits size of this tuple to

20 bytes.

Link to next tuple

124h C3h I

Configuration Index

AT Fixed Disk

Secondary I/O Address

Configuration

Configuration Index for this

entry is 3. Interface Byte

follows this byte.

Default Configuration

TPCE_INDX

126h 41h W

Interface Type

I/O Interface(1), Bvd's and

wProt not used; Ready/-Busy

active but Wait not used for

memory cycles.

B:Battery Volt Detects Used

P:Write Protect Used

R:Ready/-Busy Used

W:Wait Used for Memory

Cycles

TPCE_IF

128h 99h M

Vcc Only Power Descriptors;

No Timing; I/O and IRQ

present; No Mem Space;

Misc Entry Present.

P:Power info type

T:Timing info present

IO:I/O port info present

IR:Interrupt info present

MS:Mem space info type

M:Misc info byte(s) present

TPCE_FS

12Ah 27h R

Nominal Voltage Follows

NV:Nominal Voltage

LV:Mimimum Voltage

HB:Maximum Voltage

SI:Static Current

AI:Average Current

PI:Peak Current

DI:Power Down Current

Power Parameters for Vcc

12Ch 55h X

0Mantissa

Ah = 5.0 Exponent

5h = 1V Vcc Nominal is 5Volts Vcc Nominal Value

12Eh 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 1V Vcc Nominal is 4.5Volts Vcc Minimum Value

130h 5Dh X

0Mantissa

Bh = 5.5 Exponent

5h = 1V Vcc Nominal is 5.5Volts Vcc Maximum Value

132h 75h X

0Mantissa

Eh = 1.0 Exponent

5h = 10 Max Average Current over 10

msec is 80 mA Max Average Current

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 543210 Description of Contents CIS Function

134h EAh R

IO AddeLines

Ah = 10

Supports both 8 and 16 bit

I/O hosts. 10 Address lines

with range so card will

respond only to indicated

(170-177, 376-377) on A9

through A0 for I/O cycles. IO

AddrLines:#lines decoded

E:Eight bit only hosts

supported

S:Sixteen bit hosts

supported

R:Range Follows

TPCE_IO

136h 61h LS

N Ranges - 1

Number of Ranges is 2; Size

of each address is 2 bytes;

Size of each length is 1 byte.

AS:Size of Addresses

0:No Address Present

1:1Byte (8 bit) Addresses

2:2Byte (16 bit) Addresses

3:4Byte (32 bit) Addresses

LS:Size of length

0:No Lengths Present

1:1Byte (8 bit) Lengths

2:2Byte (16 bit) Lengths

3:4Byte (32 bit) Lengths

I/O Range Format

Description

138h 70h 1st I/O Base Address (lsb) First I/O Range base is

13Ah 01h 1st I/O Base Address (msb) 170h

13Ch 07h 1st I/O Range Length - 1 8 bytes total ==> 170-177h I/O Length - 1

13Eh 76h 2nd I/O Base Address (lsb) 2nd I/O Range base is

140h 03h 2nd I/O Base Address (msb) 376h

142h 01h 2nd I/O Range Length - 1 2 bytes total ==> 376-377h I/O Length - 1

144h EEh S

Recommend

IRQ Level

Eh = 14

IRQ Sharing Logic Active in

Card Control & Status

Mode Interrupts supported,

Recommended IRQ's any of 0

through 15(F)

S:Share Logic Active

P:Pulse Mode IRQ Supported

L:Level Mode IRQ Supported

M:Bit Mask of IRQs Present

M=0 so bits 3-0 are single

level, binary encoded

TPCE_IR

CompactFlash Memory Card Product Manual

Attribute

Offset Data 7 6 543210 Description of

Contents CIS Function

146h 21h X

Power-Down, and Twin Card.

T:Twin Cards Allowed

A:Audio Supported

RO:Read Only Mode

P:Power Down Supported

R:Reserved

X:More Misc Fields Bytes

TPCE_MI

148h 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

14Ah 06h Link to next tuple is 6

bytes. Also limits size of

this tuple to 8 bytes.

Link to next tuple

14Ch 03h I

Configuration Index

AT Fixed Disk Secondary I/O

3.3V configuration TPCE_INDX

14Eh 01h M

P:Power info type TPCE_FS

150h 21h R

PI:Peak Current

NV:Nominal Operation

Supply Voltage

Power Parameters for Vcc

152h B5h X

1Mantissa

6h = 3.0 Exponent

5h = 1 Nominal Operation Supply

Voltage = 3.0V Nominal Operation Supply

Voltage

154h 1Eh X

01Eh +.30 Nominal Operation Supply

Voltage

Extension Byte

156h 4Dh X

0Mantissa

9h = 4.5 Exponent

5h = 10 Max Average Current over

10 msec is 45mA Max Average Current

158h 1Bh CISTPL_CE Configuration Entry Tuple Tuple Code

15Ah 04h Link to next tuple is 4 bytes. Link to next tuple

15Ch 07h I

Configuration Index

AT Fixed Disk Secondary I/O

3.3V configuration TPCE_INDX

15Eh 00h M

P:Power info type TPCE_FS

160h 028h SanDisk Code Reserved

162h 0D3h SanDisk Code Reserved

164h 014h CISTPL_NO_LINK Prevent Scan of Common

Memory Tuple Code

166h 000h No Bytes Following Link Length is 0 Bytes Link to next tuple

168h 0FFh End of Tuple Chain End of CIS Tuple Code

Ordering Information

and

Technical Support

Ordering Information and Technical Support

Ordering Information

To order SanDisk products directly from SanDisk, call 408-542-0595.

CompactFlash Memory Card

Model SDCFBX-YY-101

Where: X: I Industrial temperature grade

(blank) Standard temperature grade

YY: 4 4.0 MB

8 8.0 MB

10 10.4 MB

15 15.0 MB

16* 16.0 MB

20 20.0 MB

30 30.0 MB

32* 32.1 MB

40 40.1 MB

48 48.1 MB

64* 64.2 MB

80* 80.2 MB

96* 96.2 MB

CompactFlash Type II Model SDCF2B-160*

160.4 MB

*Preliminary information based on 128 MB technology.

SanDisk ImageMate™ CompactFlash Drive

The SanDisk ImageMate is an external parallel

port (SDDR-01) or USB (SDDR-05) CompactFlash

Card reader/writer for desktop computers. The

ImageMate can be used to transfer files between

CompactFlash Cards and computers. It is ideal for

moving pictures from a digital camera to your

desktop computer system.

For more information or to order the ImageMate,

call 408-542-0595.

CompactFlash Memory Card Evaluation Kit

The CompactFlash Memory Card Evaluation Kit

(Model SDCFEV-01) permits designers to quickly

and easily evaluate the CompactFlash Card.

The CompactFlash Memory Card Evaluation Kit

(Model SDCFEV-01) includes the following items:

Hardware

¥ Evaluation adapter board

¥ 4 MB CompactFlash Memory Card

¥ CF Adapter (SDCF-03)

¥ Card extender

¥ IDE-AB7 adapter board

¥ 50 position surface mount header with

co-planar tails

¥ Ejector with right button for 50 position

surface mount header

¥ 50 position straddle mount header for CF

Adapter

Software

¥ FlashDisk Driver and Utilities 3.5-inch

diskette

Documentation

¥ Read Me First flyer

¥ CompactFlash Evaluation Kit UserÕs

Guide

¥ Applications Note: Differences between

PC Card ATA and CF

¥ Applications Note: Pre-Erase Command

Model SDCFEV-01

To order, or for more information call:

408-542-0595

Ordering Information and Technical Support

System Software, Card Reader/Writers and Connectors

Compatible with SanDisk CompactFlash Memory Cards

Table 1 System Software with SanDisk CompactFlash Memory Card Support

Vendor Product Name Telephone

Number

AMI AMICARDZ 770-263-8181

Award/VMI Cardware 415-968-4433

Databook Card Talk for

Databook Chip 508-762-9779

Phoenix Phoenix Card

Manager Plus 714-440-8000

SystemSoft Card Soft 508-651-0088

Vadem Socket Services for

VG365, VG465, VG468 408-467-2100

Table 2 Card Readers/Writers Compatible with SanDisk CompactFlash Memory Cards

Below is a list of PC card reader/writers that are compatible with the SanDisk CompactFlash Memory Card when

used with a passive Type II adapter. These reader/writers can be installed in desktop PCs to enable the CompactFlash

Memory Card to be used in those systems. The CompactFlash Memory Card will operate in any of these

reader/writers when used with a passive Type II adapter.

Note: The SanDisk ImageMate, listed below, does not require use of a Type II adapter.

Vendor Country Telephone/FAX

Number Product

Model Product Type

Adtron United States 602-926-9324

FAX 602-926-9359

http://www.adtron.com

SDDA

SDDB

SDDC

SDDL

SDDM

SDDP

SDDR

SDDS

Adapter for direct IDE-mode operation; 16-bit

data interface, BIOS compatible (no drivers);

3.5- or 2.5-inch mount; can replace laptop hard

drives.

IDE or ISA connected 8-bit drive; front access.

Industry standard ISA dual-slot adapter, rear

entry, cabled to front entry or 100% internal

access.

External LPT port drive.

8-bit PC/104 drive.

16-bit PC/104 industry standard adapter.

External RS-232 drive.

Dual-slot SCSI bus drive; ATA card appears as

removable disk device; compatible with PC,

Macintosh and most workstations.

Ordering Information and Technical Support

Table 2 Card Readers/Writers Compatible with SanDisk CompactFlash Memory Cards (continued)

Vendor Country Telephone/FAX

Number Product

Model Product Type

Altec Germany Country Code 49

(0) 511 98381-0

FAX (0) 511 98381-49

EasyDrive

PCBoardCard

i-Drive

PC/104 Drive

Triple slot (two Type II or one Type II and one

Type III) in 3.5-inch frame; IDE interface.

Dual slot (two Type II or one Type III) on ISA

slot card.

Dual slot (two Type II or one Type III) in a 3.5-

inch frame; SCSI-2 interface.

Dual slot (two Type II or one Type III) for

PC/104 system bus.

CardWize

Data

Solutions

United

Kingdom Country Code 44

118-947-9475

FAX 118-947-4676

pcmcia@cardwize.co.uk

MiniWizard

1R WIZ/001

MiniWizard

2R WIZ/006

CardWizard

1F1R WIZ/101

CardWizard

2F WIZ/106

CardWizard

EXT WIZ/107

CardWizard

IP54 WIZ/108

CardWizard

Bezel WIZ/109

PC104 Wizard

1 WIZ/201

PC104 Wizard

1+H WIZ/202

PC104 Wizard

Stack WIZ/211

PC104 Wizard

Bezel WIZ/221

PC104Wizard

FDD WIZ/231

PC104 Wizard

IP54 WIZ/241

CardMaestro

3.5” MAE/000

CardMaestro

3.5” PCB

MAE/050

CardMaestro

EXT MAE/300

CardMaestro

2.5” MAE/400

ISA adapter with one rear access slot.

ISA adapter with two rear mounted slots.

ISA adapter with one FDD bay mounted slot and

one rear access slot.

ISA adapter with two FDD bay mounted slots.

ISA adapter with external slot housed in a

robust metal case.

ISA adapter with one slot IP54 sealed and one

rear access slot.

ISA adapter with one slot via the standard

CardWize bezel and one rear access slot.

PC104 bus adapter with one slot on board.

PC104 bus adapter with one slot on boardand

headers for remote access slot two.

PC104 bus adapter with two stacking slots.

PC104 bus adapter with one PC104 slot and

one bezel mounted slot.

PC104 bus adapter with one PC104 slot and

one FDD bay mounted slot.

PC104 bus adapter with one PC104 slot and I

slot IP54 sealed.

IDE adapter for direct IDE mode 3.5” & 5.25”

FDD bay mounted.

IDE adapter PCB on a 3.5”HDD foot print.

IDE adapter with an external slot.

IDE adapter on a 2.5” HDD foot print.

Ordering Information and Technical Support

Table 2 Card Readers/Writers Compatible with SanDisk CompactFlash Memory Cards (continued)

Vendor Country Telephone/FAX

Number Product

Model Product Type

Chase/CNF United States

United

Kingdom

408-778-1160

FAX 408-779-6558

Country Code 44

(0) 1274 841358

FAX (0) 1274 841316

CARDport isa ISA adapter with one slot on card and cable to

single slot drive bay mounted unit.

CSM Germany Country Code 49

(0) 711 7796420

FAX (0) 711 7796440

OmniDrive

Professional

Drive

Dual Front

Board

Dual Slot

Board

CIS-I/O Board

Single slot (Type III) external unit that connects

to Centronics (EPP) port (supports Windows

NT, Windows 95, Windows 3.11 and MS-DOS).

Single slot (Type III) external unit that connects

to Centronics (EPP) port with professional

software for binary data access.

ISA adapter with cable to dual slot (one Type III

and one Type II) in a 3.5-inch frame.

ISA adapter with one slot (Type III) on card and

cable to single slot (Type III) in a 3.5-inch

frame.

ISA adapter with one slot (Type III) on card.

Greystone United States 408-866-4739

FAX 408-866-8328 CardDock ISA adapter with cable to dual slot drive bay

mounted unit.

Intermart United States

Japan

408-379-0770

FAX 408-379-3666

Country Code 81

3-5489-8301

FAX 3-5489-8310

PCD-15

PCD-10

PCD-15B

Dual slot external unit that connects to SCSI-2

port. (Supports Apple Macintosh, UNIX, Risc,

Vme and PowerPC platforms.)

Single slot external unit that connects to SCSI-

2 port. Same platform support as PCD-15.

Internal configuration of PCD-15 for use as

built-in for desktop systems.

Karby Corp. United States 716-889-4204

FAX 716-889-2593 TDM 650

ThinCard Drive

TMB 240

ThinCard Drive

Single slot external unit connected to Parallel

Port.

ISA adapter with cable to single slot internal

unit.

Protege United States 714-450-8950

FAX 714-450-8959 ATA/X ISA adapter with single cable to either an

internal or external unit.

SanDisk United States 408-542-0500

FAX 408-542-0503

http://www.sandisk.com

ImageMate CompactFlash Card reader/writer that connects

to PC with printer pass through connector.

Does not require Type II adapter.

Ordering Information and Technical Support

Table 3 CompactFlash Connector Vendors

The table below lists vendors that can supply CompactFlash connectors.

Vendor Name Telephone Number

3M Company 800-225-5373

Amp Incorporated 800-522-6752 (USA only)

717-986-7777 (outside USA)

Hirose Electric Incorporated 805-522-7958

Molex Incorporated 630-969-4550

Ordering Information and Technical Support

Technical Support Services

Direct SanDisk Technical Support

Call SanDisk Applications Engineering at 408-542-0405 for technical support.

SanDisk Worldwide Web Site

Internet users can obtain technical support and product information along with SanDisk news and much

more from the SanDisk Worldwide Web Site, 24 hours a day, seven days a week. The SanDisk

Worldwide Web Site is frequently updated. Visit this site often to obtain the most up-to-date

information on SanDisk products and applications. The SanDisk Web Site URL is

http://www.sandisk.com.

SanDisk Sales Offices

SanDisk Worldwide Sales Offices

Americas

SanDisk Corporate Headquarters

140 Caspian Court

Sunnyvale, CA 94089-9820

408-542-0500

FAX 408-542-0503

http://www.sandisk.com

Sales

Offices

Western Region USA

408-542-0730

FAX 408-542-0403

Eastern Region USA & Canada

203-483-4390

FAX 203-483-4399

Central & Southern Region USA

614-760-3700

FAX 614-760-3701

Latin & South America

407-667-4880

FAX 407-667-4834

Europe

SanDisk Corporation

Karlsruher Str. 2C

D-30519 Hannover, Germany

011-49-511-8759185

FAX 011-49-511-8759187

Southern

Europe

SanDisk Corporation

4, rue de lÕabreuvoir

92415 Courbevoie Cedex, France

011-33-1-4717-6510

FAX 011-33-1-4717-6531

Japan

SanDisk K.K.

8F Nisso Bldg. 15

2-17-19 Shin-Yokohama, Kohoku-ku

Yokohama 222-0033, Japan

81-45-474-0181

FAX 81-45-474-0371

Asia/Pacific

Rim

89 Queensway, Lippo Center

Tower II, Suite 2207-9

Admiralty, Hong Kong

852-2712-0501

FAX 852-2712-9385

To order SanDisk products directly from SanDisk,

call 408-542-0595.

SanDisk Worldwide Sales Offices

Appendix CompactFlash Connector Specifications

This appendix includes specifications for CompactFlash connectors as defined by the CompactFlash

Association. See the Ordering Information section of this manual for a list of CompactFlash connector

vendors.

Table 1 Connector Interface Requirements

Category Item Standard Test

Method

Physical Housing Material High Temperature Plastic

Housing Flammability Rating UL 94V-0 Certification

Electrical Contact Resistance 40 milliohms maximum, initial EIA-364-23A

Performance (w/ bulk) 20 milliohms maximum change, throughout testing

Current Rating 0.5 Amperes per contact, without exceeding IEC-512-PT3

30oC temperature rise above ambient

Insulation Resistance 1000 Megaohms minimum, initial EIA-364-21A

100 Megaohms minimum, after 1 minute at 500 Vdc

Dielectric Withstanding No shorting during 1 minute at 500 Vac rms, with EIA-364-20A

Voltage 1 mA maximum current leakage

Mechanical Single Socket Holding Force 4.9 N minimum push out at 25 mm/minute EIA-364-29A

Performance Single Pin Holding Force 9.8 N minimum push out at 25 mm/minute EIA-364-29A

Total Mating Force 28.8 N maximum at 25 mm/minute EIA-364-13A

Total Unmating Force 4.9 N minimum and 28.8 N maximum at 25 mm/minute EIA-364-13A

Durability 10,000 mating cycles, without exceeding low-level contact EIA-364-09B

resistance

Environmental Mechanical Shock No discontinuities greater than 100 ns, Test Condition A EIA-364-27A

Performance Vibration No discontinuities greater than 100 ns, Test Condition III EIA-364-28A

Humidity 10 (24 hour) cycles with connector mated EIA-364-31A

Thermal Shock -55oC to +85oC, 5 (1 hour) cycles EIA-364-32B

Mixed Flowing Gas Environmental Class II for 96 hours with connector

unmated EIA-364-65

1.27mm

(.050 in.) —B—

—A—

30.48mm

(1.2 in.)

24 Equal Spaces x 1.27mm =

50 x Ø 0.44 ± 0.02

ø 0.05 A B

S S

1.27mm

(.050 in.)

1.27mm

(.050 in.)

Figure 1 50 Position, Two Row Pin Pattern

Appendix CompactFlash Connector Specifications

Pin Insertion 0.94mm (.037 in.) Min.

Figure 2 Socket Connector Entry

Appendix CompactFlash Connector Specifications

Description Pin Number L ± 0.10 L1 Max L2 Ref L3 ± 0.10 L4

Power 1, 13, 38 & 50 5.00 [.197] 0.50 [.020] 4.50 [.177] 0.50 [.020] 0.50 - 2.50

[.020 - .098]

General All other pins 4.25 [.167] 0.50 [.020] 3.75 [.148] 0.50 [.020] 0.50 - 2.50

[.020 - .098]

Detect 25, 26 3.50 [.138] 0.50 [.020] 3.00 [.118] 0.50 [.020] 0.50 - 2.50

[.020 - .098]

Socket

Notes:

1 Pin/Socket contact area.

2 L4 is the point of first engagement for mating with the socket

contacts/housing mounted within the card.

Figure 3 Pin and Socket Detail

Appendix CompactFlash Connector Specifications

35.86mm ± 0.08 (1.412 in.)

32.97mm ± 0.08 (1.298 in.)

3.30mm ± 0.05 (.130 in.)

1.27mm Typ (.050 in.)

1.27mm Typ

(.050 in.)

2.69mm ± 0.05

(.106 in.)

2.70mm Max.

(.106 in.)

0.51mm ± 0.03

(.020 in.)

5.99mm ± 0.10

(.236 in.)

3.00mm ± 0.05

(.118 in.)

0.51mm Typ (.020 in.)

1.27mm. Typ (.050 in.)

30.48mm ± 0.10

(1.200 in.)

Recommended PCB Pattern

0.89mm Typ

(.035 in.)

1.27mm ± 0.05 Typ

(.050 in.)

30.48mm

(1.200 in.)

1.15mm

(.045 in.)

0.64mm

(.025 in.)

2.03mm

(.080 in.)

Figure 4 Straddle Mount CF Card Socket

Appendix CompactFlash Connector Specifications

35.86mm ± 0.08 (1.412 in.)

32.97mm ± 0.08 (1.298 in.)

3.30mm ± 0.05 (.130 in.)

1.27mm Typ (.050 in.)

1.27mm Typ

(.050 in.)

2.69mm ± 0.05

(.106 in.)

2.70mm Max.

(.106 in.)

0.51mm ± 0.03

(.020 in.)

5.99mm ± 0.10

(.236 in.)

3.00mm ± 0.05

(.118 in.)

0.25mm Typ (.010 in.)

0.635mm. Typ (.025 in.)

31.11mm

(1.225 in.)

Recommended PCB Pattern

0.40mm Typ

(.016 in.)

0.635mmTyp

(.025 in.)

31.11mm

(1.225 in.)

1.15mm

(.045 in.)

0.64mm

(.025 in.)

2.03mm

(.080 in.)

Figure 5 Surface Mount CF Card Socket

Appendix CompactFlash Connector Specifications

43.03mm ± 0.08

(1.694 in.)

Pin 1

Pin 26

Pin 25

Pin 50

3.5mm ± 0.08

(.138 in.)

1.4mm ± 0.05

(.055 in.) 0.79mm ± 0.05

(.031 in.)

2X 0.89mm ± 0.0

(.035 in.)

Figure 6 Pin Connector Opening

Tip DetailCross Section

Ø 0.44mm ± 0.02

(.017 in.)

0.46mm Max.

(.018 in.)

Row

110° Min

Contact

Area

0.50mm ± 0.10

(.020 in.) 10° - 15

Figure 7 Header Pin Detail

Appendix CompactFlash Connector Specifications

Pin Type

detect

general

power

Interface Dim A

3.50mm (.138 in.)

4.25mm (.167 in.)

5.00mm (.197 in.)

Pin No.

25, 26

all other pins

1, 13, 38, 50

47.96mm

(1.888 in.)

45.06mm

(1.774 in.)

1.40mm ± 0.05

(.055 in.)

Pin 1 Pin 13 Pin 25

Pin 26 Pin 38

Pin 50

1.27mm Typ

(.050 in.)

2x 1.35mm ± 0.05

(.053 in.)

2x 1.42mm ± 0.05

(.056 in.)

1.27mm Typ

(.050 in.)

0.79mm ± .002

(.031 in.)

43.03mm ± 0.08

(1.694 in.)

2X 0.89mm ± 0.05

(.035 in.)

2X 6.73mm ± 0.08

(.265 in.)

11.18mm ± 0.05

(.440 in.)

2X 3.00mm ± 0.05

(.118 in.) 1.02mm

(.040 in.)

7.28mm

(.287 in.)

1.27mm Typ

(.050 in.) 0.52mm Typ

(.020 in.)

2.92mm

(.115 in.)

30.48mm

(1.200 in.)

3.18mm

(.125 in.)

4.19mm ± 0.08

(.165 in.)

6.73mm ± 0.08

(.265 in.)

0.30mm

(.012 in.)

12.70mm

(.500 in.)

Length

Section A—A

30.48mm

(1.200 in.)

1.27mm Typ

(.050 in.)

0.52mm Typ

(.020 in.)

1.27mm

(.050 in.)

2.34mm

(.092 in.)

2.74mm

(.108 in.)

1.90mm Typ

(.075 in.)

2X 6.85mm

(.270 in.)

4.24mm

(.167 in.)

0.84mm

(.033 in.)

3.81mm

(.150 in.)

2X 1.52mm

(.060in.)

PCB Solder Pad Pattern

Figure 8 Straddle Mount CF Card Adapter Header

Appendix CompactFlash Connector Specifications

—A—

40.16mm (1.581 in.)

0.635mm Typ

(.0250 in.)

2X ø 2.20mm

(.087 in.)

4.50mm

(.177 in.)

1.00mm

(.039 in.)

(Optional)

2X 4.00mm

(.157 in.)

(Optional)

2X 2.00mm

(.079 in.)

(Optional) 50.6mm (1.99 in.)

(Optional)

43.03mm ± 0.06

(1.694 in.)

30.48mm Ref

(1.200 in.)

Pin 1

Pin 26 Pin 25

Pin 50

1.40mm ± 0.05

(.055 in.)

1.27mm Typ

(.050 in.) 40.16mm

(1.58 in.)

1.75mm

(.069 in.)

2.00mm

(.079 in.)

.79mm ± 0.05

(.031 in.)

2X .89mm ± 0.05

(.035 in.)

1.00mm

(.039 in.)

ø1.50mm

(.059 in.)

—A—

1.50mm

(.059 in.)

—A—

11.0mm

(.43 in.)

4.5mm

(.18 in.)

2.5mm

(.098 in.)

3.50mm ± 0.08

(.138 in.)

Section A-A

31.11mm

(1.225 in.)

0.635mm Typ

(.0250 in.) 0.40mm Typ

(.016 in.)

Pin 26

Pin 1 Pin 25

Pin 50

Detail A

46.13mm

(1.816 in.)(Optional)

40.16mm

(1.581 in.)

2X 3.00mm

(.118 in.) (Optional)

See Detail A

3.50mm

(.138 in.)

3.00mm

(.118 in.)

7.55mm

(.297 in.)

2X 5.0mm

(.197 in.) (Optional)

2.00mm

(.079 in.)

2X ø 1.70mm

(.067 in.)

(Through for locating Boss)

The End of PC Board

The Direction of Inserting Card

2X ø 2.20mm

(.087 in.)

(Through for M2)

Recommended PCB Solder Pad Pattern

Pin Type

detect

general

power

Interface Dim A

3.50mm (.138 in.)

4.25mm (.167 in.)

5.00mm (.197 in.)

Pin No.

25, 26

all other pins

1, 13, 38, 50

9.5mm ± 0.13

(.374 in.)

Figure 9 Surface Mount Right Angle CF Card Slot Header

Appendix CompactFlash Connector Specifications

30.48mm

(1.200 in.)

0.635mm Typ

(.0250 in.)

1.27mm Typ

(0.050 in.)

1 25

Insert Card

Figure 10 Two Row SMT Host PCB Pattern

31.11mm

(1.225 in.)

0.635mm Typ

(.0250 in.)

0.40mm Typ

(.016 in.)

125

Insert Card

3.50mm

(.138 in.)

Figure 11 Single Row SMT Host PCB Pattern

30.48mm

(1.200 in.)

Insert Card

5.72mm Ref

(.225 in.)

3X 1.91mm

(.075 in.)

Figure 12 Right Angle Through Hole Host PCB Pattern

Appendix CompactFlash Connector Specifications

30.48mm

(1.200 in.)

5.72mm Ref

(.225 in.)

3X 1.91mm

(.075 in.)

Figure 13 Vertical Through Hole Host PCB Pattern

Insert Card

1.27mm

(.050 in.)

30.48mm

(1.200 in.)

1.27mm

(.050 in.)

Figure 14 Alternate Right Angle Through Hole Host PCB Pattern

Limited Warranty

I. WARRANTY STATEMENT

SanDisk warrants its products to be free of any defects in materials or workmanship that would prevent them from

functioning properly for one year from the date of purchase. This express warranty is extended by SanDisk

Corporation.

II. GENERAL PROVISIONS

This warranty sets forth the full extent of SanDiskÕs responsibilities regarding the SanDisk FlashDisk. In satisfaction

of its obligations hereunder, SanDisk, at its sole option, will either repair, replace or refund the purchase price of the

product.

NOTWITHSTANDING ANYTHING ELSE IN THIS LIMITED WARRANTY OR OTHERWISE, THE EXPRESS

WARRANTIES AND OBLIGATIONS OF SELLER AS SET FORTH IN THIS LIMITED WARRANTY, ARE IN LIEU

OF, AND BUYER EXPRESSLY WAIVES ALL OTHER OBLIGATIONS, GUARANTIES AND WARRANTIES OF

ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY IMPLIED

WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR INFRINGEMENT,

TOGETHER WITH ANY LIABILITY OF SELLER UNDER ANY CONTRACT, NEGLIGENCE, STRICT LIABILITY

OR OTHER LEGAL OR EQUITABLE THEORY FOR LOSS OF USE, REVENUE, OR PROFIT OR OTHER

INCIDENTAL OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION PHYSICAL INJURY OR

DEATH, PROPERTY DAMAGE, LOST DATA, OR COSTS OF PROCUREMENT OF SUBSTITUTE GOODS,

TECHNOLOGY OR SERVICES. IN NO EVENT SHALL THE SELLER BE LIABLE FOR DAMAGES IN EXCESS OF

THE PURCHASE PRICE OF THE PRODUCT, ARISING OUT OF THE USE OR INABILITY TO USE SUCH

PRODUCT, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED BY LAW.

SanDiskÕs products are not warranted to operate without failure. Accordingly, in any use of products in life support

systems or other applications where failure could cause injury or loss of life, the products should only be incorporated

in systems designed with appropriate redundancy, fault tolerant or back-up features.

III. WHAT THIS WARRANTY COVERS

For products found to be defective within one year of purchase, SanDisk will have the option of repairing or replacing

the defective product, if the following conditions are met:

A. A warranty registration card for each defective product was submitted and is on file at SanDisk. If not, a

warranty registration card must accompany each returned defective product. This card is included in each

productÕs original retail package.

B. The defective product is returned to SanDisk for failure analysis as soon as possible after the failure occurs.

C. An incident card filled out by the user, explaining the conditions of usage and the nature of the failure,

accompanies each returned defectiveÊproduct.

D. No evidence is found of abuse or operation of products not in accordance with the published specifications, or

of exceeding storage or maximum ratings or operating conditions.

All failing products returned to SanDisk under the provisions of this limited warranty shall be tested to the productÕs

functional and performance specifications. Upon confirmation of failure, each product will be analyzed, by whatever

means necessary, to determine the root cause of failure. If the root cause of failure is found to be not covered by the

above provisions, then the product will be returned to the customer with a report indicating why the failure was not

covered under the warranty.

This warranty does not cover defects, malfunctions, performance failures or damages to the unit resulting from use in

other than its normal and customary manner, misuse, accident or neglect; or improper alterations or repairs.

SanDisk reserves the right to repair or replace, at its discretion, any product returned by its customers, even if such

product is not covered under warranty, but is under no obligation to do so.

SanDisk may, at its discretion, ship repaired or rebuilt products identified in the same way as new products, provided

such cards meet or exceed the same published specifications as new products. Concurrently, SanDisk also reserves the

right to market any products, whether new, repaired, or rebuilt, under different specifications and product

designations if such products do not meet the original productÕs specifications.

Limited Warranty

IV. RECEIVING WARRANTY SERVICE

According to SanDiskÕs warranty procedure, defective product should be returned only with prior authorization from

SanDisk Corporation. Please contact SanDiskÕs Customer Service department at 408-542-0595 with the following

information: product model number and description, serial numbers, nature of defect, conditions of use, proof of

purchase and purchase date. If approved, SanDisk will issue a Return Material Authorization or Product Repair

Authorization number. Ship the defective product to:

SanDisk Corporation

Attn: RMA Returns

(Reference RMA or PRA #)

140 Caspian Court

Sunnyvale, CA 94089

V. STATE LAW RIGHTS

SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR CONSEQUENTIAL

DAMAGES, OR LIMITATION ON HOW LONG AN IMPLIED WARRANTY LASTS, SO THE ABOVE

LIMITATIONS OR EXCLUSIONS MAY NOT APPLY TO YOU. This warranty gives you specific rights and you may

also have other rights that vary from state to state.

VI. OUT OF WARRANTY REPAIRS

Please contact SanDisk Customer Service at 408-542-0595 for the current out of warranty and repair price list.