Semiconductor Components Industries, LLC, 2003
March, 2003 - Rev. 2 1Publication Order Number:
MC100LVELT22/D
MC100LVELT22
3.3VDual LVTTL/LVCMOS
to Differential LVPECL
Translator
The MC100LVELT22 is a dual LVTTL/LVCMOS to differential
LVPECL translator. Because LVPECL (Low Voltage Positive ECL)
levels are used, only +3.3 V and ground are required. The small outline
8-lead package and the low skew, dual gate design of the LVELT22
makes it ideal for applications which require the translation of a clock
and a data signal.
•350 ps Typical Propagation Delay
•<100 ps Output-to-Output Skew
•Flow Through Pinouts
•The 100 Series Contains Temperature Compensation
•LVPECL Operating Range: VCC = 3.0 V to 3.8 V
with GND = 0 V
•When Unused TTL Input is left Open, Q Output will Default High
Device Package Shipping**
ORDERING INFORMATION
MC100LVELT22D SO-8 98 Units/Rail
MC100LVELT22DR2 SO-8 2500 Units/Reel
MC100LVELT22DT TSSOP-8 98 Units/Rail
MC100LVELT22DTR2 TSSOP-8 2500 Units/Reel
*For additional marking information, see
Application Note AND8002/D.
SO-8
D SUFFIX
CASE 751
MARKING
DIAGRAMS*
TSSOP-8
DT SUFFIX
CASE 948R
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
1
8
1
8ALYW
KVT22
1
8
ALYW
KR22
1
8
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**For additional tape and reel information, see
Brochure BRD8011/D.
MC100LVELT22
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2
1
2
3
45
6
7
8
D0
GND
VCC
Q0
D1Q1
Q1
Q0
LVPECL LVTTL/
LVCMOS
Figure 1. 8-Lead Pinout (Top View)
and Logic Diagram
PIN FUNCTION
PIN DESCRIPTION
Qn, Qn LVPECL Differential Outputs
D0, D1 LVTTL/LVCMOS Inputs
VCC Positive Supply
GND Ground
ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor N/A
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model
Machine Model > 4 kV
> 200 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V-0 @ 0.125 in
Transistor Count 164
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
MC100LVELT22
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3
MAXIMUM RATINGS (Note 2)
Symbol Parameter Condition 1 Condition 2 Rating Units
VCC Positive Power Supply GND = 0 V 7 V
V
In
p
ut Voltage
GND 0 V
VV
7
V
VIInput Voltage GND = 0 V VI VCC 7 V
Iout Output Current Continuous
Surge 50
100 mA
mA
TA Operating Temperature Range -40 to +85 °C
Tstg Storage Temperature Range -65 to +150 °C
JA Thermal Resistance (Junction-to-Ambient) 0 LFPM
500 LFPM SO-8
SO-8 190
130 °C/W
°C/W
JC Thermal Resistance (Junction-to-Case) std bd SO-8 41 to 44 ± 5% °C/W
JA Thermal Resistance (Junction-to-Ambient) 0 LFPM
500 LFPM TSSOP-8
TSSOP-8 185
140 °C/W
°C/W
JC Thermal Resistance (Junction-to-Case) std bd TSSOP-8 41 to 44 ± 5% °C/W
Tsol Wave Solder <2 to 3 sec @ 248°C 265 °C
2. Maximum Ratings are those values beyond which device damage may occur.
LVPECL DC CHARACTERISTICS VCC = 3.3 V; GND = 0.0 V (Note 3)
-40 °C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
ICC Power Supply Current 28 28 29 mA
VOH Output HIGH Voltage (Note 4) 2275 2420 2275 2420 2275 2420 mV
VOL Output LOW Voltage (Note 4) 1490 1680 1490 1680 1490 1680 mV
NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained.
3. Output parameters vary 1:1 with VCC. VCC can vary ±0.15 V.
4. Outputs are terminated through a 50 ohm resistor to VCC-2 volts.
LVTTL/LVCMOS INPUT DC CHARACTERISTICS VCC = 3.3 V ; TA = -40°C to 85°C (Note 5)
Symbol Characteristic Min Typ Max Unit Condition
IIH Input HIGH Current 20 A VIN = 2.7 V
IIHH Input HIGH Current 100 A VIN = VCC
IIL Input LOW Current -0.2 mA VIN = 0.5 V
VIK -1.2 V IIN = -18 mA
VIH Input HIGH Voltage 2.0 V
VIL Input LOW Voltage 0.8 V
5. VCC can vary ±0.15 V.
AC CHARACTERISTICS VCC = 3.3 V ; GND = 0.0 V (Note 6)
-40 °C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
fmax Maximum Toggle Frequency 350 MHz
tPLH Propagation Delay (Note 7) 200 350 600 200 350 600 200 350 600 ps
tskew Skew Output-to-Output
Part-to-Part 30 100
400 30 100
400 30 100
400 ps
tJITTER Random Clock Jitter (RMS) 1.6 ps
tr/tfOutput Rise/Fall Time (20-80%) 200 550 200 500 200 500 ps
6. VCC can vary ±0.15 V.
7. Specifications for standard TTL input signal.
MC100LVELT22
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4
Figure 1. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020 - Termination of ECL Logic Devices.)
Driver
Device Receiver
Device
QD
50
Q D
50
VTT
VTT = VCC - 2.0 V
Resource Reference of Application Notes
AN1404 - ECLinPS Circuit Performance at Non-Standard VIH Levels
AN1405 - ECL Clock Distribution Techniques
AN1406 - Designing with PECL (ECL at +5.0 V)
AN1503 - ECLinPS I/O SPICE Modeling Kit
AN1504 - Metastability and the ECLinPS Family
AN1560 - Low Voltage ECLinPS SPICE Modeling Kit
AN1568 - Interfacing Between LVDS and ECL
AN1596 - ECLinPS Lite Translator ELT Family SPICE I/O Model Kit
AN1650 - Using Wire-OR Ties in ECLinPS Designs
AN1672 - The ECL Translator Guide
AND8001 - Odd Number Counters Design
AND8002 - Marking and Date Codes
AND8020 - Termination of ECL Logic Devices
AND8090 - AC Characteristics of ECL Devices
MC100LVELT22
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5
PACKAGE DIMENSIONS
SO-8
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751-07
ISSUE AA
SEATING
PLANE
1
4
58
N
J
X 45
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDAARD IS 751−07
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
-X-
-Y-
G
M
Y
M
0.25 (0.010)
-Z-
Y
M
0.25 (0.010) Z SXS
M

MC100LVELT22
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6
PACKAGE DIMENSIONS
TSSOP-8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R-02
ISSUE A
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A2.90 3.10 0.114 0.122
B2.90 3.10 0.114 0.122
C0.80 1.10 0.031 0.043
D0.05 0.15 0.002 0.006
F0.40 0.70 0.016 0.028
G0.65 BSC 0.026 BSC
L4.90 BSC 0.193 BSC
M0 6 0 6
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.

SEATING
PLANE
PIN 1 14
85
DETAIL E
B
C
D
A
G
DETAIL E
F
M
L
2X L/2
-U-
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V S
T
0.10 (0.004)
-T-
-V-
-W-
0.25 (0.010)
8x REFK
IDENT
K0.25 0.40 0.010 0.016
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MC100LVELT22/D
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