PRELIMINARY CY7C107A Functional Description The CY7C1074 is a high-performance CMOS static RAM organized as 1,048,576 words by | bit. Easy memory expansion is provided by at active LOW chip enable (CE) and threv--state drivers. The device Features High speed tay = 12 ns e CMOS for optimum speed/power e@ Low active power 825 mW has aun automatic power-down feature that Low standby power reduces power onsumption by more than 275 mw 65 when des: ected. 2.0V data retention (optional) Writing to the device is accomplished by 100 uw taking chip eni.ble (CE) and write enable ~ HY (WE) inputs L')W. Data on the input pin e Automatic power-down when (Dyn) is writer into the memory location deselected specified on th : address pins (Ag through TTL-compatible inputs and outputs Ayqg). 1M x 1 Static RAM Reading from the device is accomplished by taking chip enable (CE) LOW while write enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the data output (Dour) pir. The output pin (Doct) is placed in a high- impedance state when the device is dese- lected (CE HIGH) or during awrite opera- tion (CE and WE LOW). The CY7C107A is available in standard 400-mil-wicle DIPs and SOJs. Logic Block Diagram Pin Configuration DIPISOJ . 0 1ew Din p INPUT BUFFER Ao Ay o Ag a Ag Q Ss i w 512 x 2048 < pane ARRAY Bt Dour Ww Ay c nO Ag (7 COLUMN Down | DECODER E 2eErz2E2i2e We 107A 1 Selection Guide TICIOTA 12 FICIOTA15 TCLO7TA20 FC1O7A25 FICIOTA35 Maximum Access Time (ns) 12 15 20 25 35 Maximum Operating Commercial 150 135 125 120 10 Current (mA} Military 145 135 130 120 Maximum Standby Commercial Su 40 30 30, 25 Current (mA) Military 40 30 30 25CYPRESS PRELIMINARY CY7TC107A Maximum Ratings (Above which the useful life may be impaired. For user guid. lines, Static Discharge Voltage .........-....0..0.-0005 >2001V not tested.) (per MIL-STD-883, Method 3015) Storage Temperature .............005. 65Cto +1-0C Latch-Up Current ......0..00 00... eee >200 mA Ambient Temperature with . 0 ni; mM Power Applied ..... ............0--. 55C to +1/5C Operating Range ~ . Ambient Supply Voltage on Vcc Relative to GNDI'! . -0.5V to + 7.0V Range Temperaturel-1 Ver DC Voltage Applied to Outputs : . in High 7 State! es ues eee ~O.SV to Voc +3.5V Commercial OPC to +70C SV + 10% DC Input Voltagel!! Sob ed teen eee -0.5V to Vec + ).5V Military 55C to +125C SV + 10% Current into Outputs (LOW) 2.0.0.0... 60. e eee armA Electrical Characteristics Over the Operating Rang:|+) TCIO7TA12 TCIOTA-15 7C107A-20 Parameter Description Test Conditions Min. | Max. | Min. | Max. | Min. | Max. | Unit Vou Output HIGH Veco = Min. Joy = -4.0 mA 24 2.4 2.4 Vv Voltage VoL Output LOW Voc = Min. lop = OMA 0.4 04 0.4 v Voltage Vin Input HIGH 2.2 Vecot 2,2 Vect 2.2 Veet Vv Voltage 0.3 0.3 0.3 VIL Input LOW -0.3 0.8 -03 0.8 -03 0.8 v Voltage !!] lx Input Load Current | GND < V, < Vcc -1 +1 -1 +1 -1 +1 LA loz Output Leakage GND < Vi < Vcc. -5 +5 -5 +5 -5 +5 WA Current Output Disabled los Output Short Veco = Max., Vout = GND 300 ~ 300 300 | mA Circuit Current!4 lec Vcc Operating Vcc = Max. Com't 150 135 125 mA Supply Current lour = OmA, ~ f = tax = I/tre Mil 145 135 Ispi Automatic CE Max.. Vcc. Com 50 40 30 mA Power-Down CE > Vin. Curreni Vin > Vy1 or . ~ TTL Inputs Vin <. Vin. Mil 40 30 P=! max Isp2 Automatic CE Max. Voc. Com 2 2 2 mA Power-Down CE > Vee 0.3V. Current Vin > Voc ~ 0.3V er Mil 3 5 ~ CMOS Inputs Vin <.0.3V, f=0 * . Notes: 1. Vip (min. = 2.0V tor pulse durations of less than 20 ns. 5 2. Ta is the instant on case temperature.=. CYPRESS PRELIMINARY __CY7C107A Electrical Characteristics Over the Operating Rangel 't (continued) 7C1IO7TA25 7C1OFTA35 Parameter Description Test Conditions Min. Max. Min. Max. Unit Vou Output HIGH Vcc = Min, Ion = ~ 4.0 mA 2.4 2.4 Vv Voltage VoL Output LOW Voltage | Vcc = Min., lop = 8.0 mA 0.4 0.4 Vv Vin Input HIGH Voltage 2.2 Vect 0.3 2.2 Vect 03 v Vit Input LOW Voltagel!] ~0.3 0.8 -03 0.8 Vv Ixy Input Load Current GND < V, < Veo -1 +1 -1 +1 pA loz Output Leakage GND < V1 < Voc. -5 +5 - +5 pA Current Output Disabled Tos Output Short Veco = Max., Vour = GND 300 300 mA Circuit Current!) lee Vcc Operating Veco = Max., Com! 120 110 mA Supply Current Town = OmA, f= imax = Wire: Mil 130 120 Isni Automatic CE Max.. Vcc. Com 3u 25 mA Power-Down CE > Vin- Current Vin 2 Vin or - TTL Inputs Vin < Vue Mil 30 25 f=fmax Isp2 Automatic CE Max. Voc. Com 2 2 mA Power-Down CE > Veco 0.3V. Current ; Vin = Voc > 0.3V or Mil 3 3 ~ CMOS Inputs Vin < 03M f=0 Capacitance"! Parameter Description Test Conditions Max. Unit Cn: Addresses Input Capacitance Va = 25C, f = 1 MHz, 7 pF Voce Cin: Controls c 5.0V 10 pk Cour Output Capacitance 10 pF Notes: 3. See the last page of this specification for Group A subgrouptestingin- 3. formation. 4. Notmore than 1 output should be shorted at one time. Duration. ifthe short circuit should not exceed 30 seconds. to | N A Tested initially and after any design or process changes that may affect these parameters.PRELIMINARY CY7C107A SPY Cypress AC Test Loads and Waveforms R1 4800 Vv Rt 800 5v SV 0_* ALL INPUT PULSES OUTPUT th OUTPUT 30pF OC Re 5 pF R2 | 2552 I 25502 INCLUDING --L + INCLUDING a JIGAND 7 - JIGAND 7 - SCOPE _(a)Normal Load SCOPE (b} High-Z Load 1OrA=4 1070-3 Equivalent to: THiEVENIN EQUIVALENT 1672 OUTPUT o-_~ww-___0 1 73V Switching Characteristics!> ] Over the Operating Range FCIOTA12 | 7C1IO7A15 | 7C107A-20 | 7C107A25 | 7C107A35 Parameter Description Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Unit READ CYCLE tre Read Cycle Time 12 15 20 25 35 ns laa Address to Data Valid 12 15 20 25 35 ns Pata Hold from Address ; tOoHA Change 3 3 3 3 3 ns tact CE LOW to Data Valid I2 15 20 2s 35 ns Wz CE LOW to Low ZI7] 3 3 3 3 3 nis tIZCE CE HIGH to High ZI? 8! f 7 8 10 10 ns tpu CE LOW to Power-Up a 0 0 0 0 ns tpp CE HIGH to Power-Down 12 1S 20 as 35 ns WRITE CYCLE! twe Write Cycle Time 12 15 20 25 35 as Iscr: CE LOW to Write End 10 12 15 20 25 ns Law Address Set-Up to Write 10 2 15 ay as as End ta Address Hold fram Write 0 0 n ) 0 ns End Address Set-Lp to Write tsa Start a ( ( 0 0 ns tpwe. WE Pulse Width 10 I2 IS 20 25 ns typ Data Set-Up to Write End 7 & 10 {5 20 ns tip Data Hold from Write End a 0 0 0 0 fs. LL Wt. WE HIGH to Low Z/71 3 3 3 3 3 ns tHzwE WE LOW to High ZI7-41 6 7 8 10 10 nis Notes: &. Testconditions assure signal transition tiny of 3nsorless.tin ngref- 9 The internal write time of the memory is defined by the overlap of CE erence levels of L.SV. nput pulse levels of 0 to 3.0. and output sading ol the specified Top on and 30-pF load capacitance. 7. Atany given temperature und voltage condition. yzcE is kos than tozce and theywe is less than tozwe for any given device. 8S. tirzey and Qyywp are specified with a load Capacitance of S| Fas in part b) of ACT voads. Transition is measured +500 m / from steady-state vollae. 2-26 LOW and WE LOW. CE and WE must be LOW to initiate awrite, and the transition of any of these signals can terminate the write. Che input data set-up and bold timing should be referenced to the leading edge of the signal that terminates the write=p, CYPRESS PRELIMINARY CY7C107A Data Retention Characteristics Over the Operating Range (L Version Only) Commercial Military Parameter Description Conditions!!!) Min. | Max. | Min. | Max. | Unit Vor Vec for Data Retention 2.0 2.0) Vv IccpR Data Retention Current Voc = Vor = 2.0V, 50 70 tA TI - - - CE > Veo 0.39, tcpr Chip Deselect to Data Retention Time Vin > Vee ~ 0.3 or 0 0 ns , tpPl Operation Recovery Time Vin $ 03V tre tre ns Data Retention Waveform DATA RETENTION MODE Vec 4.5V Vor = 2V [ tcon ta cE He *~ 107A-3 Switching Waveforms Read Cycle No. 1!!! 121 | tac ADDRESS x bef enn Ta toHA DATA OUT PREVIOUS DATA VALID OK DATA VALID 107A--6 Read Cycle No. 2/2. '31 ADDRESS K N fe Vy CE K /| tace : t e t LZCE HZCE HIGH HIGH IMPEDANCE 77 IMPEDANCE DATA OUT DATA VALID > t* teu tpp supPiy W ICC 50% 50% kK CURRENT * KA isp 1Q7A-7 Notes: __ 10. No input may exceed Voc + O.5V. 12. WE is HIGH for read cycle 1. Device is continuously selected, CE = Vy. 13. Address valid prior to or cvincident with CE transition LOW._ PY oprnss PRELIMINARY | CY7C107A Switching Waveforms (continued) Write Cycle No. 1 (CE Controlled)l!41 ADDRESS DATA IN DATA OUT ~ tsp DATA VALID HIGH IMPEDANCE Write Cycle No. 2 (WF. Controlled)! !+1 107A -8 ADDRESS CE tpwe WE tsp DATA IN DATA VALID tyzwe = ILZWeE HIGH IMPEDANCE DATA OUT DATA UNDEFINED __ XL 1074-9 Truth Table CE | WE Dour Mode Power H x High Z Power-Down Standb (Isp) L H Data Ou: Read Active (Ice) L L High 2 Write Active tlee) Note: I4. IfCE goes HIGH simultaneously with WE going HIGH, the out vut re- mains ina high impedance state.= Sy eres PRELIMINARY __CY7C107A Ordering Information Speed Package Operating (ns) Ordering Code Name Package Type Range 12 CY7CLOTA12PC P4t 28-Lead (400-Mil) Molded DIP | Commercial CY7TCLO7A12VC Vis 28-Lead (400-Mil) Molded SOJ 18 CY7C107,A 15PC P41 28-Lead (400-Mil) Molded DIP | Commercial CY7TCLO7A 1SVC Vi8 28-Lead (400-Mil) Molded SO} CY7C107A415DMB D42 28-Lead (400-Mil) CerDIP Military 2) CY7C107.420PC P4l 28-Lea.t (400-Mil) Molded DIP | Commercial CY7C1O7A20VC V28 28-Lead (400-Mil) Molded SOJ CY7C107.420DMB D2 28-LeaJ (400-Mil) CerDIP Military 25 CY7TCLO7TA25PC Psi 28-Lead (400-Mil) Molded DIP | Commercial CY7TCLOTA-25VC V28 28-Leud (400-Mil) Molded SOJ CY7C1L07.A425DMB Daz 28-LeaJ (400-Mil) CerDIP Military 35 CY7TCLOTA~35PC P-l 28-Leul (400-Mil) Molded DIP | Commercial CY7CIO7A35VC V28 28-Leud (400-Mil) Molded SOJ CY7C107.4-35DMB D42 28-Leasl (400-Mil) CerDIP Military Contact factory for L" version availability MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Switching Characteristics Parameter Subgroups Parameter |. Subgroups Vou 12, READ CYCLE Vo 1.2.: tec 7.8.9.10, 11 Vin 12. taa 7,89, 10, 11 Vip. Max. 2. tona 7.8.9, 10. 11 ix tone tack 7,8.9, 10, 11 loz 228 WRITE CYCLE lec L2. twe 7.8.9, 10,11 Ispi 2. tsch 7,8, 9, 10, 11 Isp2 a law 7.89, 10, 11 tHA 7,8,9, 10, 11 Document #: 3800232-A tsa 7.8.9,10, 1 tpwE 7.8.9, 10, 0 tsp 7, 8.9, 10, U1 typ 7,8,9, 10, 11