LP2950ACZ-5.0 NOPB - NATIONAL SEMICONDUCTOR

SHUTDOWN

COUT

2.2 µF

LP2951

SHUTDOWN

GND

OUT

ERROR

VOUT VIN

CIN

1 µF

SENSE

VTAP

FEEDBACK

VFEEDBACK

330 kVOUT

VIN

CIN

1 µF

OUT

GND

IN COUT

2.2 µF

LP2950

VOUT

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LP2950-N

LP2951-N

SNVS764Q –JANUARY 2000–REVISED DECEMBER 2017

LP295x-N Series of Adjustable Micropower Voltage Regulators

1 Features

1• Input Voltage Range: 2.3 V to 30 V

• 5-V, 3-V, and 3.3-V Output Voltage Versions

Available

• High Accuracy Output Voltage

• Ensured 100-mA Output Current

• Extremely Low Quiescent Current

• Low Dropout Voltage

• Extremely Tight Load and Line Regulation

• Very Low Temperature Coefficient

• Use as Regulator or Reference

• Needs Minimum Capacitance for Stability

• Current and Thermal Limiting

• Stable With Low-ESR Output Capacitors (10 mΩ

to 6 Ω)

• LP2951-N Versions Only:

– Error Flag Warns of Output Dropout

– Logic-Controlled Electronic Shutdown

– Output Programmable From 1.24 V to 29 V

2 Applications

• High-Efficiency Linear Regulator

• Regulator with Undervoltage Shutdown

• Low Dropout Battery-powered Regulator

• Snap-ON/Snap-OFF Regulator

space

LP2951 Simplified Schematic

3 Description

The LP2950-N and LP2951-N are micropower

voltage regulators with very low quiescent current

(75 µA typical) and very low dropout voltage (typical

40 mV at light loads and 380 mV at 100 mA). They

are ideally suited for use in battery-powered systems.

Furthermore, the quiescent current of the device

increases only slightly in dropout, prolonging battery

life.

Careful design of the LP2950-N/LP2951-N has

minimized all contributions to the error budget. This

includes a tight initial tolerance (0.5% typical),

extremely good load and line regulation (0.05%

typical) and a very low output voltage temperature

coefficient, making the part useful as a low-power

voltage reference.

One such feature is an error flag output which warns

of a low output voltage, often due to falling batteries

on the input. It may be used for a power-on reset. A

second feature is the logic-compatible shutdown input

which enables the regulator to be switched on and

off. Also, the part may be pin-strapped for a 5-V, 3-V,

or 3.3-V output (depending on the version), or

programmed from 1.24 V to 29 V with an external

pair of resistors.

The LP2950-N is available in the surface-mount TO-

252 package and in the popular 3-pin TO-92 package

for pin-compatibility with older 5-V regulators. The 8-

pin LP2951-N is available in plastic, ceramic dual-in-

line, WSON, or metal can packages and offers

additional system functions.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

LP2950-N TO-92 (3) 4.30 mm × 4.30 mm

TO-252 (3) 9.91 mm × 6.58 mm

LP2951-N

SOIC (8) 4.90 mm × 3.91 mm

VSSOP (8) 3.00 mm × 3.00 mm

WSON (8) 4.00 mm × 4.00 mm

PDIP (8) 9.81 mm × 6.35 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

LP2950-N Simplified Schematic

LP2950-N

LP2951-N

SNVS764Q –JANUARY 2000–REVISED DECEMBER 2017

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Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description............................................................. 1

4 Revision History..................................................... 2

5 Voltage Options ..................................................... 3

6 Pin Configuration and Functions......................... 4

7 Specifications......................................................... 5

7.1 Absolute Maximum Ratings ...................................... 5

7.2 ESD Ratings.............................................................. 5

7.3 Recommended Operating Conditions....................... 5

7.4 Thermal Information: LP2950-N................................ 6

7.5 Thermal Information: LP2951-N................................ 6

7.6 Electrical Characteristics........................................... 7

7.7 Typical Characteristics............................................ 10

8 Detailed Description............................................ 16

8.1 Overview................................................................. 16

8.2 Functional Block Diagrams ..................................... 16

8.3 Feature Description................................................. 17

8.4 Device Functional Modes........................................ 18

9 Application and Implementation ........................ 19

9.1 Application Information............................................ 19

9.2 Typical Applications ................................................ 20

10 Power Supply Recommendations ..................... 32

11 Layout................................................................... 32

11.1 Layout Guidelines ................................................. 32

11.2 Layout Example .................................................... 32

11.3 WSON Mounting................................................... 33

12 Device and Documentation Support................. 34

12.1 Documentation Support ....................................... 34

12.2 Related Links ........................................................ 34

12.3 Community Resources.......................................... 34

12.4 Trademarks........................................................... 34

12.5 Electrostatic Discharge Caution............................ 34

12.6 Glossary................................................................ 34

13 Mechanical, Packaging, and Orderable

Information........................................................... 34

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision P (May 2016) to Revision Q Page

• Changed LP2951-N ESD parameter pin references and added SENSE pin row to LP2951-N ESD parameter in ESD

Ratings table........................................................................................................................................................................... 5

Changes from Revision O (December 2014) to Revision P Page

• Added rows to ESD Ratings table to differentiate values for pins 3 and 7 of the LP2951-N device...................................... 5

• Added footnotes 2 and 3 to both Thermal Information tables ............................................................................................... 6

Changes from Revision N (May 2013) to Revision O Page

• Added Device Information and ESD Rating tables, Feature Description,Device Functional Modes,Application and

Implementation,Power Supply Recommendations,Layout,Device and Documentation Support, and Mechanical,

Packaging, and Orderable Information sections; moved some curves to Application Curves section; update pin

names; change package nomenclature from National to TI .................................................................................................. 1

Changes from Revision M (April 2013) to Revision N Page

• Changed layout of National Data Sheet to TI format ............................................................................................................ 1

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5 Voltage Options

DEVICE NUMBER PACKAGE VOLTAGE OPTION (V)

LP2950-N

TO-92 (LP) 3 (±0.5%, ±1 %)

3.3 (±0.5%, ±1 %)

5 (±0.5%, ±1 %)

TO-252 (NDP) 3 (±1 %)

3.3 (±1%)

5 (±1%)

LP2951-N

SOIC (D) 3 (±0.5%, ±1%)

3.3 (±0.5%, ±1%)

5 (±0.5%, ±1%)

VSSOP (DGK) 3 (±0.5%, ±1%)

3.3 (±0.5%, ±1%)

5 (±0.5%, ±1%)

WSON (NGT) 3 (±0.5%, ±1%)

3.3 (±0.5%, ±1%)

5 (±0.5%, ±1%)

PDIP (P) 5 (±0.5%, ±1%)

OUT

SENSE

SHUTDOWN

GND

VTAP

FEEDBACK

ERROR

DAP

4 5

LP2950-N

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6 Pin Configuration and Functions

LP Package

3-Pin TO-92

Bottom View

P, D, DGK Packages

8-Pin PDIP, SOIC, VSSOP

Top View

NDP Package

3-Pin TO-252

Front View

NGT Package

8-Pin WSON

Top View

Connect DAP to GND at device pin 4.

Pin Functions: LP2950-N

I/O DESCRIPTION

NAME LP2950

LP NDP

GND 2 2 — Ground

IN 3 1 I Input supply voltage

OUT 1 3 O Regulated output voltage

Pin Functions: LP2951-N

I/O DESCRIPTION

NAME LP2951

D, DGK, P NGT

ERROR 5 5 O Error output

FEEDBACK 7 7 I Voltage feedback input

GROUND 4 4 — Ground

IN 8 8 I Input supply voltage

OUT 1 1 O Regulated output voltage

SENSE 2 2 I Output voltage sense

SHUTDOWN 3 3 I Disable device

VTAP 6 6 O Internal resistor divider

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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(3) May exceed input supply voltage.

(4) When used in dual-supply systems where the output terminal sees loads returned to a negative supply, the output voltage should be

diode-clamped to ground.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)

MIN MAX UNIT

Input supply voltage - SHUTDOWN input voltage error comparator output voltage(3) –0.3 30 V

FEEDBACK input voltage(3)(4) –1.5 30 V

Power dissipation Internally Limited

Junction temperature, TJ150

°C

Soldering dwell time, temperature Wave 4 seconds, 260

Infrared 10 seconds, 240

Vapor phase 75 seconds, 219

Storage temperature, Tstg –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings VALUE UNIT

LP2950-N

V(ESD) Electrostatic

discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V

LP2951-N

V(ESD) Electrostatic

discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-

001(1)

IN, OUT, GND, ERROR ±2500

SHUTDOWN ±2000

SENSE ±1500

VTAP, FEEDBACK ±1000

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The junction-to-ambient thermal resistances are as follows: 157.4°C/W for the TO-92 (LP) package, 51.3°C/W for the TO-252 (NDP)

package, 56.3°C/W for the molded PDIP (P), 117.7°C/W for the molded plastic SOIC (D), 171°C/W for the molded plastic VSSOP

(DGK). The above thermal resistances for the P, D, and DGK packages apply when the package is soldered directly to the PCB. The

value of RθJA for the WSON (NGT) package is typically 43.3°C/W but is dependent on the PCB trace area, trace material, and the

number of layers and thermal vias. For details of thermal resistance and power dissipation for the WSON package, see AN-1187

Leadless Leadframe Package (LLP).

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

MIN MAX UNIT

Maximum input supply voltage 30 V

Junction temperature, TJ(2) LP2950AC-XX, LP2950C-XX –40 125 °C

LP2951 –55 150 °C

LP2951AC-XX, LP2951C-XX –40 125 °C

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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2) Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by JESD51-7 - High Effective Thermal

Conductivity Test Board for Leaded Surface Mount Packages.

(3) The PCB for the TO-252 (NDP) package RθJA includes twelve (12) thermal vias under the tab per EIA/JEDEC JESD51-5.

7.4 Thermal Information: LP2950-N

THERMAL METRIC(1) LP2950-N

UNITLP (TO-92) NDP (TO-252)

3 PINS 3 PINS

RθJA(2) Junction-to-ambient thermal resistance, High-K 157.4 51.3(3) °C/W

RθJC(top) Junction-to-case (top) thermal resistance 81.2 53.5 °C/W

RθJB Junction-to-board thermal resistance 153.6 30.4 °C/W

ψJT Junction-to-top characterization parameter 25.2 5.5 °C/W

ψJB Junction-to-board characterization parameter n/a 30 °C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 2.2 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2) Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by JESD51-7 - High Effective Thermal

Conductivity Test Board for Leaded Surface Mount Packages.

(3) The PCB for the WSON (NGT) package RθJA includes six (6) thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

7.5 Thermal Information: LP2951-N

THERMAL METRIC(1)

LP2951-N

UNIT

P (PDIP) D (SOIC) DGK

(VSSOP) NGT

(WSON)

8 PINS 8 PINS 8 PINS 8 PINS

RθJA(2) Junction-to-ambient thermal resistance, High K 56.3 117.7 171.0 43.3(3) °C/W

RθJC(top) Junction-to-case (top) thermal resistance 45.7 63.7 62.3 35.0 °C/W

RθJB Junction-to-board thermal resistance 33.5 57.9 91.4 23.3 °C/W

ψJT Junction-to-top characterization parameter 22.9 15.9 8.9 0.5 °C/W

ψJB Junction-to-board characterization parameter 33.3 57.5 90.1 20.5 °C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a 9.1 °C/W

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(1) Unless otherwise noted, all limits apply for TA= TJ= 25°C as well as specified for VIN = (VONOM + 1 V), IL= 100 µA and CL= 1 µF for

5-V versions and 2.2 µF for 3-V and 3.3-V versions. Additional conditions for the 8-pin versions are FEEDBACK tied to VTAP, OUTPUT

tied to SENSE, and VSHUTDOWN ≤0.8 V.

(2) A Military RETS specification is available on request.

(3) All LP2950 devices have the nominal output voltage coded as the last two digits of the part number. In the LP2951 products, the 3-V

and 3.3-V versions are designated by the last two digits, but the 5-V version is denoted with no code at this location of the part number

(refer to the Package Option Addendum at end of data sheet).

(4) Ensured and 100% production tested.

(5) Ensured but not 100% production tested. These limits are not used to calculate outgoing AQL levels.

(6) Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.

(7) Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to

heating effects are covered under the specification for thermal regulation.

(8) Line regulation for the LP2951-N is tested at 150°C for IL= 1 mA. For IL= 100 µA and TJ= 125°C, line regulation is specified by design

to 0.2%. See Typical Characteristics for line regulation versus temperature and load current.

7.6 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)(1)

PARAMETER TEST CONDITIONS(1) LP2951(2) LP2950AC-XX

LP2951AC-XX LP2950C-XX

LP2951C-XX UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAX

3-V VERSIONS(3)

Output voltage

TJ= 25°C 2.985 3 3.015 2.985 3 3.015 2.970 3 3.030 V(4)

−25°C ≤TJ≤85°C 2.970 3 3.030 2.955 3 3.045 V(5)

Full operating

temperature range 2.964 3 3.036 V(4)

2.964 3 3.036 2.940 3 3.060 V(5)

Output voltage 100 µA ≤IL≤100 mA,

100 µA ≤IL≤100 mA,

TJ≤TJMAX

2.955 3 3.045 V(4)

2.958 3 3.042 2.928 3 3.072 V(5)

3.3-V VERSIONS(3)

Output voltage

TJ= 25°C 3.284 3.3 3.317 3.284 3.3 3.317 3.267 3.3 3.333 V(4)

−25°C ≤TJ≤85°C 3.3 3.267 3.3 3.333 3.251 3.3 3.350 V(5)

Full operating

temperature range 3.260 3.3 3.340 V(4)

3.260 3.3 3.340 3.234 3.3 3.366 V(5)

Output voltage 100 µA ≤IL≤100 mA, TJ

≤TJMAX

3.251 3.3 3.350 V(4)

3.254 3.3 3.346 3.221 3.3 3.379 V(5)

5-V VERSIONS(3)

Output voltage

TJ= 25°C 4.975 5 5.025 4.975 5 5.025 4.95 5 5.05 V(4)

−25°C ≤TJ≤85°C 5 4.95 5 5.05 4.925 5 5.075 V(5)

Full operating

temperature range 4.94 5 5.06 V(4)

4.94 5 5.06 4.9 5 5.1 V(5)

Output voltage 100 µA ≤IL≤100 mA, TJ

≤TJMAX

4.925 5 5.075 V(4)

4.925 5 5.075 4.88 5 5.12 V(5)

ALL VOLTAGE OPTIONS

Output voltage

temperature

coefficient See(6), –40°C ≤TJ≤

125°C 20 120 ppm/°C(4)

20 100 50 150 ppm/°C(5)

Line regulation(7)

(VONOM + 1 V) ≤Vin ≤30

V(8) 0.03% 0.1% 0.03% 0.11% 0.04% 0.2% See(4)

(VONOM + 1 V) ≤Vin ≤30

V(8), –40°C ≤TJ≤125°C 0.03% 0.5% See(4)

0.03% 0.2% 0.04% 0.4% (5)

Load regulation(7) 100 µA ≤IL≤100 mA 0.04% 0.1% 0.04% 0.1% 0.1% 0.2% See(4)

100 µA ≤IL≤100 mA,

–40°C ≤TJ≤125°C 0.04% 0.3% See(4)

0.04% 0.2% 0.1% 0.3% See(5)

LP2950-N

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Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)(1)

PARAMETER TEST CONDITIONS(1) LP2951(2) LP2950AC-XX

LP2951AC-XX LP2950C-XX

LP2951C-XX UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAX

(9) Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below its nominal value measured

at 1-V differential. At very low values of programmed output voltage, the minimum input supply voltage of 2 V (2.3 V over temperature)

must be taken into account.

(10) Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied, excluding load

or line regulation effects. Specifications are for a 50 mA load pulse at VIN = 30 V (1.25-W pulse) for T = 10 ms.

(11) VREF ≤VOUT ≤(VIN −1 V), 2.3 V ≤VIN ≤30 V, 100 µA ≤IL≤100 mA, TJ≤TJMAX.

Dropout voltage(9)

IL= 100 µA 50 80 50 80 50 80 mV(4)

IL= 100 µA, –40°C ≤TJ≤

125°C 150 mV(4)

150 150 mV(5)

IL= 100 mA 380 450 380 450 380 450 mV(4)

IL= 100 mA, –40°C ≤TJ≤

125°C 600 600 600 mV(4)

600 600 mV(5)

Ground current

IL= 100 µA 75 120 75 120 75 120 µA(4)

IL= 100 µA, –40°C ≤TJ≤

125°C 140 µA(4)

140 140 µA(5)

IL= 100 mA 8 12 8 12 8 12 mA(4)

IL= 100 mA, –40°C ≤TJ≤

125°C 14 mA(4)

14 14 mA(5)

Dropout ground

current

VIN = (VONOM −0.5)V, IL

= 100 µA 110 170 110 170 110 170 µA(4)

VIN = (VONOM −0.5 V), IL

= 100 µA, –40°C ≤TJ≤

125°C

200 200 200 µA(4)

200 200 µA(5)

Current limit VOUT = 0 V 160 200 160 200 160 200 mA(4)

VOUT = 0 V, –40°C ≤TJ≤

125°C 220 mA(4)

220 220 mA(5)

Thermal regulation See(10) 0.05 0.2 0.05 0.2 0.05 0.2 %/W(4)

Output noise

10 Hz to 100 kHz

CL= 1µF (5 V Only) 430 430 430 µVRMS

CL= 200 µF 160 160 160 µVRMS

CL= 3.3 µF

(Bypass = 0.01 µF

Pins 7 to 1 (LP2951-N) 100 100 100 µVRMS

8-PIN VERSIONS ONLY LP2951 LP2951AC-XX LP2951C-XX

Reference voltage 1.22 1.235 1.25 1.22 1.235 1.25 1.21 1.235 1.26 V(4)

–40°C ≤TJ≤125°C 1.2 1.26 V(4)

1.2 1.26 1 1.2 1.27 V(5)

Reference voltage See(11), –40°C ≤TJ≤

125°C 1.19 1.27 V(4)

1.19 1.27 1.185 1.285 V(5)

Feedback pin bias

current

20 40 20 40 20 40 nA(4)

–40°C ≤TJ≤125°C 60 nA (4)

60 60 nA(5)

Reference voltage

temperature

coefficient See(6) 20 20 50 ppm/°C

Feedback pin bias

current

temperature

coefficient 0.1 0.1 0.1 nA/°C

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Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)(1)

PARAMETER TEST CONDITIONS(1) LP2951(2) LP2950AC-XX

LP2951AC-XX LP2950C-XX

LP2951C-XX UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAX

(12) Comparator thresholds are expressed in terms of a voltage differential at the FEEDBACK pin below the nominal reference voltage

measured at VIN = (VO(NOM) + 1) V. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain =

VOUT/VREF = (R1 + R2) / R2.For example, at a programmed output voltage of 5 V, the ERROR output is specified to go low when the

output drops by 95 mV × 5 V / 1.235 V = 384 mV. Thresholds remain constant as a percent of VOUT as VOUT is varied, with the dropout

warning occurring at typically 5% below nominal, 7.5% ensured.

(13) VSHUTDOWN ≥2 V, VIN ≤30 V, VOUT = 0, FEEDBACK pin tied to VTAP.

ERROR COMPARATOR

Output leakage

current

VOH = 30 V 0.01 1 0.01 1 0.01 1 µA(4)

VOH = 30 V, –40°C ≤TJ≤

125°C 2 µA(4)

2 2 µA(5)

Output low voltage

VIN = (VONOM −0.5 V),

IOL = 400 µA 150 250 150 250 150 250 mV(4)

VIN = (VONOM −0.5 V),

IOL = 400 µA,

–40°C ≤TJ≤125°C

400 400 400 mV(4)

400 400 mV(5)

Upper threshold

voltage

See(12) 40 60 40 60 40 60 mV(4)

See(12), –40°C ≤TJ≤

125°C 25 mV(4)

25 25 mV(5)

Lower threshold

voltage

See(12) 75 95 75 95 75 95 mV(4)

See(12), –40°C ≤TJ≤

125°C 140 mV(4)

140 140 mV(5)

Hysteresis See(12) 15 15 15 mV

SHUTDOWN INPUT

Input 1.3 1.3 1.3 V

Logic voltage Low (Regulator ON),

–40°C ≤TJ≤125°C 0.6 V(4)

0.7 0.7 V(5)

Logic voltage High (Regulator OFF),

–40°C ≤TJ≤125°C 2 V(4)

2 2 V(5)

Shutdown pin input

current

Vshutdown = 2.4 V 30 50 30 50 30 50 µA(4)

Vshutdown = 2.4 V

–40°C ≤TJ≤125°C 100 µA(4)

100 100 µA(5)

Vshutdown = 30 V 450 600 450 600 450 600 µA(4)

Vshutdown = 30 V,

–40°C ≤TJ≤125°C 750 µA(4)

750 750 µA(5)

Regulator output

current in

shutdown

See(13) 3 10 3 10 3 10 µA(4)

–40°C ≤TJ≤125°C 20 µA(4)

20 20 µA(5)

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7.7 Typical Characteristics

Figure 1. Quiescent Current Figure 2. Dropout Characteristics

Figure 3. Input Current Figure 4. Input Current

Figure 5. Output Voltage vs. Temperature of 3

Representative Units Figure 6. Quiescent Current

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Typical Characteristics (continued)

Figure 7. Quiescent Current Figure 8. Quiescent Current

Figure 9. Quiescent Current Figure 10. Short Circuit Current

Figure 11. Dropout Voltage Figure 12. Dropout Voltage

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Typical Characteristics (continued)

Figure 13. LP2951-N Minimum Operating Voltage Figure 14. LP2951-N Feedback Bias Current

Figure 15. LP2951-N Feedback Pin Current Figure 16. LP2951-N Error Comparator Output

Figure 17. LP2951-N Comparator Sink Current Figure 18. LP2951-N Enable Transient

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Typical Characteristics (continued)

Figure 19. Output Impedance Figure 20. Ripple Rejection

Figure 21. Ripple Rejection Figure 22. Ripple Rejection

Figure 23. LP2951-N Output Noise Figure 24. LP2951-N Divider Resistance

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LP2951-N

SNVS764Q –JANUARY 2000–REVISED DECEMBER 2017

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Product Folder Links: LP2950-N LP2951-N

Typical Characteristics (continued)

Figure 25. Shutdown Threshold Voltage Figure 26. Line Regulation

Figure 27. LP2951-N Maximum Rated Output Current Figure 28. LP2950-N Maximum Rated Output Current

Figure 29. Thermal Response Figure 30. Output Capacitor ESR Range