Power Integrations
5245 Hellyer Avenue, San Jose, CA 95138 USA.
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Title
Reference Design Report for a >92% Efficient
75 W Power Factor Corrected LED Driver
Using LinkSwitchTM-PH LNK420EG
Specification 190 VAC – 300 VAC Input;
29 V – 36 V, 2.1 A Output
Application LED Driver for Industrial High Bay Light
Author Applications Engineering Department
Document
Number RDR-290
Date October 12, 2012
Revision 1.2
Summary and Features
Single-stage combined power factor correction and accurate constant current (CC) output
Low cost, low component count and small PCB footprint
Highly energy efficient, >92 % at 230 VAC input; 36 V LED
Fast start-up time (<300 ms) – no perceptible delay
Integrated protection features
Single shot no-load latching protection / output short-circuit protected with auto-recovery
Auto-recovering thermal shutdown with large hysteresis protects both components and printed
circuit board
No damage during brown-out conditions
PF >0.95 at 230 VAC
Meet Class C Harmonics Limits EN61000-3-2
Meet EN55015 conducted EMI
%A THD <20% at 230 VAC
Meets IEC ring wave (2.5 kV), differential line surge (2 kV), common mode line surge (4 kV) and
EN55015 conducted EMI
PATENT INFORMATION
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered
by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A
complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under
certain patent rights as set forth at <http://www.powerint.com/ip.htm>.
.
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Table of Contents
1Introduction ................................................................................................................. 4
2Power Supply Specification ........................................................................................ 6
3Schematic ................................................................................................................... 7
4Circuit Description ...................................................................................................... 8
4.1Input EMI Filtering ............................................................................................... 8
4.2Flyback Using LinkSwitch-PH .............................................................................. 8
4.3Output Rectification ............................................................................................. 9
4.4Protection ............................................................................................................ 9
5PCB Layout .............................................................................................................. 10
6Bill of Materials ......................................................................................................... 11
6.1Electrical Bill of Materials ................................................................................... 11
6.2Mechanical Bill of Materials ............................................................................... 12
7Transformer Specification ......................................................................................... 13
7.1Electrical Diagram ............................................................................................. 13
7.2Electrical Specifications ..................................................................................... 13
7.3Materials ............................................................................................................ 13
7.4Transformer Build Diagram ............................................................................... 14
7.5Transformer Construction .................................................................................. 14
7.6Transformer Core Wrapping Process ................................................................ 15
8Transformer Design Spreadsheet ............................................................................. 18
9Heat Sink Assemblies ............................................................................................... 21
9.1Diode Heat Sink ................................................................................................ 21
9.1.1Diode Heat Sink Drawing ........................................................................... 21
9.1.2Diode Heat Sink Fabrication Drawing ......................................................... 22
9.1.3Diode and Heat Sink Assembly Drawing .................................................... 23
9.2eSIP Heat Sink .................................................................................................. 24
9.2.1eSIP Heat Sink Drawing ............................................................................. 24
9.2.2eSIP Heat Sink Fabrication Drawing .......................................................... 25
9.2.3eSIP and Heat Sink Assembly Drawing ..................................................... 26
10Performance Data ................................................................................................. 27
10.1Active Mode Efficiency ...................................................................................... 27
10.2Line Regulation ................................................................................................. 28
10.3Power Factor ..................................................................................................... 29
10.4%THD ................................................................................................................ 30
10.5Harmonic Currents ............................................................................................ 31
11Thermal Performance ........................................................................................... 33
11.1Equipment Used ................................................................................................ 33
11.2Thermal Result .................................................................................................. 33
11.3Thermal Scan .................................................................................................... 34
12Waveforms ............................................................................................................ 36
12.1Drain Voltage and Current, Normal Operation ................................................... 36
12.2Drain Voltage and Current, Start-up Operation ................................................. 36
12.3Drain Voltage and Current, Output Short .......................................................... 37
12.4Output Voltage and Output Current Start-up Profile .......................................... 37
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12.5Output Current at Normal Operation .................................................................. 38
12.6Line Transient Response ................................................................................... 38
12.7Start-up No-load and Normal Operation then No-load ....................................... 39
12.8Secondary Diode Voltage Stress ....................................................................... 39
12.9Line Surge Waveform ........................................................................................ 40
13Line Surge ............................................................................................................. 41
14Conducted EMI ..................................................................................................... 42
14.1Equipment ......................................................................................................... 42
14.2EMI Test Set-up ................................................................................................. 42
15Revision History .................................................................................................... 49
Important Note:
Although this board is designed to satisfy safety requirements for non-isolated LED
driver, the engineering prototype has not been agency approved. Therefore, all testing
should be performed using an isolation transformer to provide the AC input to the
prototype board.
RDR-290 LNK420EG (29 V – 36 V / 2.1 A 75 W Output) 12-Oct-12
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1 Introduction
This document is an engineering report describing an isolated LED driver (power supply)
utilizing a LNK420EG from the LinkSwitch-PH family of devices.
The RD-290 provides a single constant current output of 2.1 A over an LED string voltage
of 29 V to 36 V in a highly efficient, simple and low component count design.
The board was optimized to operate over the high AC input voltage range (190 VAC to
300 VAC, 47 Hz to 63 Hz). LinkSwitch-PH based designs provide a high power factor
(>0.95) with low harmonic current content, easily meeting international limits.
The form factor of the board was chosen to illustrate the simplicity of fitting into standard
down light applications.
The document contains the power supply specification, schematic, bill of materials,
transformer documentation, printed circuit layout, and performance data.
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Figure 1 – Populated Circuit Board Photograph.
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2 Power Supply Specification
The table below represents the minimum acceptable performance of the design. Actual
performance is listed in the results section.
Description Symbol Min Typ Max Units Comment
Input
Voltage VIN 190 300 VAC 2 Wire – no P.E.
Frequency fLINE 47 50/60 63 Hz
Power Factor 0.95
At any line input voltage
EN61000-3-2(c)
%ATHD 20
Output
Output Voltage VOUT 29 32 36 V
Output Current IOUT 1.95 2.1 2.25 A
Total Output Power
Continuous Output Power POUT 75 W
Efficiency
Nominal 92 %
Measured at 32 V, 2.1 A, 25 oC,
230 VAC
Environmental
Conducted EMI Meets CISPR22B / EN55015
Line Surge
Differential Mode (L1-L2) 2 kV
1.2/50 s surge, IEC 1000-4-5,
Series Impedance:
Differential Mode: 2
Common Mode
(L1-PE,L2-PE) 4 kV
Differential Mode: 12
Ring Wave (100 kHz)
Differential Mode (L1-L2) 2.5 kV 2 short-circuit
Series Impedance
Harmonic Currents Meets EN61000-3-2
Class C
Internal Ambient Temperature TAMB 0 70
oC Board level, free convection, sea
level
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3 Schematic
Figure 2 – Schematic.
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4 Circuit Description
The LinkSwitch-PH (U1) is a highly integrated primary side controller intended for use in
isolated LED driver applications. The LinkSwitch-PH provides high efficiency, high power
factor and low THD in a single-stage conversion topology while regulating the output
current over a wide range of input (180 VAC – 300 VAC) and output voltage variations
typically found in LED driver application environments. All of the control circuitry
necessary for these functions plus the high-voltage power MOSFET is incorporated into
the device.
4.1 Input EMI Filtering
The AC supply to the LED driver is protected by fuse. The system input voltage is limited
by RV1, D1, R5 and C2 during differential mode line surge voltage events.
The AC input is rectified by BR1. Minimal filter capacitance is used in order to achieve
high power factor, low THD and low input current harmonics. Capacitor C8 provides a low
impedance source for the primary switching currents.
Capacitor C1, common-mode choke L1, and differential choke L2, perform EMI filtering
while maintaining high-power factor. This input filter network plus the frequency jittering
feature of LinkSwitch-PH allows compliance to Class B emission limits. Resistor R3 is
used to damp the resonance of the EMI filter, preventing peaks in the conducted EMI
spectrum.
Capacitors CY1 and CY2 and C13 provide EMI filtering, reducing common mode
conducted EMI currents.
4.2 Flyback Using LinkSwitch-PH
Diode D2 and C3 detect the peak AC line voltage. This voltage is converted to a current
into the VOLTAGE MONITOR (V) pin via R6 and R7. This current is also used by the
device to set the input over/under voltage protection thresholds and to provide a linear
relationship between input voltage and the output current.
The V pin current and the FEEDBACK (FB) pin current are used internally to control the
average output LED current. Constant current (CC) non-dimming applications require
24.9 k ±1% resistance (R9) on the REFERENCE (R) pin.
Diode D6, C9, C10, and R15, create the primary bias supply. This bias voltage is rectified
and filter through D6 and C10 respectively. R15 filters the high frequency due to leakage
which improves emi and regulation. The supply is used to supply current into the
BYPASS (BP) pin through D5 and R10. Capacitors C6 and C5 serve as decoupling
capacitors for the BP pin. Capacitor C6 is charged via an internal high-voltage current
source connected to the DRAIN (D) pin of U1. This provides the energy to operate U1
until the bias voltage rises and supplies enough current can be provided via D5.
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The output voltage is sensed via R11 which feeds a current in the FB pin proportional to
the bias voltage. The bias is related to the output voltage via the bias to output winding
turns ratio.
Diode D3 and VR1 clamp due to leakage inductance generated voltage spikes on the
drain to a safe level. Diode D4 is necessary to prevent reverse current from flowing
through the LinkSwitch-PH device.
D4 is low drop diode (Schottky) selected to achieve good efficiency.
T1 core size, winding construction and wire gauge are optimized to minimize inter-
winding capacitance and low AC loss to achieve good efficiency.
4.3 Output Rectification
Diodes D9 and D10 rectify the secondary winding while capacitors C17 and C18 filter the
output. The anode of rectifier diodes are connected to dedicated transformer output
windings to assure current sharing. Dedicated RC clamping circuits are placed across
each output diode to reduce voltage stress and to limit ringing, reducing radiated and
conducted noise.
Diodes D9 and D10 are low drop diodes (Schottky), selected to improve efficiency.
4.4 Protection
The system is protected by a latching over-voltage circuit (D7, C11, C12, VR3, Q1, Q2,
R13, R14, R16 and R20). A separate bias voltage was used (via D7 and C11) to reduce
the time for the OVP to trigger. Resistor R20 prevents the BP pin being pulled to below
~2 V which limits the dissipation of U1 when the latch is triggered. The OVP circuit
operates if the load is not connected and prevents catastrophic failure of the output
capacitor. The latch can only be reset by recycling the AC input.
The device is thermally protected in case the system is operated above the specified
temperature range.
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5 PCB Layout
Figure 3 – Top Printed Circuit Layout.
Figure 4 – Bottom Printed Circuit Layout.
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6 Bill of Materials
The table below is divided into two sections: electrical and mechanical.
6.1 Electrical Bill of Materials
Item Qty Ref Des Description Manufacturer P/N Manufacturer
1 1 BR1 1000 V, 4 A, Bridge Rectifier KBL10-E4/51 Vishay
2 1 C1 220 nF, 305 VAC, Film, X2 R463I322000M2M Kemet
3 1 C2
10 F, 450 V, Electrolytic, (12.5 x 20) EKMG451ELL100MK20S United Chemi-Com
4 1 C3 220 nF, 630 V, Film ECQ-E6224KF Panasonic
5 1 C5 100 nF 25 V, Ceramic, X7R, 0603 ECJ-1VB1E104K Panasonic
6 1 C6
100 F, 10 V, Tant Electrolytic, C Case, SMD T491C107K010AS Kemet
7 1 C8 470 nF, 630 V, Film ECQ-E6474KF Panasonic
8 2 C9 C10
2.2 F, 50 V, Ceramic, Y5V, 1206 GRM31MF51H225ZA01L Murata
9 2 C11 C12
1 F, 50 V, Ceramic, X7R, 0805 08055D105KAT2A AVX
10 1 C13 2.2 nF, Ceramic, Y1 440LD22-R Vishay
11 2 C14 C15 330 pF, 1 kV, Disc Ceramic 562R5GAT33 Vishay
12 2 C17 C18
2200 F, 50 V, Electrolytic, Gen. Purpose,
(18 x 35.5) EKMG500ELL222MLP1S Nippon Chemi-Con
13 2 CY1
CY2 680 pF, Ceramic, Y1 440LT68-R Vishay
14 1 D1 1000 V, 1 A, Rectifier, Glass Passivated, DO-
213AA (MELF) DL4007-13-F Diodes, Inc.
15 1 D2 1000 V, 1 A, Rectifier, DO-41 1N4007-E3/54 Vishay
16 1 D3 1000 V, 3 A, Ultrafast Recovery, 50 ns, DO-
201AD UF5407-E3/54 Vishay
17 1 D4 200 V, 3 A, DIODE SCHOTTKY 1A 200V, SMB SK3200B-LTP Micro Commercial
18 3 D5 D6
D7 250 V, 0.2 A, Fast Switching, 50 ns, SOD-323 BAV21WS-7-F Diodes, Inc.
19 2 D9 D10 250 V, 40 A, Schottky, TO-220AC MBR40250G On Semi
20 1 F1 5 A, 250 V, Slow, TR5 37215000411 Wickman
21 1 J1 CONN TERM BLOCK 5.08 MM 3POS ED120/3DS On Shore Technology
22 1 J2 CONN TERM BLOCK 5.08 MM 2POS ED120/2DS On Shore Technology
23 1 L1 33 mH, 0.8 A, Common Mode Choke ELF-18D650H Panasonic
24 1 L2 3.5 mm x 11.4 mm, 144
at 100 MHz, #22
AWG hole, Ferrite Bead 2761008112 Fair-Rite
25 1 Q1 PNP, Small Signal BJT, 40 V, 0.2 A, SOT-23 MMBT3906LT1G On Semi
26 1 Q2 NPN, Small Signal BJT, 40 V, 0.2 A, SOT-323 MMST3904-7-F Diodes, Inc.
27 3 R1 R2
R5 1.5 M, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ155V Panasonic
28 1 R3 100 k, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ104V Panasonic
29 1 R6 2.00 M, 1%, 1/4 W, Metal Film RNF14FTD2M00 Stackpole
30 1 R7 2.2 M, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ225V Panasonic
31 1 R9 24.9 k, 1%, 1/4 W, Thick Film, 1206 ERJ-8ENF2492V Panasonic
32 1 R10
5.1 k, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ512V Panasonic
33 1 R11
95.3 k, 1%, 1/4 W, Metal Film MFR-25FBF-95K3 Yageo
34 1 R12
13 k, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ133V Panasonic
35 2 R13 R14
1 k, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ102V Panasonic
36 1 R15
200 , 1%, 1/8 W, Thick Film, 0805 ERJ-6ENF2000V Panasonic
37 1 R16
10 k, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ103V Panasonic
38 2 R17 R18
51 , 5%, 1/4 W, Carbon Film CFR-25JB-51R Yageo
39 1 R19
20 k, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ203V Panasonic
40 1 R20
100 , 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ101V Panasonic
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41 1 RV1 320 V, 80 J, 14 mm, RADIAL V320LA20AP Littlefuse
42 1 T1 Custom Transformer, PQ3230, Vertical, 12
Pins, RD-290 Custom Power Integrations
43 1 U1 LinkSwitch-PH, eSIP LNK420EG Power Integrations
44 1 VR1 200 V, 1500 W, TVS, GP-20 1.5KE200A-E3/54 Vishay
45 1 VR3 36 V, 5%, 500 mW, DO-35 1N5258B-T Diodes, Inc.
6.2 Mechanical Bill of Materials
Item Qty Ref Des Description Manufacturer P/N Manufacturer
46 1 ESIPCLIP
M4 METAL1
Heat Sink Hardware, Edge Clip, 20.76 mm
L x 8 mm W x 0.015 mm Thk NP975864 Aavid Thermalloy
47 3
GREASE1
GREASE2
GREASE3
Thermal Grease, Silicone, 5 oz Tube CT40-5 ITW Chemtronics
48 1 HS1 Heat Sink, RDK290-eSIP, FAB, eSIP with
BRKTS, PI Custom 61-00070-01 Custom
49 1 HS2 Heat Sink, RDK290-Diode, FAB,Diode
with BRKTS, PI Custom 61-00071-01 Custom
50 1 JP1 Wire Jumper, Insulated, 24 AWG, 0.8 in C2003A-12-02 Gen Cable
51 3 NUT1 NUT2
NUT3 Nut, Hex, Kep 6-32, Zinc Plate 6CKNTZR Any RoHS Compliant
Mfg.
52 3
SCREW1
SCREW2
SCREW3
SCREW MACHINE PHIL 6-32 X 3/8 SS PMSSS 632 0038 PH Building Fasteners
53 3
WASHER1
WASHER2
WASHER3
Washer, Lk, #6 SS,Zinc Plate 620-6Z Olander Co.
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7 Transformer Specification
7.1 Electrical Diagram
Figure 5 – Transformer Electrical Diagram.
7.2 Electrical Specifications
Electrical Strength 1 second, 60 Hz, from pins 1-6 to pins 7-12 3000 VAC
Primary Inductance Pins 1-2, all other windings open, measured at
100 kHz, 0.4 VRMS 1207 H, ±10%
Resonant Frequency Pins 1-2, all other windings open 1400 kHz (Min.)
Primary Leakage Inductance Pins 1-2, with pins 6-7 shorted, measured at
100kHz, 0.4 VRMS 15.0 H (Max.)
7.3 Materials
Item Description
[1] Core: PC44; PQ3230
[2] Bobbin: RPQ3230 Vertical, 6/6 Pins
[3] Magnet Wire: #24 AWG
[4] Magnet Wire: #33 AWG
[5] Magnet Wire: #22 AWG Triple-insulated Wire
[6] Tape: 3M 1298 Polyester Film, 17.7 mm width
[7] Tape: 3M 1298 Polyester Film, 36 mm width
[8] Tape: 3M 1298 Polyester Film, 10 mm width
[9] Copper Tape: 12 mm
[10] Varnish
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7.4 Transformer Build Diagram
Figure 6 – Transformer Build Diagram.
7.5 Transformer Construction
Bobbin
Preparation
Pull-out pin number 4. Position the bobbin such that the pins are on the left side of
the bobbin chuck. Machine rotates in forward direction.
WDG1
Primary 1
Start at pin 2; wind with firm tension 28 turns of item [3] from left to right. Finish at
pin 3.
Insulation 2 layers of tape [6] for insulation.
WDG2
Bias
Start at pin 6; wind with firm tension 9 trifilar turns of item [4] from left to right.
Finish at pin 5.
Insulation 2 layers of tape [6] for insulation.
WDG3
Secondary
Start in 2 wires per pin at pin 11 and 12; wind with firm tension 14 quadfilar turns of
item [5] in continuously in three layers. Finish at pin 7 and 8. Termination is 2 wires
per pin.
Insulation 2 layers of tape [6] for insulation.
WDG4
Primary 2
Start at pin 3; wind with firm tension 28 turns of item [3] from left to right. Finish at
pin 1.
Insulation 3 layers of tape [6] for insulation.
Taping Add 1 layer of tape [7] on the bottom side of the transformer to isolate the core to
secondary and primary pins. Refer to figures below:
Assemble Core Assemble and secure the cores with 3 layers of tape [8]
Copper Shield Add 1 turn of copper shield around the core legs as shown in the illustration.
Finish Varnish transformer assembly.
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7.6 Transformer Core Wrapping Process
Step 1. Position the core at the center of 60 mm x
36 mm polyester film tape [7]
Step 2. Fold both ends of the tape into the sides of the
core as shown in the illustration. Make sure that no
excess tape higher than the core.
Step 3. Fold the tape in the 4 corners of the core.
Extend the folding down to the bottom of the tape until it
locks.
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Step 4. Cut the center of the bottom tape on its 2 sides.
Step 5. Fold the tape into the legs of the core as shown
in the illustration. Same procedure is applied to the
other side of the core.
Step 6. Insert the wrapped core into the bottom side of
the bobbin. Make sure that the tape is inserted between
the core and the bobbin as shown in the figure.
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Step 7. Grind the top portion of the core to set the
inductance as required. Assemble and fix the cores as
shown in the illustration. Varnish.
Step 8. Add 1 turn of copper shield as shown in the
illustration. Solder the end of the copper shield. Varnish.
Figure 7 – Core Wrapping and Shielding Illustration.
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8 Transformer Design Spreadsheet
ACDC_LinkSwitch-PH
032511; Rev.1.3;
Copyright Power
Integrations 2011
INPUT INFO OUTPUT UNIT LinkSwitch-PH_032511: Flyback
Transformer Design Spreadsheet
ENTER APPLICATION VARIABLES
Dimming required NO NO Select 'YES' option if dimming is required.
Otherwise select 'NO'.
VACMIN 190 V Minimum AC Input Voltage
VACMAX 300 V Maximum AC input voltage
fL 50 Hz AC Mains Frequency
VO 36.00 V Typical output voltage of LED string at full load
VO_MAX 36.00 36.00 V Maximum expected LED string Voltage.
VO_MIN 29.00 29.00 V Minimum expected LED string Voltage.
V_OVP 39.60 V Over-voltage protection setpoint
IO 2.10 A Typical full load LED current
PO 75.6 W Output Power
n 0.92 0.92 Estimated efficiency of operation
VB 20 V Bias Voltage
ENTER LinkSwitch-PH VARIABLES
LinkSwitch-PH LNK410 Universal 115 Doubled/230V
Chosen Device LNK410 Power Out 85W 6.8W
Current Limit Mode FULL FULL Select "RED" for reduced Current Limit mode
or "FULL" for Full current limit mode
ILIMITMIN 5.30 A Minimum current limit
ILIMITMAX 6.20 A Maximum current limit
fS 66000 Hz Switching Frequency
fSmin 62000 Hz Minimum Switching Frequency
fSmax 70000 Hz Maximum Switching Frequency
IV 78.4 uA V pin current
RV 4.2 4 M-ohms Upper V pin resistor
RV2 1.402 M-ohms Lower V pin resistor
IFB 190 190 uA FB pin current (85 uA < IFB < 210 uA)
RFB1 89.5 k-ohms FB pin resistor
VDS 10 V LinkSwitch-PH on-state Drain to Source
Voltage
VD 0.50 V Output Winding Diode Forward Voltage Drop
(0.5 V for Schottky and 0.8 V for PN diode)
VDB 0.70 V Bias Winding Diode Forward Voltage Drop
Key Design Parameters
KP 0.56 056 Ripple to Peak Current Ratio (For PF > 0.9, 0.4
< KP < 0.9)
LP 1205 uH Primary Inductance
VOR 130.00 130 V Reflected Output Voltage.
Expected IO (average) 2.06 A
Expected Average Output current is outside
5% tolerance band. Change IFB to 206 for
better current regulation set-point
KP_VACMAX 0.72 Expected ripple current ratio at VACMAX
TON_MIN 3.55 Us Minimum on time at maximum AC input
voltage
PCLAMP 0.67 W Estimated dissipation in primary clamp
ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES
Core Type PQ3230 PQ3230
Bobbin PQ3230/
12pins
AE 1.6700 1.67 cm^2 Core Effective Cross Sectional Area
LE 7.5000 7.5 Cm Core Effective Path Length
AL 4500.0 4500 nH/T^2 Ungapped Core Effective Inductance
BW 17.0 17 Mm Bobbin Physical Winding Width
M 0 Mm Safety Margin Width (Half the Primary to
Secondary Creepage Distance)
L 2.00 2 Number of Primary Layers
NS 14 14 Number of Secondary Turns
DC INPUT VOLTAGE PARAMETERS
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VMIN 269 V Peak input voltage at VACMIN
VMAX 424 V Peak input voltage at VACMAX
CURRENT WAVEFORM SHAPE PARAMETERS
DMAX 0.33 Minimum duty cycle at peak of VACMIN
IAVG 0.42 A Average Primary Current
IP 2.21 A Peak Primary Current (calculated at minimum
input voltage VACMIN)
IRMS 0.73 A Primary RMS Current (calculated at minimum
input voltage VACMIN)
TRANSFORMER PRIMARY DESIGN PARAMETERS
LP 1207 uH Primary Inductance
NP 50 Primary Winding Number of Turns
NB 9 Bias Winding Number of Turns
ALG 385 nH/T^2 Gapped Core Effective Inductance
BM 2849 Gauss Maximum Flux Density at PO, VMIN
(BM<3100)
BP 3525 Gauss Peak Flux Density (BP<3700)
BAC 798 Gauss AC Flux Density for Core Loss Curves (0.5 X
Peak to Peak)
ur 1608 Relative Permeability of Ungapped Core
LG 0.50 mm Gap Length (Lg > 0.1 mm)
BWE 34 mm Effective Bobbin Width
OD 0.61 mm Maximum Primary Wire Diameter including
insulation
INS 0.07 mm Estimated Total Insulation Thickness (= 2 * film
thickness)
DIA 0.54 mm Bare conductor diameter
AWG 24 AWG Primary Wire Gauge (Rounded to next smaller
standard AWG value)
CM 406 Cmils Bare conductor effective area in circular mils
CMA
555
Cmils/Amp
!!! DECREASE CMA (200 < CMA < 600)
Decrease L(primary layers),increase
NS,smaller Core
LP_TOL 10 10 Tolerance of primary inductance
TRANSFORMER SECONDARY DESIGN PARAMETERS (SINGLE OUTPUT EQUIVALENT)
Lumped parameters
ISP 8.83 A Peak Secondary Current
ISRMS 3.80 A Secondary RMS Current
IRIPPLE 3.17 A Output Capacitor RMS Ripple Current
CMS 760 Cmils Secondary Bare Conductor minimum circular
mils
AWGS 21 AWG Secondary Wire Gauge (Rounded up to next
larger standard AWG value)
DIAS 0.73 mm Secondary Minimum Bare Conductor Diameter
ODS 1.21 mm Secondary Maximum Outside Diameter for
Triple Insulated Wire
VOLTAGE STRESS PARAMETERS
VDRAIN
692
V
Estimated Maximum Drain Voltage assuming
maximum LED string voltage (Includes Effect
of Leakage Inductance)
PIVS
146
V
Output Rectifier Maximum Peak Inverse
Voltage (calculated at VOVP, excludes
leakage inductance spike)
PIVB
92
V
Bias Rectifier Maximum Peak Inverse Voltage
(calculated at VOVP, excludes leakage
inductance spike)
FINE TUNING (Enter measured values from prototype)
V pin Resistor Fine Tuning
RV1 4.00 M-ohms Upper V Pin Resistor Value
RV2 1.40 M-ohms Lower V Pin Resistor Value
VAC1 115.0 V Test Input Voltage Condition1
VAC2 230.0 V Test Input Voltage Condition2
IO_VAC1 2.10 A Measured Output Current at VAC1
IO_VAC2 2.10 A Measured Output Current at VAC2
RV1 (new) 4.00 M-ohms New RV1
RV2 (new) 1.40 M-ohms New RV2
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V_OV 325.6 V Typical AC input voltage at which OV
shutdown will be triggered
V_UV 72.4 V Typical AC input voltage beyond which power
supply can startup
FB pin resistor Fine Tuning
RFB1 93.1 93.1 k-ohms Upper FB Pin Resistor Value
RFB2 1.30E+01 1E+12 k-ohms Lower FB Pin Resistor Value
VB1 19.01 16.0 V Test Bias Voltage Condition1
VB2 19.13 20.0 V Test Bias Voltage Condition2
IO1 2.394 2.10 A Measured Output Current at Vb1
IO2 2.343 2.10 A Measured Output Current at Vb2
RFB1 (new) 99.8 k-ohms New RFB1
RFB2(new) 1.39E+01 k-ohms New RFB2
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9 Heat Sink Assemblies
9.1 Diode Heat Sink
9.1.1 Diode Heat Sink Drawing
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9.1.2 Diode Heat Sink Fabrication Drawing
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9.1.3 Diode and Heat Sink Assembly Drawing
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9.2 eSIP Heat Sink
9.2.1 eSIP Heat Sink Drawing
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9.2.2 eSIP Heat Sink Fabrication Drawing
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9.2.3 eSIP and Heat Sink Assembly Drawing
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10 Performance Data
All measurements performed at 25ºC room temperature, 50 Hz input frequency otherwise
specified.
10.1 Active Mode Efficiency
Figure 8 – Efficiency with Respect to AC Input Voltage.
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10.2 Line Regulation
Figure 9 – Line Regulation, Room Temperature.
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10.3 Power Factor
Figure 10 – High Power Factor within the Operating Range.
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10.4 %THD
Figure 11 – Very Low %ATHD within the Operating Range.
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10.5 Harmonic Currents
The design met the limits for Class C equipment1 for an active input power of >25 W.
VAC
(VRMS)
Freq
(Hz) I (mA) P
(W) PF
230 50.00 357.23 80.6300 0.9819
nth
Order
mA
Content
%
Content
Limit
>25 W Remarks
1 324.20
2 0.60 0.19% 2.00% Pass
3 38.80 11.97% 29.46% Pass
5 15.70 4.84% 10.00% Pass
7 9.10 2.81% 7.00% Pass
9 6.50 2.00% 5.00% Pass
11 5.30 1.63% 3.00% Pass
13 4.60 1.42% 3.00% Pass
15 4.40 1.36% 3.00% Pass
17 3.40 1.05% 3.00% Pass
19 3.40 1.05% 3.00% Pass
21 2.70 0.83% 3.00% Pass
23 2.40 0.74% 3.00% Pass
25 2.00 0.62% 3.00% Pass
27 1.70 0.52% 3.00% Pass
29 1.50 0.46% 3.00% Pass
31 1.30 0.40% 3.00% Pass
33 1.10 0.34% 3.00% Pass
35 0.80 0.25% 3.00% Pass
37 1.00 0.31% 3.00% Pass
39 0.70 0.22% 3.00% Pass
41 0.70 0.22%
43 0.60 0.19%
45 0.70 0.22%
47 0.50 0.15%
Table 1 – Meets EN61000-3-2 Harmonics Contents Standards for >25 W Rating. 31 V LED String.
1 IEC6000-3-2 Section 7.3, Table 2.
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Figure 12 – Meets EN61000-3-2 Harmonics Contents Standards for >25 W Rating. 31 V LED String.
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11 Thermal Performance
11.1 Equipment Used
Chamber: Tenney Environmental Chamber
Model No: TJR-17 942
AC Source: Chroma Programmable AC Source
Model No: 6415
Wattmeter: Yokogawa Power Meter
Model No: WT2000
Data Logger: Monogram
SN:1290492
Figure 13 – Thermal Chamber Set-up Showing Box Used to Prevent Airflow Over UUT.
11.2 Thermal Result
Load: 36 V / 2.08 A LED load
Normal Operation Device Temperature (ºC)
Component 180 V / 50 Hz 230 V / 50 Hz 265 V / 50 Hz
Max OTP Max OTP Max OTP
Box Internal Ambient (ºC) 70.0 89.2 70.0 96.4 70.0 95.5
Transformer (T1) 81.1 105.4 80.9 105.9 84.8 109.8
Output Capacitor (C17) 78.2 96.5 74.4 100.5 77.4 102
Common Mode Choke (L1) 79.7 98.4 73.8 100.6 75.2 100.7
Bridge (BR1) 100.4 119.3 92.1 118.2 92.4 118.0
Snubber TVS (VR1) 100.1 119.5 94.4 119.8 93.3 118.6
LNK420EG (U1) 110.2 131.0 103.1 130.8 104.0 131.2
Output Diode (D9) 90.7 109.1 88.2 113.0 90.5 115.0
Output Diode (D10) 95.4 113.9 93.3 118.0 95.7 120.2
OTP: The ambient temperature was raised until the internal Over-Temperature-Protection
of the IC (U1) triggered.
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11.3 Thermal Scan
The scan is conducted at ambient temperature of 25ºC, 180 VAC / 50 Hz input and 36 V
LED string load.
Figure 14 – LNK420EG (U1) Case Temperature. Figure 15 – Bridge Case BR1 (Sp1) and CMC Core
L1 (Sp2) Temperature.
Figure 16 – Transformer Core T1 (Sp1)
Temperature.
Figure 17 – TVS Diode VR1 (Sp1) and Snubber
Diode D3 (Sp2) Case Temperature.
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Figure 18 – Output Diode D9, D10 (Sp1, Sp2) Case
and Secondary Snubber R17, R19
(Sp3, Sp4) Temperature.
Figure 19 – Blocking Diode D4 (Sp1) Case
Temperature.
Figure 20 – Overall Board Thermal Image.
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12 Waveforms
12.1 Drain Voltage and Current, Normal Operation
Figure 21 – 300 VAC / 63 Hz, 36 V LED String.
Measured VDRAIN Stress: 621 V.
Ch1: VDRAIN, 200 V / div.
Ch4: IDRAIN, 01 A / div.,5 s / div.
Figure 22 – 300 VAC / 63 Hz, 36 V LED String.
Measured VDRAIN Stress: 634 V.
Ch1: VDRAIN, 200 V / div.
Ch4: IDRAIN, 1 A / div.,1 ms / div.
12.2 Drain Voltage and Current, Start-up Operation
Figure 23 – 300 VAC / 63 Hz, 36 V LED String.
Measured VDRAIN Stress: 621 V.
Ch1: VDRAIN, 200 V / div.
Ch4: IDRAIN, 1 A / div., 10 ms / div.
Figure 24 – 300 VAC / 63 Hz, 36 V LED String.
Measured VDRAIN Stress: 595 V.
Ch1: VDRAIN, 200 V / div.
Ch4: IDRAIN, 01 A / div., 10 ms / div.
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12.3 Drain Voltage and Current, Output Short
Figure 25 – 300 VAC / 63 Hz, Output Short.
Measured VDRAIN Stress: 621 V
Maximum IDRAIN: 6.14 A.
Ch1: VDRAIN, 200 V / div.
Ch4: IDRAIN, 2 A / div., 10 ms / div.
Figure 26 – 300 VAC / 63 Hz, Output Short.
Measured VDRAIN Stress: 621 V
Maximum IDRAIN: 6.14 A.
Ch1: VDRAIN, 200 V / div.
Ch4: IDRAIN, 2 A / div., 10 ms / div.
12.4 Output Voltage and Output Current Start-up Profile
Figure 27 – 180 VAC / 50 Hz, 32 V LED String.
Ch1: VIN, 500 V / div.
Ch2: VOUT, 5 V / div.
Ch4: IOUT, 0.5 A / div., 50 ms / div.
Figure 28 – 300 VAC / 50 Hz, 32 V LED String.
Ch1: VIN, 500 V / div.
Ch2: VOUT, 5 V / div.
Ch4: IOUT, 0.5 A / div., 50 ms / div.
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12.5 Output Current at Normal Operation
Figure 29 – 180 VAC / 50 Hz, 31 V LED String.
Ch1: VIN, 500 V / div.
Ch2: VOUT, 5 V / div.
Ch4: IOUT, 0.5 A / div., 50 ms / div.
Figure 30 – 300 VAC / 50 Hz, 31 V LED String.
Ch1: VIN, 500 V / div.
Ch2: VOUT, 5 V / div.
Ch4: IOUT, 0.5 A / div., 50 ms / div.
12.6 Line Transient Response
Figure 31 – 230 VAC / 50 Hz, 1 s On – 1 s Off.
Load: 32 V LED String.
Ch1: VIN, 200 V / div.
Ch4: IOUT, 500 mA / div., 1 s / div.
Figure 32 – 180-300-180 VAC / 50 Hz, 1 s Pulse.
Load: 32 V LED String.
Ch1: VIN, 200 V / div.
Ch4: IOUT, 500 mA / div., 200 ms / div.
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12.7 Start-up No-load and Normal Operation then No-load
This LED driver is protected by latching OVP circuit and resettable through AC recycle.
No component failure was observed.
Figure 33 – 300 VAC / 63 Hz Start-up No-load;
Ch1: VOUT, 10 V / div.
Ch4: IOUT, 1 mA / div., 20 s / div.
Figure 34 – 300 VAC / 63 Hz, Load is Removed;
Ch1: VOUT, 10 V / div.
Ch4: IOUT, 1 A / div., 20 s / div.
12.8 Secondary Diode Voltage Stress
Figure 35 – 300 VAC / 63 Hz, Measured Secondary
Voltage Stress: 192 V.
Ch1: VSEC_DIODE, 50 / div., 500 ns / div.
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12.9 Line Surge Waveform
Figure 36 – 230 VAC / 60 Hz, 2 kV Differential Surge.
Voltage Stress (U1): 690 V.
Ch1: VBULK, 200 V / div.
Ch3: VSOURCE, 200 V / div., 100 s / div.
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13 Line Surge
Input voltage was set at 230 VAC / 60 Hz. Output was loaded with 32 V LED string and
operation was verified following each surge event.
Differential input line 1.2 / 50 s surge testing was completed on two test unit to
IEC61000-4-5.
Surge Level
(kV)
Input Voltage
(VAC)
Injection
Location
Injection Phase
(°)
Test Result
(Pass/Fail)
+2 230 L1 to L2 0 Pass
-2 230 L1 to L2 0 Pass
+2 230 L1 to L2 90 Pass
-2 230 L1 to L2 90 Pass
+4 230 L1-PE 0 Pass
-4 230 L1-PE 0 Pass
+4 230 L1-PE 90 Pass
-4 230 L1-PE 90 Pass
+4 230 L2-PE 0 Pass
-4 230 L2-PE 0 Pass
+4 230 L2-PE 90 Pass
-4 230 L2-PE 90 Pass
Differential input line ring surge testing was completed on two test unit to IEC61000-4-5.
Ring Surge
Level (kV)
Input
Voltage
(VAC)
Injection
Location
Injection
Phase
(°)
Test Result
(Pass/Fail)
+2.5 230 L1 to L2 0 Pass
-2.5 230 L1 to L2 0 Pass
+2.5 230 L1 to L2 90 Pass
-2.5 230 L1 to L2 90 Pass
Unit was operating normally under all test conditions.
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14 Conducted EMI
14.1 Equipment
Receiver:
Rohde & Schwartz
ESPI - Test Receiver (9 kHz – 3 GHz)
Model No: ESPI3
LISN:
Rohde & Schartz
Two-Line-V-Network
Model No: ENV216
14.2 EMI Test Set-up
LED driver is placed in a conical metal housing (for self-ballasted lamps; CISPR15
Edition 7.2).
Figure 37 – Conducted Emissions Measurement Set-up.
Showing Down Light Fixture which UUT was Mounted.
Figure 38 – UUT is Mounted Inside the Down Light Fixture in 3 Conditions: 3 Wire – Chassis Grounded to
Earth, 3 Wire Chassis Floating and 2 Wire Connection.
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Figure 39 – Conducted EMI, Maximum Steady-State Load, 230 VAC, 60 Hz, and EN55015 Limits. 2-Wire
Configuration (L-N).
Power Integrations
9 kHz 30 MHz
dBµV
dBµV
SGL
TDF
6DB
1 QP
CLRW
R
2 A
V
CLRW
R
15.May 12 18:41
RBW 9 kHz
MT 500 ms
Att 10 dB AUTO
100 kHz 1 MHz 10 MHz
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
LIMIT CHECK PASS
EN55015A
EN55015Q
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Figure 40 – Conducted EMI Margin for the Above Scan.
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Figure 41 – Conducted EMI, Maximum Steady-State Load, 230 VAC, 60 Hz, and EN55015 Limits. 3-Wire
Configuration (L-N-Earth), Chassis Connected to Earth Terminal.
Power Integrations
9 kHz 30 MHz
dBµV
dBµV
SGL
TDF
6DB
1 QP
CLRWR
2 A
V
CLRWR
RBW 9 kHz
MT 500 ms
Att 10 dB AUTO
16.May 12 08:46
100 kHz 1 MHz 10 MHz
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
LIMIT CHECK PASS
EN55015A
EN55015Q
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Figure 42 – Conducted EMI Margin for the Above Scan.
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Figure 43 – Conducted EMI, Maximum Steady State Load, 230 VAC, 60 Hz, and EN55015 Limits. 3-Wire
Configuration (L-N-Earth), Chassis Floating.
Power Integrations
9 kHz 30 MHz
dBµV
dBµV
SGL
TDF
6DB
1 QP
CLRW
R
2 A
V
CLRW
R
RBW 9 kHz
MT 500 ms
Att 10 dB AUTO
16.May 12 09:43
100 kHz 1 MHz 10 MHz
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
LIMIT CHECK PASS
EN55015A
EN55015Q
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Figure 44 – Conducted EMI Margin for the Above Scan. 3-Wire Configuration (L-N-Earth), Chassis
Floating.
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15 Revision History
Date Author Revision Description and Changes Reviewed
04-Jun-12 JD 1.1 Initial Release Apps & Mktg
12-Oct-12 KM 1.2 Updated Power Supply
Specification Table
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For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.
Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER
INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING,
WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
PATENT INFORMATION
The products and applications illustrated herein (including transformer construction and circuits’ external to the products)
may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications
assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com. Power
Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS,
HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, StackFET, PI Expert and PI FACTS are trademarks of Power
Integrations, Inc. Other trademarks are property of their respective companies. ©Copyright 2012 Power Integrations, Inc.
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Q
1st Floor, St. James’s House
East Street, Farnham
Surrey GU9 7TJ
United Kingdom
Phone: +44 (0) 1252-730-141
Fax: +44 (0) 1252-727-689
e-mail:
eurosales@powerint.com
CHINA (SHENZHEN)
3
rd
Floor, Block A, Zhongtou
International Business Center, No.
1061, Xiang Mei Road, FuTian District,
ShenZhen, China, 518040
Phone: +86-755-8379-3243
Fax: +86-755-8379-5828
e-mail: chinasales@powerint.com
ITALY
Via Milanese 20, 3
rd
. Fl.
20099 Sesto San Giovanni
(MI) Italy
Phone: +39-024-550-8701
Fax: +39-028-928-6009
e-mail:
eurosales@powerint.com
SINGAPORE
51 Newton Road,
#19-01/05 Goldhill Plaza
Singapore, 308900
Phone: +65-6358-2160
Fax: +65-6358-2015
e-mail:
singaporesales@powerint.com
APPLICATIONS HOTLINE
World Wide +1-408-414-
9660
APPLICATIONS FAX
World Wide +1-408-414-
9760
Mouser Electronics
Authorized Distributor
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Power Integrations:
RDK-290