IDT5V9910A 3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCKTM JR. FEATURES: * * * * * * DESCRIPTION: Eight zero delay outputs <250ps of output to output skew Selectable positive or negative edge synchronization Synchronous output enable Output frequency: 15MHz to 85MHz 3 skew grades: IDT5V9910A-2: tSKEW0<250ps IDT5V9910A-5: tSKEW0<500ps IDT5V9910A-7: tSKEW0<750ps 3-level inputs for PLL range control PLL bypass for DC testing External feedback, internal loop filter 12mA balanced drive outputs Low Jitter: <200ps peak-to-peak Available in SOIC package * * * * * * IDT5V9910A The IDT5V9910A is a high fanout phase locked-loop clock driver intended for high performance computing and data-communications applications. It has eight zero delay LVTTL outputs. When the GND/sOE pin is held low, all the outputs are synchronously enabled. However, if GND/sOE is held high, all the outputs except Q2 and Q3 are synchronously disabled. Furthermore, when the VCCQ/PE is held high, all the outputs are synchronized with the positive edge of the REF clock input. When V CCQ/ PE is held low, all the outputs are synchronized with the negative edge of REF. The FB signal is compared with the input REF signal at the phase detector in order to drive the VCO. Phase differences cause the VCO of the PLL to adjust upwards or downwards accordingly. An internal loop filter moderates the response of the VCO to the phase detector. The loop filter transfer function has been chosen to provide minimal jitter (or frequency variation) while still providing accurate responses to input frequency changes. FUNCTIONAL BLOCK DIAGRAM V CCQ /PE GND/sOE Q0 Q1 Q2 Q3 FB PLL REF Q4 Q5 FS Q6 Q7 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SEPTEMBER 2001 1 c 2001 Integrated Device Technology, Inc. DSC 5847/1 IDT5V9910A 3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS(1) Symbol Description Supply Voltage to Ground REF 1 24 G ND V CC Q 2 23 TE ST FS 3 22 NC NC 4 21 G ND/sO E V C C Q /P E 5 20 V CCN VC CN 6 19 Q7 Q0 7 18 Q6 Q1 8 17 G ND G ND 9 16 Q5 S O 24-2 Q2 10 15 Q4 Q3 11 14 V CCN VC CN 12 13 FB VI Unit -0.5 to +7 V DC Input Voltage -0.5 to VCC+0.5 V REF Input Voltage -0.5 to +5.5 V 530 mW -65 to +150 C Maximum Power Dissipation (TA = 85C) TSTG Max Storage Temperature NOTE: 1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. CAPACITANCE(TA = +25C, f = 1MHz, VIN = 0V) Parameter CIN Description Input Capacitance Typ. Max. Unit 5 7 pF NOTE: 1. Capacitance applies to all inputs except TEST and FS. It is characterized but not production tested. SOIC TOP VIEW PIN DESCRIPTION Pin Name Type REF IN Description Reference Clock Input FB IN Feedback Input TEST (1) IN When MID or HIGH, disables PLL (except for conditions of Note 1). REF goes to all outputs. Set LOW for normal operation. GND/ sOE(1) IN Synchronous Output Enable. When HIGH, it stops clock outputs (except Q2 and Q3) in a LOW state - Q2 and Q3 may be used as the VCCQ/PE IN Selectable positive or negative edge control. When LOW/HIGH the outputs are synchronized with the negative/positive edge of the feedback signal to maintain phase lock. Set GND/sOE LOW for normal operation. reference clock. FS(2) IN Frequency range select: FS = GND: 15 to 35MHz FS = MID (or open): 25 to 60MHz FS = VCC: 40 to 85MHz Q0 - Q7 OUT Eight clock output VCCN PWR Power supply for output buffers VCCQ PWR Power supply for phase locked loop and other internal circuitry GND PWR Ground NOTES: 1. When TEST = MID and GND/sOE = HIGH, PLL remains active. 2. This input is wired to Vcc, GND, or unconnected. Default is MID level. If it is switched in the real time mode, the outputs may glitch, and the PLL may require an additional lock time before all data sheet limits are achieved. 2 IDT5V9910A 3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES RECOMMENDED OPERATING RANGE Symbol Description VCC Power Supply Voltage TA Ambient Operating Temperature IDT5V9910A-5, -7 IDT5V9910A-2 (Industrial) (Commercial) Min. Max. Min. Max. Unit 3 3.6 3 3.6 V -40 +85 0 +70 C DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter VIH Input HIGH Voltage Conditions Min. Max. Unit Guaranteed Logic HIGH (REF, FB Inputs Only) 2 -- V -- 0.8 V VCC-0.6 -- V VIL Input LOW Voltage Guaranteed Logic LOW (REF, FB Inputs Only) VIHH Input HIGH Voltage(1) 3-Level Inputs Only VIMM Input MID Voltage(1) 3-Level Inputs Only VCC/2-0.3 VCC/2+0.3 V VILL Input LOW Voltage(1) 3-Level Inputs Only -- 0.6 V IIN Input Leakage Current VIN = VCC or GND -- 5 A -- 200 (REF, FB Inputs Only) VCC = Max. VIN = VCC I3 3-Level Input DC Current (TEST, FS) IPU Input Pull-Up Current (VCCQ/PE) HIGH Level VIN = VCC/2 MID Level -- 50 VIN = GND LOW Level -- 200 -- 100 A VCC = Max., VIN = GND A IPD Input Pull-Down Current (GND/sOE) VCC = Max., VIN = VCC -- 100 A VOH Output HIGH Voltage VCC = Min., IOH = -12mA 2.4 -- V VOL Output LOW Voltage VCC = Min., IOL = 12mA -- 0.55 V NOTE: 1. These inputs are normally wired to VCC, GND, or unconnected. Internal termination resistors bias unconnected inputs to VCC/2. If these inputs are switched, the function and timing of the outputs may be glitched, and the PLL may require an additional tLOCK time before all datasheet limits are achieved. POWER SUPPLY CHARACTERISTICS Symbol Parameter ICCQ Quiescent Power Supply Current Test Conditions(1) VCC = Max., TEST = MID, REF = LOW, Typ.(2) Max. Unit 8 25 mA GND/sOE = LOW, All outputs unloaded ICC Power Supply Current per Input HIGH VCC = Max., VIN = 3V 1 30 A ICCD Dynamic Power Supply Current per Output VCC = Max., CL = 0pF 55 90 A/MHz ITOT Total Power Supply Current VCC = 3.3V, FREF = 25MHz, CL = 160pF(1) 34 -- VCC = 3.3V, FREF = 33MHz, CL = 160pF(1) 42 -- CL = 160pF(1) 76 -- VCC = 3.3V, FREF = 66MHz, NOTE: 1. For eight outputs, each loaded with 20pF. 3 mA IDT5V9910A 3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES INPUT TIMING REQUIREMENTS Description (1) Symbol Min. Max. Unit -- 10 ns/V tR, tF Maximum input rise and fall times, 0.8V to 2V tPWC Input clock pulse, HIGH or LOW 3 -- ns DH Input duty cycle 10 90 % REF Reference clock input 15 85 MHz NOTE: 1. Where pulse width implied by DH is less than tPWC limit, tPWC limit applies. SWITCHING CHARACTERISTICS OVER OPERATING RANGE IDT5V9910A-2 Symbol Parameter FREF Min. REF Frequency Range REF Pulse Width HIGH tRPWL REF Pulse Width LOW(8) tSKEW0 IDT5V9910A-5 Max. Min. Typ. IDT5V9910A-7 Max. Min. Typ. Max. Unit FS = LOW 15 -- 35 15 -- 35 15 -- 35 FS = MED 25 -- 60 25 -- 60 25 -- 60 FS = HIGH 40 -- 85 40 -- 85 40 -- 85 3 -- -- 3 -- -- 3 -- -- ns 3 -- -- 3 -- -- 3 -- -- ns (8) tRPWH Typ. (1,3,4) MHz Zero Output Skew (All Outputs) -- 0.1 0.25 -- 0.25 0.5 -- 0.3 0.75 ns tDEV Device-to-Device Skew(1,2,5) -- -- 0.75 -- -- 1.25 -- -- 1.65 ns tPD REF Input to FB Propagation Delay(1,7) 0 0.5 0 0.7 ns 0 1.2 -0.7 -1.2 0 1.2 ns 1 1.5 0.15 1.5 2.5 ns (1) -0.25 -1.2 0 0.25 0 1.2 -0.5 -1.2 1 1.2 0.15 tODCV Output Duty Cycle Variation from 50% tORISE Output Rise Time(1) 0.15 tOFALL Output Fall Time(1) 0.15 1 1.2 0.15 1 1.5 0.15 1.5 2.5 ns tLOCK PLL Lock Time(1,6) -- -- 0.5 -- -- 0.5 -- -- 0.5 ms RMS -- -- 25 -- -- 25 -- -- 25 ps Peak-to-Peak -- -- 200 -- -- 200 -- -- 200 tJR Cycle-to-Cycle Output Jitter(1) NOTES: 1. All timing and jitter tolerances apply for FNOM > 25MHz. 2. Skew is the time between the earliest and the latest output transition among all outputs with the specified load. 3. tSKEW is the skew between all outlets. See AC TEST LOADS. 4. For IDT5V9910A-2 tSKEW0 is measured with CL = 0pF; for CL = 20pF, tSKEW0 = 0.35ns Max. 5. tDEV is the output-to-output skew between any two devices operating under the same conditions (VCC, ambient temperature, air flow, etc.) 6. tLOCK is the time that is required before synchronization is achieved. This specification is valid only after VCC is stable and within normal operating limits. This parameter is measured from the application of a new signal or frequency at REF or FB until tPD is within specified limits. 7. tPD is measured with REF input rise and fall times (from 0.8V to 2V ) of 1ns. 8. Refer to INPUT TIMING REQUIREMENTS for more detail. 4 IDT5V9910A 3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES AC TEST LOADS AND WAVEFORMS 1ns 1ns VCC 3.0V 2.0V Vth = 1.5V 150 0.8V 0V Outpu t LVTTL Input Test Waveform 150 20p F t OF AL L t O R ISE Test Load 2.0V 0.8V LVTTL Output Waveform AC TIMING DIAGRAM t R EF t RP W L t R PW H REF t PD t O D CV t O D CV FB t JR Q t S K EW t SK E W OTHER Q NOTES: Skew: tSKEW: The time between the earliest and the latest output transition among all outputs when all are loaded with 20pF and terminated with 75 to VCC/2. The skew between all outputs. tDEV: The output-to-output skew between any two devices operating under the same conditions (VCC, ambient temperature, air flow, etc.) tODCV: The deviation of the output from a 50% duty cycle. tORISE and tOFALL are measured between 0.8V and 2V. tLOCK: The time that is required before synchronization is achieved. This specification is valid only after VCC is stable and within normal operating limits. This parameter is measured from the application of a new signal or frequency at REF or FB until t PD is within specified limits. 5 IDT5V9910A 3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ORDERING INFORMATION XXXXX XX Device Type Package ID T X Process CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 Blank I Commercial (0C to +70C) Industrial (-40C to +85C) SO Small Outline IC (300-mil) (SO24-2) 5V9910A-2 5V9910A-5 5V9910A-7 3.3V Low Skew PLL Clock Driver TurboC lock Jr. for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 6 for Tech Support: logichelp@idt.com (408) 654-6459