UT54ACS139/UT54ACTS139 Radiation-Hardened FEATURES PINOUTS 16-Pin DIP Top View IG 1 16 VDD 1A 2 15 2G 1B 3 14 2A 1Y0 1Y1 4 13 2B 5 12 2Y0 1Y2 1Y3 6 7 11 10 2Y1 2Y2 VSS 8 9 2Y3 DESCRIPTION The UT54ACS139 and the UT54ACTS139 are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. The devices consist of two individual two-line to four-line decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications. The devices are characterized over full military temperature range of -55 C to +125 C. FUNCTION TABLE ENABLE INPUTS SELECT INPUTS A Y0 Y1 Y2 Y3 H X X H H H H L L L L H H H L L H H L H H L H L H H L H H 1 16 VDD 1A 2 15 2G 1B 3 14 2A 1Y0 1Y1 4 5 13 12 2B 1Y2 6 11 2Y1 1Y3 VSS 7 8 10 9 2Y2 2Y3 2Y0 LOGIC DIAGRAM B H 1G OUTPUT G L 16-Lead Flatpack Top View H H H L (4) 1G (1) (5) (6) SELECT 1A 1B (3) (7) (15) (11) (10) SELECT 2A 2B 77 1Y1 1Y2 (2) (12) 2G 1Y0 1Y3 DATA * * * * * radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack 2Y0 2Y1 2Y2 (14) (13) (9) 2Y3 RadHard MSI Logic UT54ACS139/UT54ACTS139 LOGIC SYMBOL (2) 1A (3) 1B (1) 1G X/Y 1 (4) 0 2 1 EN 2 (5) (6) (7) 3 (12) (11) (14) 2A (10) (13) 2B (9) (15) 2G 1A 1Y0 1Y1 1B 1Y2 1G DMUX (2) 0 (3) 0 0 3 G --- 1 (1) 1 2 1Y3 3 2Y0 2Y1 2A 2Y2 2B 2Y3 2G (4) (5) (6) (7) (12) (11) (14) (10) (13) (9) (15) 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 Note: 1. Logic symbols in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. RADIATION HARDNESS SPECIFICATIONS 1 PARAMETER LIMIT UNITS Total Dose 1.0E6 rads(Si) SEU Threshold 2 80 MeV-cm2/mg SEL Threshold 120 MeV-cm2/mg Neutron Fluence 1.0E14 n/cm2 Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage -0.3 to 7.0 V VI/O Voltage any pin -.3 to VDD +.3 V TSTG Storage Temperature range -65 to +150 C TJ Maximum junction temperature +175 C TLS Lead temperature (soldering 5 seconds) +300 C Thermal resistance junction to case 20 C/W II DC input current 10 mA PD Maximum power dissipation 1 W JC Note: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RadHard MSI Logic 78 UT54ACS139/UT54ACTS139 RECOMMENDED OPERATING CONDITIONS 79 SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage 4.5 to 5.5 V VIN Input voltage any pin 0 to VDD V TC Temperature range -55 to + 125 C RadHard MSI Logic UT54ACS139/UT54ACTS139 DC ELECTRICAL CHARACTERISTICS 7 (VDD = 5.0V 10%; VSS = 0V 6, -55 C < TC < +125 C) SYMBOL PARAMETER VIL Low-level input voltage 1 ACTS ACS VIH High-level input voltage 1 ACTS ACS IIN CONDITION VIN = V DD or VSS VOL Low-level output voltage 3 ACTS ACS IOL = 8.0mA IOL = 100 A VOH High-level output voltage 3 ACTS ACS IOH = -8.0mA IOH = -100 A Output current10 VIN = VDD or VSS (Sink) VOL = 0.4V Output current10 VIN = VDD or VSS (Source) VOH = VDD - 0.4V Short-circuit output current 2 ,4 ACTS/ACS VO = VDD and VSS Ptotal Power dissipation 2, 8, ,9 IDDQ IOH IOS IDDQ MAX UNIT 0.8 .3VDD V .5VDD .7VDD Input leakage current ACTS/ACS IOL MIN -1 V 1 0.40 0.25 .7VDD VDD - 0.25 A V V 8 mA -8 mA 200 mA CL = 50pF 1.8 mW/ MHz Quiescent Supply Current VDD = 5.5V 10 A Quiescent Supply Current Delta For input under test 1.6 mA ACTS -200 VIN = VDD - 2.1V For all other inputs VIN = VDD or VSS VDD = 5.5V CIN COUT Input capacitance 5 = 1MHz @ 0V 15 pF Output capacitance 5 = 1MHz @ 0V 15 pF RadHard MSI Logic 80 UT54ACS139/UT54ACTS139 Notes: 1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V IH = VIH (min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to VIH(min) and VIL(max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF/MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at frequency of 1MHz and a signal amplitude of 50mV rms maximum. 6. Maximum allowable relative shift equals 50mV. 7. All specifications valid for radiation dose 1E6 rads(Si). 8. Power does not include power contribution of any TTL output sink current. 9. Power dissipation specified per switching output. 10. This value is guaranteed based on characterization data, but not tested. 81 RadHard MSI Logic UT54ACS139/UT54ACTS139 AC ELECTRICAL CHARACTERISTICS 2 (VDD = 5.0V 10%; VSS = 0V 1, -55 C < TC < +125 C) SYMBOL PARAMETER MINIMUM MAXIMUM UNIT tPHL Select to output Yn 2 14 ns tPLH Select to output Yn 2 15 ns tPHL Enable to output Yn 2 14 ns tPLH Enable to output Yn 2 12 ns Notes: 1. Maximum allowable relative shift equals 50mV. 2. All specifications valid for radiation dose 1E6 rads(Si). RadHard MSI Logic 82