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FEATURES
SN74LVCH245A . . . RGY PACKAGE
(TOP VIEW)
1 20
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
OE
B1
B2
B3
B4
B5
B6
B7
A1
A2
A3
A4
A5
A6
A7
A8
DIR
B8 V
GND
CC
SN54LVCH245A . . . J OR W PACKAGE
SN74LVCH245A . . . DB, DGV, DW , NS,
OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
SN54LVCH245A . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A2
A1
DIR
B7
B6 OE
A8
GND
B8 VCC
DESCRIPTION/ORDERING INFORMATION
SN54LVCH245A, SN74LVCH245AOCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCES008O JULY 1995 REVISED DECEMBER 2005
Operate From 1.65 V to 3.6 V I
off
Supports Partial-Power-Down ModeOperationInputs Accept Voltages to 5.5 V
Bus Hold on Data Inputs Eliminates the NeedMax t
pd
of 6.3 ns at 3.3 V
for External Pullup/Pulldown ResistorsTypical V
OLP
(Output Ground Bounce)
Latch-Up Performance Exceeds 250 mA Per<0.8 V at V
CC
= 3.3 V, T
A
= 25 °C
JESD 17Typical V
OHV
(Output V
OH
Undershoot)
ESD Protection Exceeds JESD 22>2 V at V
CC
= 3.3 V, T
A
= 25 °C
2000-V Human-Body Model (A114-A)Support Mixed-Mode Signal Operation on AllPorts (5-V Input/Output Voltage With 200-V Machine Model (A115-A)3.3-V V
CC
)
The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V V
CC
operation, and theSN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V V
CC
operation.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translatorsin a mixed 3.3-V/5-V system environment.
These devices are designed for asynchronous communication between data buses. These devices transmit datafrom the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control(DIR) input. The output-enable ( OE) input can be used to disable the device so the buses are effectively isolated.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables theoutputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup orpulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the inputcircuit and is not disabled by OE or DIR.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1995–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters areInstruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, productionnecessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
www.ti.com
GQN OR ZQN PACKAGE
(TOP VIEW)
1 2 3 4
A
B
C
D
E
SN54LVCH245A, SN74LVCH245AOCTAL BUS TRANSCEIVERSWITH 3-STATE OUTPUTS
SCES008O JULY 1995 REVISED DECEMBER 2005
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
QFN RGY Reel of 1000 SN74LVCH245ARGYR LCH245ATube of 25 SN74LVCH245ADWSOIC DW LVCH245AReel of 2000 SN74LVCH245ADWRSOP NS Reel of 2000 SN74LVCH245ANSR LVCH245ASSOP DB Reel of 2000 SN74LVCH245ADBR LCH245A–40 °C to 85 °C Tube of 70 SN74LVCH245APWTSSOP PW Reel of 2000 SN74LVCH245APWR LCH245AReel of 250 SN74LVCH245APWTTVSOP DGV Reel of 2000 SN74LVCH245ADGVR LCH245AVFBGA GQN SN74LVCH245AGQNR
Reel of 1000 LCH245AVFBGA ZQN (Pb-free) SN74LVCH245AZQNRCDIP J Tube of 20 SNJ54LVCH245AJ SNJ54LVCH245AJ–55 °C to 125 °C CFP W Tube of 85 SNJ54LVCH245AW SNJ54LVCH245AWLCCC FK Tube of 55 SNJ54LVCH245AFK SNJ54LVCH245AFK
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package.
TERMINAL ASSIGNMENTS
1 2 3 4
AA1 DIR V
CC
OE
BA3 B2 A2 B1
CA5 A4 B4 B3
DA7 B6 A6 B5
EGND A8 B8 B7
FUNCTION TABLE
INPUTS
OPERATIONOE DIR
L L B data to A busL H A data to B busH X Isolation
2
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DIR
OE
A1
B1
To Seven Other Channels
1
2
19
18
Absolute Maximum Ratings
(1)
SN54LVCH245A, SN74LVCH245AOCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCES008O JULY 1995 REVISED DECEMBER 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range –0.5 6.5 VV
I
Input voltage range
(2)
–0.5 6.5 VV
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
–0.5 6.5 VV
O
Voltage range applied to any output in the high or low state
(2) (3)
–0.5 V
CC
+ 0.5 VI
IK
Input clamp current V
I
< 0 –50 mAI
OK
Output clamp current V
O
< 0 –50 mAI
O
Continuous output current ±50 mAContinuous current through V
CC
or GND ±100 mADB package
(4)
70DGV package
(4)
92DW package
(4)
58θ
JA
Package thermal impedance GQN/ZQN package
(4)
78 °C/WNS package
(4)
60PW package
(4)
83RGY package
(5)
37T
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.(3) The value of V
CC
is provided in the recommended operating conditions table.(4) The package thermal impedance is calculated in accordance with JESD 51-7.(5) The package thermal impedance is calculated in accordance with JESD 51-5.
3
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Recommended Operating Conditions
(1)
SN54LVCH245A, SN74LVCH245AOCTAL BUS TRANSCEIVERSWITH 3-STATE OUTPUTS
SCES008O JULY 1995 REVISED DECEMBER 2005
SN54LVCH245A SN74LVCH245A
UNITMIN MAX MIN MAX
Operating 2 3.6 1.65 3.6V
CC
Supply voltage VData retention only 1.5 1.5V
CC
= 1.65 V to 1.95 V 0.65 ×V
CC
V
IH
High-level input voltage V
CC
= 2.3 V to 2.7 V 1.7 VV
CC
= 2.7 V to 3.6 V 2 2V
CC
= 1.65 V to 1.95 V 0.35 ×V
CC
V
IL
Low-level input voltage V
CC
= 2.3 V to 2.7 V 0.7 VV
CC
= 2.7 V to 3.6 V 0.8 0.8V
I
Input voltage 0 5.5 0 5.5 VHigh or low state 0 V
CC
0 V
CCV
O
Output voltage V3-state 0 5.5 0 5.5V
CC
= 1.65 V –4V
CC
= 2.3 V –8I
OH
High-level output current mAV
CC
= 2.7 V –12 –12V
CC
= 3 V –24 –24V
CC
= 1.65 V 4V
CC
= 2.3 V 8I
OL
Low-level output current mAV
CC
= 2.7 V 12 12V
CC
= 3 V 24 24t/ v Input transition rise or fall rate 10 10 ns/VT
A
Operating free-air temperature –55 125 –40 85 °C
(1) All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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Electrical Characteristics
SN54LVCH245A, SN74LVCH245AOCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCES008O JULY 1995 REVISED DECEMBER 2005
over recommended operating free-air temperature range (unless otherwise noted)
SN54LVCH245A SN74LVCH245APARAMETER TEST CONDITIONS V
CC
UNITMIN TYP
(1)
MAX MIN TYP
(1)
MAX
V
CC1.65 V to 3.6 V
0.2I
OH
= –100 µA
V
CC2.7 V to 3.6 V
0.2I
OH
= –4 mA 1.65 V 1.2V
OH
VI
OH
= –8 mA 2.3 V 1.72.7 V 2.2 2.2I
OH
= –12 mA
3 V 2.4 2.4I
OH
= –24 mA 3 V 2.2 2.21.65 V to 3.6 V 0.2I
OL
= 100 µA
2.7 V to 3.6 V 0.2I
OL
= 4 mA 1.65 V 0.45V
OL
VI
OL
= 8 mA 2.3 V 0.7I
OL
= 12 mA 2.7 V 0.4 0.4I
OL
= 24 mA 3 V 0.55 0.55I
I
Control inputs V
I
= 0 to 5.5 V 3.6 V ±5±5µAI
off
V
I
or V
O
= 5.5 V 0 ±10 µAV
I
= 0.58 V 251.65 VV
I
= 1.07 V –25V
I
= 0.7 V 452.3 VI
I(hold)
V
I
= 1.7 V –45 µAV
I
= 0.8 V 75 753 VV
I
= 2 V –75 –75V
I
= 0 to 3.6 V
(2)
3.6 V ±500 ±500I
OZ
(3)
V
O
= 0 V or (V
CC
to 5.5 V) 2.3 V to 3.6 V ±15 ±5µAV
I
= V
CC
or GND 10 10I
CC
I
O
= 0 3.6 V µA3.6 V V
I
5.5 V
(4)
10 10One input at V
CC
0.6 V,I
CC
2.7 V to 3.6 V 500 500 µAOther inputs at V
CC
or GNDC
i
Control inputs V
I
= V
CC
or GND 3.3 V 4 12 4 pFC
io
A or B port V
O
= V
CC
or GND 3.3 V 5.5 12 5.5 pF
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25 °C.(2) This is the bus-hold maximum dynamic current required to switch the input from one state to another.(3) For the total leakage current in an I/O port, please consult the I
I(hold)
specification for the input voltage condition 0 V < V
I
< V
CC
, and theI
OZ
specification for the input voltage conditions V
I
= 0 V or V
I
= V
CC
to 5.5 V. The bus-hold current, at input voltage greater than V
CC
, isnegligible.
(4) This applies in the disabled state only.
5
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Switching Characteristics
Switching Characteristics
Operating Characteristics
SN54LVCH245A, SN74LVCH245AOCTAL BUS TRANSCEIVERSWITH 3-STATE OUTPUTS
SCES008O JULY 1995 REVISED DECEMBER 2005
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )
SN54LVCH245A
FROM TO V
CC
= 3.3 VPARAMETER V
CC
= 2.7 V UNIT(INPUT) (OUTPUT) ±0.3 V
MIN MAX MIN MAX
t
pd
A or B B or A 8 1 7 nst
en
OE A or B 9.5 1 8.5 nst
dis
OE A or B 8.5 1 7.5 ns
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )
SN74LVCH245A
FROM TO V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 VPARAMETER V
CC
= 2.7 V UNIT(INPUT) (OUTPUT) ±0.15 V ±0.2 V ±0.3 V
MIN MAX MIN MAX MIN MAX MIN MAX
t
pd
A or B B or A
(1) (1) (1) (1)
7.3 1.5 6.3 nst
en
OE A or B
(1) (1) (1) (1)
9.5 1.5 8.5 nst
dis
OE A or B
(1) (1) (1) (1)
8.5 1.7 7.5 nst
sk(o)
1 ns
(1) This information was not available at the time of publication.
T
A
= 25 °C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 VTESTPARAMETER UNITCONDITIONS
TYP TYP TYP
Outputs enabled
(1) (1)
47Power dissipation capacitanceC
pd
f = 10 MHz pFper transceiver
Outputs disabled
(1) (1)
2
(1) This information was not available at the time of publication.
6
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PARAMETER MEASUREMENT INFORMATION
VM
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 VLOAD
Open
GND
RL
RL
Data Input
Timing Input VI
0 V
VI
0 V
0 V
tw
Input
VOLTAGE W AVEFORMS
SETUP AND HOLD TIMES
VOLTAGE W AVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE W AVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V
VOH - V0 V
VI
VOLTAGE W AVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 .
D. The outputs are measured one at a time with, one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VMVM
VMVM
VMVM
VM
VMVM
VM
VM
VM
VI
VM
VM
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
1 k
500
500
500
VCC RL
2 × VCC
2 × VCC
6 V
6 V
VLOAD CL
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V
VCC
VCC
2.7 V
2.7 V
VI
VCC/2
VCC/2
1.5 V
1.5 V
VM
tr/tf
2 ns
2 ns
2.5 ns
2.5 ns
INPUTS
SN54LVCH245A, SN74LVCH245AOCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCES008O JULY 1995 REVISED DECEMBER 2005
Figure 1. Load Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-9754301Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-9754301QRA ACTIVE CDIP J 20 1 TBD Call TI Call TI
5962-9754301QSA ACTIVE CFP W 20 1 TBD Call TI Call TI
5962-9754301V2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9754301VRA ACTIVE CDIP J 20 20 TBD A42 N / A for Pkg Type
5962-9754301VSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type
SN74LVCH245ADBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI
SN74LVCH245ADBR ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADGVRG4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ANSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN74LVCH245ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APW ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWE4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWG4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI
SN74LVCH245APWR ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWT ACTIVE TSSOP PW 20 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWTE4 ACTIVE TSSOP PW 20 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245APWTG4 ACTIVE TSSOP PW 20 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVCH245ARGYR ACTIVE VQFN RGY 20 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74LVCH245ARGYRG4 ACTIVE VQFN RGY 20 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74LVCH245AZQNR ACTIVE BGA
MICROSTAR
JUNIOR
ZQN 20 1000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
SN74LVCH245AZXYR ACTIVE BGA
MICROSTAR
JUNIOR
ZXY 20 2500 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
SNJ54LVCH245AFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ54LVCH245AJ ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SNJ54LVCH245AW ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 3
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LVCH245A, SN54LVCH245A-SP, SN74LVCH245A :
Catalog: SN74LVCH245A, SN54LVCH245A
Automotive: SN74LVCH245A-Q1, SN74LVCH245A-Q1
Military: SN54LVCH245A
Space: SN54LVCH245A-SP
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 4
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Military - QML certified for Military and Defense Applications
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LVCH245ADBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN74LVCH245ADGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74LVCH245ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74LVCH245ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74LVCH245APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74LVCH245APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74LVCH245APWRG4 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74LVCH245APWT TSSOP PW 20 250 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74LVCH245ARGYR VQFN RGY 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1
SN74LVCH245AZQNR BGA MI
CROSTA
R JUNI
OR
ZQN 20 1000 330.0 12.4 3.3 4.3 1.6 8.0 12.0 Q1
SN74LVCH245AZXYR BGA MI
CROSTA
R JUNI
OR
ZXY 20 2500 330.0 12.4 2.8 3.3 1.0 4.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVCH245ADBR SSOP DB 20 2000 367.0 367.0 38.0
SN74LVCH245ADGVR TVSOP DGV 20 2000 367.0 367.0 35.0
SN74LVCH245ADWR SOIC DW 20 2000 367.0 367.0 45.0
SN74LVCH245ANSR SO NS 20 2000 367.0 367.0 45.0
SN74LVCH245APWR TSSOP PW 20 2000 364.0 364.0 27.0
SN74LVCH245APWR TSSOP PW 20 2000 367.0 367.0 38.0
SN74LVCH245APWRG4 TSSOP PW 20 2000 367.0 367.0 38.0
SN74LVCH245APWT TSSOP PW 20 250 367.0 367.0 38.0
SN74LVCH245ARGYR VQFN RGY 20 3000 367.0 367.0 35.0
SN74LVCH245AZQNR BGA MICROSTAR
JUNIOR ZQN 20 1000 340.5 338.1 20.6
SN74LVCH245AZXYR BGA MICROSTAR
JUNIOR ZXY 20 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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