UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
1
FEATURES
• Organized 65,536 x 8
• High-reliability MIL-PRF-38535 processing
• Single +5V ±10% power supply
• Pin-compatible with existing 512K read-only memories (ROMs)
and electrically programmable ROMs (EPROMs)
• All inputs/outputs fully TTL compatible
• Power-saving CMOS technology
• Very high-speed SNAP! Pulse Programming
• 3-state output buffers
• 400mV minimum DC noise immunity with standard TTL loads
• Latchup immunity of 250mA on all input and output lines
• Low power dissipation (CMOS input levels)
3Active - 193mW (MAX)
3Standby - 1.7mW (MAX)
OPTIONS MARKING
• Timing
150ns access -15
200ns access -20
250ns access -25
• Package(s)
Ceramic DIP (600mils) J No. 110
• Operating Temperature Ranges
Military (-55oC to +125oC) M
PIN ASSIGNMENT
(Top View)
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-87648
• MIL-STD-883
512K UVEPROM
UV Erasable Programmable
Read-Only Memory
For more products and information
please visit our web site at
www.micross.com
GENERAL DESCRIPTION
The SMJ27C512 is a set of 65536 by 8-bit (524,288-bit),
ultraviolet (UV) light erasable, electrically programmable
read-only memories. These devices are fabricated using power-
saving CMOS technology for high speed and simple interface
with MOS and bipolar circuits. All inputs (including program
data inputs can be driven by Series 54 TTL circuits without
the use of external pullup resistors. Each output can drive one
Series 54 TTL circuit without external resistors. The data out-
puts are 3-state for connecting multiple devices to a common
bus. The SMJ27C512 is pin-compatible with existing 28-pin
512K ROMs and EPROMs.
Because this EPROM operates from a single 5V supply
(in the read mode), it is ideal for use in microprocessor-based
systems. One other supply (13V) is needed for programming.
All programming signals are TTL level. This device is pro-
grammable by the SNAP! Pulse programming algorithm. The
SNAP! Pulse programming algorithm uses a VPP of 13V and
a VCC of 6.5V for a nominal programming time of seven sec-
onds. For programming outside the system, existing EPROM
programmers can be used. Locations may be programmed
singly, in blocks, or at random.
28-Pin DIP (J) 600-Mils
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
Vcc
A14
A13
A8
A9
A11
G\/VPP
A10
E\
DQ7
DQ6
DQ5
DQ4
DQ3
Pin Name Function
A0 - A15 Address Inputs
DA0-DQ7 Inputs (programming)/Outputs
E\ Chip Enable/Power Down
GND Ground
G\ /V
PP
Output Enable/13V Programming
V
CC
5V Power Supply
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
2
FUNCTIONAL BLOCK DIAGRAM*
OPERATION
The seven modes of operation for the SMJ27C512 are listed in Table 1. The read mode requires a single 5V supply. All
inputs are TTL level except for VPP during programming (13V for SNAP! Pulse), and 12V on A9 for signature mode.
TABLE 1. OPERATION MODES
* X can be VIL or VIH
A0
A1
A2
A3
A4
A5 DQ0
A6 DQ1
A7 DQ2
A8 DQ3
A9 DQ4
A10 DQ5
A11 DQ6
A12 DQ7
A13
A14
A15
E\
G\ /VPP
&
10
[PWR DWN]
9
8
7
6
5
4
3
25
24
21
23
2
26
27
1
20
22 EN
A
A
A
A
A
A
A
A
11
12
13
15
16
17
18
19
EPROM 65,536 x 8
0
15
A0
65,535
READ OUTPUT
DISABLE STANDBY PROGRAMMING VERIFY PROGRAM
INHIBIT
E\ (20) VIL VIL VIH VIL VIL VIH
G\ /VPP (22) VIL VIH XVPP VIL VPP
VCC (28) VCC VCC VCC VCC VCC VCC
A9 (24) X X X X X X VID VID
A0 (10) X X X X X X VIL VIH
MFG DEVICE
97h 85h
Data In Data Out High-Z
CODE
FUNCTION
(PINS) SIGNATURE MODE
MODE*
DQ0-DQ7
(11-13, 15-19)
VCC
VIL
VIL
Data Out High-Z High-Z
* This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
3
READ/OUTPUT DISABLE
When the outputs of two or more SMJ27C512 are connected
in parallel on the same bus, the output of any particular device
in the circuit can be read with no interference from competing
outputs of the other devices. To read the output of the selected
SMJ27C512, a low-level signal is applied to the E\ and G\ /
VPP. All other devices in the circuit should have their outputs
disabled by applying a high-level signal to one of these pins.
Output data is accessed at pins DQ0 through DQ7.
LATCHUP IMMUNITY
Latchup immunity on the SMJ27C512 is a minimum of 250mA
on all inputs and outputs. This feature provides latchup im-
munity beyond any potential transients at the printed circuit
board level when the EPROM is interfaced to industry-standard
TTL or MOS logic devices. Input/output layout approach
controls latchup without compromising performance or pack-
ing density.
POWER DOWN
Active ICC supply current can be reduced from 35mA to
500μA(TTL-level inputs) or 300μA (CMOS-level inputs) by
applying a high TTL/CMOS signal to the E\ pin. In this mode
all outputs are in the high-impedance state.
ERASURE
Before programming, the SMJ27512 is erased by exposing the
chip through the transparent lid to a high-intensity ultraviolet
(UV) light (wavelength 2537 Å). EPROM erasure before
programming is necessary to assure that all bits are in the
logic-high state. Logic lows are programmed into the desired
locations. A programmed logic low can be erased only by ul-
traviolet light. The recommended minimum exposure dose (UV
intensity x exposure time) is 15 W.s/cm2. A typical 12mW/cm2,
fi lterless UV lamp erases the device in 21 minutes. The lamp
should be located about 2.5cm above the chip during erasure.
After erasure, all bits are in the high state. It should be noted
that normal ambient light contains the correct wavelength for
erasure; therefore, when using the SMJ27C512, the window
should be covered with an opaque label.
SNAP! PULSE PROGRAMMING
The SMJ27C512 is programmed using the SNAP! Pulse
programming algorithm as illustrated by the fl owchart in
Figure 1. This algorithm programs in a nominal time of seven
seconds. Actual programming time varies as a function of the
programmer used.
Data is presented in parallel (eight bits) on pins DQ0 to DQ7.
Once addresses and data are stable, E\ is pulsed. The SNAP!
Pulse programming algorithm uses an initial pulse of 100μs
followed by a byte verifi cation to determine when the addressed
byte has been successfully programmed. Up to ten 100μs pulses
per byte are provided before a failure is recognized.
The programming mode is achieved when G\ /VPP = 1 3 V,
VCC= 6.5V, and E\ = VIL. More than one device can be pro-
grammed when the devices are connected in parallel. Locations
can be programmed in any order. When the SNAP! Pulse pro-
gramming routine is complete, all bits are verifi ed with VCC =
5V, G\ /VPP = VIL, and E\ = VIL.
PROGRAM INHIBIT
Programming can be inhibited by maintaining high level
input on E\.
PROGRAM VERIFY
Programmed bits can be verifi ed with G\ /VPP and E\ = VIL.
SIGNATURE MODE
The signature mode provides access to a binary code
identifying the manufacturer and device type. This mode is
activated when A9 (terminal 24) is forced to 12V ±0.5V. Two
identifi er bytes are accessed by A0 (terminal 10); i.e., A0 =
VIL accesses the manufacturer code, which is output on DQ0-
DQ7; A0 = VIH accesses the device code, which is also output
on DQ0-DQ7. All other addresses must be held at VIL. Each
byte possesses odd parity on bit DQ7. The manufacturer code
for these devices is 97h and the device code is 85h.
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
4
FIGURE 1. SNAP! PULSE PROGRAMMING FLOW CHART
START
Address = First Location
Increment Address
X = 0
Last
Address?
V
CC
= 5V ± 0.5V, G\ /V
PP
= V
IL
Compare
All Bytes
to Original
Data
Device Passed
Increment
Address
Address = First Location
V
CC
= 6.5V ± 0.25V, G\ /V
PP
= 13V ± 0.25V
Program One Pulse = t
W
= 100μs
Last
Address?
X = X+1 X = 10?
Program One Pulse = t
W
= 100μs
No
Fail
No
Yes
Verify
Word
No
Pass
Device Failed
Yes Yes
Pass
Fail
Program
Mode
Interactive
Mode
Final
Verification
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
5
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operation
section of this specifi cation is not implied. Exposure to
absolute maximum rating conditions for extended periods may
affect reliability.
** All voltage values are with respect to GND.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage Range, VCC**...........................-0.6V to +7.0V
Supply Voltage Range, Vpp**.........................-0.6V to +14.0V
Input Voltage Range, All inputs except A9**....-0.6V to 6.5V
A9....-0.6V to +13.5V
Output Voltage Range**...............................-0.6V to VCC +1V
Operating Cage Temperature Range, TC.........-55°C to 125°C
Storage Temperature Range, Tstg.....................-65°C to 150°C
RECOMMENDED OPERATING CONDITIONS
NOTES:
1. VCC must be applied before or at the same time as G\ /VPP and removed after or at the same time as G\ /VPP. The deivce must not be inserted into or
removed from the board when G\ /VPP or VCC is applied.
2. G\ /VPP can be connected to VCC directly (except in the program mode). VCC supply current in this case is ICC + IPP.
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES OF
OPERATING CONDITIONS
NOTES:
1. Typical values are at TC=25°C and nominal voltages.
2. This parameter has been characterized at 25°C and is not production tested.
MIN NOM MAX UNIT
4.5 5 5.5 V
6.25 6.5 6.75 V
G\ /VPP Supply Voltage212.75 13 13.25 V
VID 11.5 12.5 V
TTL 2 VCC+1 V
CMOS VCC-0.2 VCC+1 V
TTL -0.5 0.8 V
CMOS -0.5 0.2 V
TC-55 125 °C
VCC
Read Mode
SNAP! Pulse programming algorithm
Supply Voltage1
VIL Low-level DC input voltage
Operating case temperature
SNAP! Pulse programming algorithm
High-level DC input voltageVIH
Voltage level on A9 for signature mode
TEST CONDITIONS MIN TYP1MAX
VOH IOH = -400μA2.4
VOL IOL = 2.1mA 0.4
IIVI = 0V to 5.5V 10
IOVO = 0V to VCC 10
IPP G\ /VPP = 13V 35 70
TTL-Input Level VCC = 5.5V, E\=VIH 500
CMOS-Input Level VCC = 5.5V, E\=VCC 325
ICC2
E\=VIL, VCC=5.5V
tcycle = minimum cycle time,
outputs open
35 50
High-level output voltage
Low-level output voltage
VCC supply current (active)
PARAMETER
ICC1 VCC supply current (standby)
Input current (leakage)
G\ /VPP supply current (during program pulse)2
Output current (leakage)
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
6
CAPACITANCE OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND
OPERATING CASE TEMPERATURE, f = 1MHz*
* Capacitance measurements are made on sample basis only.
** All typical values are at TC = 25°C and nominal voltages.
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLT-
AGE AND OPERATING CASE TEMPERATURE
NOTES:
1. Timing measurements are made at 2V for logic high and 0.8V for logic low. (see Figure 2)
2. Common test conditions apply for tdis except during programming.
3. Value calculated from 0.5V delta to measured output level. This parameter is only sampled and not 100% tested.
RECOMMENDED TIMING REQUIREMENTS FOR PROGRAMMING: VCC = 6.5V and G\ /VPP =
13V (SNAP! Pulse), TC = 25°C (see Figure 2)
TEST CONDITIONS TYP** UNIT
C
I
Input capacitance V
I
= 0V 6pF
C
O
Output capacitance V
O
= 0V 10 pF
C
G
/V
PP
G\ /V
PP
input capacitance G\ /V
PP
= 0V 20 pF
PARAMETER
MIN MAX MIN MAX MIN MAX
ta(A) Access time from address 150 200 250 ns
ta(E) Access time from E\ 150 200 250 ns
ten(G) Output enable time from G\ /VPP 70 75 100 ns
tdis
Output disable time from G\ /VPP or E\,
whichever occurs first3050060060 ns
tv(A)
Output data valid time after change of
address, E\, or G\, whichever occurs first3000 ns
UNIT
TEST
CONDITIONS1,2
PARAMETER -15 -25
See Figure 2
-20
MIN NOM MAX UNIT
tdis(E) 0 130 ns
th(A) 0μs
th(D) 2μs
th(VPP) 2μs
tw(IPGM) 95 100 105 μs
trec(PG) 2μs
tsu(A) 2μs
tsu(D) 2μs
tsu(VPP) 2μs
tsu(VCC) 2μs
tv(ELD) 1μs
tr(PG) 50 ns
Pulse Duration, Initial Program
Data Valid from E\ Low
Output Disable Time from E\
Hold Time, address
Recovery Time, G\ /VPP
Hold Time, Data
Hold Time, G\ /VPP
Setup Time, Address
Setup Time, Data
Setup Time, G\ /VPP
Setup Time, VCC
G\ /VPP Rise Time
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
7
PARAMETER MEASUREMENT INFORMATION
NOTES:
1. CL includes probe and fi xture capacitance.
2.08V
Output Under Test
RL = 800Ω
CL = 100 pF1
FIGURE 3. READ-CYCLE TIMING
AC testing inputs are driven at 2.4V for logic high and 0.4V for logic low. Timing measurements are
made at 2V for logic high and 0.8V for logic low for both inputs and outputs.
FIGURE 2. LOAD CIRCUIT AND VOLTAGE WAVEFORM
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
8
FIGURE 4. PROGRAM-CYCLE TIMING (SNAP! PULSE PROGRAMMING)
NOTES:
1. G\ /VPP = 13V and VCC = 6.5V for SNAP! Pulse programming.
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
9
MECHANICAL DEFINITION*
NOTE: These dimensions are per the SMD. Micross’ package dimensional limits
may differ, but they will be within the SMD limits.
*All measurements are in inches.
Micross Case #110 (Package Designator J)
SMD 5962-87648, Case Outline X
S2 A
Q
L
eb
b2
S1
eA
c
D
E
Pin 1
MIN MAX
A --- 0.232
b 0.014 0.026
b2 0.045 0.065
c 0.008 0.018
D --- 1.490
E 0.500 0.610
eA
e
L 0.125 0.200
Q 0.015 0.060
S1 0.005 ---
S2 0.005 ---
SYMBOL
0.100 BSC
SMD SPECIFICATIONS
0.600 BSC
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
10
*AVAILABLE PROCESSES
M = Extended Temperature Range -55oC to +125oC
ORDERING INFORMATION
Device Number Speed
ns
Package
Type
Operating
Temp.
SMJ27C512 -15 J *
SMJ27C512 -20 J *
SMJ27C512 -25 J *
EXAMPLE: SMJ27C512-25JM
UVEPROM
SMJ27C512
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifi cations without notice.
11
MICROSS TO DSCC PART NUMBER
CROSS REFERENCE*
Micross Package Designator J
TI Part #** SMD Part #
SMJ27C512-15JM 5962-8764801XA
SMJ27C512-20JM 5962-8764802XA
SMJ27C512-25JM 5962-8764803XA
* Micross part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
** Parts are listed on SMD under the old Texas Instruments part number. Micross purchased this product line in November of 1999.
