○Product structure：Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays
. 1/22
TSZ02201-0J2J0A601010-1-2
© 2015 ROHM Co., Ltd. All rights reserved.
02.Nov.2015 Rev.001
TSZ22111・14・001
www.rohm.com
0.95V to VCC-1V, 2A 1ch
Ultra Low Drop Linear Regulator
BD3523HFN
General Description
The BD3523HFN is an ultra low-dropout linear chipset
regulator that operates from a very low input supply. It
offers ideal performance in low input voltage to low
output voltage applications. The input-to-output voltage
difference is minimized by using a built-in N-Channel
power MOSFET with a maximum ON-Resistance of
RON=150mΩ(Max). By lowering the dropout voltage, the
regulator achieves high output current of up to
(IOUTMAX=2.0A), thereby, reducing conversion loss,
making it comparable to switching regulator and its
power transistor, choke coil, and rectifier diode
constituents. BD3523HFN is a low-cost design and is
available in significantly downsized package profiles. Its
external resistor allows the entire range of output
voltage configurations between 0.65V and 2.7V, while
the NRCS (soft start) function enables a controlled
output voltage ramp-up, which can be programmed to
whatever power supply sequence is required.
Features
Internal High-Precision Reference Voltage Circuit
(0.65V±1%)
Built-in VCC Undervoltage Lockout Circuit
(VCC=3.80V)
NRCS (Soft start) Function Reduces the Magnitude
of In-rush Current
Internal N-Channel MOSFET
Built-in Short Circuit Protection (SCP)
Built-in Current Limit Circuit (2.0A min)
Built-in Thermal Shutdown (TSD) Circuit
Tracking Function
Key Specifications
IN Input Voltage Range: 0.95V to VCC-1V
VCC Input Voltage Range: 4.3V to 5.5V
Output Voltage Range: 0.65V to 2.7V
Output Current: 2.0A (Max)
ON-Resistance: 100mΩ(Typ)
Standby Current: 0μA (Typ)
Operating Temperature Range: -10°C to +100°C
Package W(Typ) x D(Typ) x H(Max)
Applications
Notebook computers, Desktop computers, LCD-TV,
DVD, Digital appliances
Typical Application Circuit and Block Diagram
HSON8
2.90mm x 3.00mm x 0.60mm
Reference
Block
VIN
UVLOLATCH
Current
Limit
VCC
VCC
VCC
VCC
EN
UVLO1
UVLO2
VREF1
GND
CL
UVLO1
UVLO2
TSD
SCP
EN
UVLO1
CL
VCC
VREF2
IN
OUT
FB
IN
OUT
NRCS
1
EN
2
3
8
5
4
NRCS
TSD
NRCS0.3.
VREF1 x 0.4
FB
SCP/TSD
LATCH
LATCH
EN
UVLO1
EN/UVLO
NRCS
C1
C2
7
CNRCS
C3
CFB
R2
R1
6
Datashee
t
Datashee
t
2/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
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TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Pin Configuration
Pin Descriptions
Description of Blocks
1. AMP
This is an error amp that compares the reference voltage (0.65V) with FB voltage to drive the output N-Channel FET.
Frequency optimization aids in attaining rapid transient response, and to support the use of ceramic capacitors on the
output. AMP output voltage ranges from GND to VCC. When EN is OFF, or when UVLO is active, output goes LOW
and the output of the N-Channel FET switches to OFF state.
2. EN
The EN block controls the ON and OFF state of the regulator via the EN logic input pin. During OFF state, circuit
voltage stabilizes at 0μA, which minimizes the current consumption during standby mode. The FET is switched ON to
enable discharge of the NRCS and OUT, thereby draining the excess charge and preventing the load side of an IC
from malfunctioning. Since there is no electrical connection required (e.g. between the VCC pin and the ESD
prevention diode), module operation is independent of the input sequence.
3. VCCUVLO
To prevent malfunctions that can occur during a sudden decrease in VCC, the UVLO circuit switches the output OFF
state, and (like the EN block) discharges NRCS and OUT. Once the UVLO threshold voltage (TYP3.80V) is reached,
the power-ON reset is triggered and the output is restored.
4. INUVLO
When IN voltage exceeds the threshold voltage, INUVLO becomes active. Once active, the status of output voltage
remains ON even if IN voltage drops. (When IN voltage drops, SCP engages and output switches OFF.)
Unlike EN and VCC, it is active at output startup. INUVLO can be restored either by reconnecting the EN pin or VCC
pin.
5. CURRENT LIMIT
During ON state, the current limit function monitors the output current of the IC against the limit value. When the
output current exceeds this value, this block lowers the output current to protect the load of the IC. When it overcomes
the overcurrent state, output voltage is restored to the normal value. However, when output voltage falls to or below the
SCP startup voltage, the SCP function becomes active and the output switches OFF.
6. NRCS (Non Rush Current on Start-up)
The soft start function enabled by connecting an external capacitor between the NRCS pin and GND. Output ramp-up
can be set for any period up to the time the NRCS pin reaches VFB (0.65V). During startup, the NRCS pin serves as a
20μA (TYP) constant current source to charge the external capacitor. Output start time is calculated by the formula
below.
Pin No.
Pin Name
Pin Function
1
VCC
Power supply pin
2
EN
Enable input pin
3
NRCS
In-rush current protection
(NRCS) capacitor connection pin
4
IN
Input voltage pin
5
OUT
Output voltage pin
6
OUT
Output voltage pin
7
FB
Reference voltage feedback pin
8
GND
Ground pin
-
FIN
Connected to heatsink and GND
NRCS
FBNRCSP
NRCS IVC
typT
TOP VIEW
VCC
EN
NRCS
IN
FIN
GND
FB
OUT
OUT
3/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
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TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Description of Blocks –continued
7. TSD (Thermal Shut down)
The shutdown (TSD) circuit is automatically latched OFF when the chip temperature exceeds the threshold
temperature after the programmed time period elapses, thus protecting the IC against “thermal runaway” and heat
damage. Since the TSD circuit is designed only to shut down the IC in the occurrence of extreme heat, it is important
that the Tj (max) parameter should not be exceeded in the thermal design, in order to avoid potential problems with the
TSD.
8. IN
The IN line acts as the major current supply line, and is connected to the output N-Channel FET drain. Since there is
no electrical connection (such as between the VCC pin and the ESD protection diode) required, IN operates
independent of the input sequence. However, since an output N-Channel FET body diode exists between IN and OUT,
a IN-OUT electric (diode) connection is present. Therefore, when output is switched ON or OFF, reverse current may
flow from IN to OUT.
9. SCP
When output voltage (OUT) drops, the IC assumes that OUT pin is shorted to GND and switches the output voltage
OFF. After the GND short has been detected and the programmed delay time has elapsed, output is latched OFF. SCP
is also effective during output startup. SCP condition can be cleared either by reconnecting the EN pin or VCC pin.
Delay time is calculated by the formula below.
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Limit
Unit
Input Voltage 1
VCC
+6.0 (Note 1)
V
Input Voltage 2
VIN
+6.0 (Note 1)
V
Maximum Output Current
IOUT
2 (Note 1)
A
Enable Input Voltage
VEN
-0.3 to +6.0
V
Power Dissipation 1
Pd1
0.63 (Note 2)
W
Power Dissipation 2
Pd2
1.35 (Note 3)
W
Power Dissipation 3
Pd3
1.75 (Note 4)
W
Operating Temperature Range
Topr
-10 to +100
°C
Storage Temperature Range
Tstg
-55 to +125
°C
Maximum Junction Temperature
Tjmax
+150
°C
(Note 1) Should not exceed Pd.
(Note 2)Derate by 5.04mW/°C Ta above 25°C (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 1-layer, copper foil area : less than 0.2%)
(Note 3)Derate by 10.8mW/°C Ta above 25°C (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 1-layer, copper foil area : less than 7.0%)
(Note 4)Derate by 14.0mW/°C Ta above 25°C (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 1-layer, copper foil area : less than 65.0%)
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta=25°C)
Parameter
Symbol
Rating
Unit
Min
Max
Input Voltage 1
VCC
4.3
5.5
V
Input Voltage 2
VIN
0.95
VCC-1 (Note 5)
V
Output Voltage Setting Range
VOUT
VFB
2.7
V
Enable Input Voltage
VEN
-0.3
+5.5
V
NRCS Capacitance
CNRCS
0.001
1
μF
(Note 5) VCC and IN do not have to be implemented in the order listed.
4/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, VCC=5V, VEN=3V, VIN=1.7V, R1=3.9kΩ, R2=3.3kΩ)
Parameter
Symbol
Limit
Unit
Conditions
Min
Typ
Max
Bias Current
ICC
-
0.7
1.2
mA
VCC Shutdown Mode Current
IST
-
0
10
μA
VEN=0V
Output Current
IOUT
2.0
-
-
A
Feedback Voltage 1
VFB1
0.643
0.650
0.657
V
Feedback Voltage 2
VFB2
0.637
0.650
0.663
V
Tj=-10°C to +100°C
Line Regulation 1
Reg.l1
-
0.1
0.5
%/V
VCC=4.3V to 5.5V
Line Regulation 2
Reg.l2
-
0.1
0.5
%/V
VIN=1.2V to 3.3V
Load Regulation
Reg.L
-
0.5
10
mV
IOUT=0A to 2A
Output ON-Resistance
RON
-
100
150
mΩ
IOUT=2A,VIN=1.2V,
Tj=-10°C to +100°C
Standby Discharge Current
IDEN
1
-
-
mA
VEN=0V, VOUT=1V
[ENABLE]
Enable Pin Input Voltage High
VENHIGH
2
-
-
V
Enable Pin Input Voltage Low
VENLOW
0
-
0.8
V
Enable Input Bias Current
IEN
-
7
10
μA
VEN=3V
[FEEDBACK]
Feedback Pin Bias Current
IFB
-100
0
+100
nA
[NRCS]
NRCS Charge Current
INRCS
12
20
28
μA
NRCS Standby Voltage
VSTB
-
0
50
mV
VEN=0V
[UVLO]
VCC Undervoltage Lockout
Threshold Voltage
VCCUVLO
3.5
3.8
4.1
V
VCC: Sweep-up
VCC Undervoltage Lockout
Hysteresis Voltage
VCCHYS
100
160
220
mV
VCC: Sweep-down
IN Undervoltage Lockout
Threshold Voltage
VINUVLO
0.55
0.65
0.75
V
IN: Sweep-up
[SCP]
SCP Start up Voltage
VOUTSCP
VOUT x 0.3
VOUT x 0.4
VOUT x 0.5
V
SCP Threshold Voltage
tSCP
45
90
200
μsec
5/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Typical Waveforms
Figure 1. Transient Response
(0A to 2A)
COUT=100μF
CFB=1000pF
Figure 2. Transient Response
(0A to 2A)
COUT=47μF
CFB=1000pF
Figure 3. Transient Response
(0A to 2A)
COUT=22μF
CFB=1000pF
Figure 4. Transient Response
(2A to 0A)
COUT=100μF
CFB=1000pF
2A/div
VOUT
IOUT
50mV/div
t(10μsec/div)
66mV
2A
2A/div
VOUT
t(10μsec/div)
91mV
2A
IOUT
50mV/div
t(10μsec/div)
2A
108mV
2A/div
IOUT
VOUT
50mV/div
2A
51mV
t(10μsec/div)
2A/div
IOUT
VOUT
50mV/div
6/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Typical Waveforms – continued
Figure 5. Transient Response
(2A to 0A)
COUT=47μF
CFB=1000pF
Figure 6. Transient Response
(2A to 0A)
COUT=22μF
CFB=1000pF
Figure 7. Waveform at Output Start
Figure 8. Waveform at Output OFF
t(10μsec/div)
80mV
2A
2A/div
IOUT
VOUT
50mV/div
t(10μsec/div)
98mV
2A
2A/div
IOUT
VOUT
50mV/div
t(200μsec/div)
VEN
VNRCS
VOUT
t(200μsec/div)
VEN
VNRCS
VOUT
7/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Typical Waveforms – continued
Figure 9. Input Sequence
Figure 10. Input Sequence
Figure 11. Input Sequence
Figure 12. Input Sequence
VCC
VEN
VIN
VOUT
VCC to VIN to VEN
VIN to VCC to VEN
VCC
VEN
VIN
VOUT
VEN to VCC to VIN
VCC
VEN
VIN
VOUT
VCC
VEN
VIN
VOUT
VCC to VEN to VIN
9/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Typical Performance Curve
Figure 17. IIN vs Junction Temperature
1.0
1.2
1.4
1.6
1.8
2.0
-50 -25 0 25 50 75 100 125 150
Tj [℃]
IIN [mA]
IIN [mA]
Junction Temperature : Tj [°C]
Figure 18. IST vs Junction Temperature
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-50 -25 0 25 50 75 100 125 150
Tj [℃]
ISTB [μA]
IST [µA]
Junction Temperature : Tj [°C]
Figure 16. Circuit Current vs Junction Temperature
0.4
0.5
0.6
0.7
0.8
0.9
-50 -25 025 50 75 100 125 150
Tj [℃]
Icc [mA]
Junction Temperature : Tj [°C]
Circuit Current : ICC [mA]
Figure 15. Output Voltage vs Junction Temperature
(IOUT=0mA)
1.15
1.17
1.19
1.21
1.23
1.25
-50 -25 025 50 75 100 125 150
Tj [℃]
Vo [V]
Junction Temperature : Tj [°C]
Output Voltage : VOUT [V]
10/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Typical Performance Curve – continued
Figure 21. Enable Pin Bias Current vs Junction
Temperature
0
1
2
3
4
5
6
7
8
9
10
-50 -25 0 25 50 75 100 125 150
Tj [℃]
IEN [ μA]
Junction Temperature : Tj [°C]
Enable Pin Bias Current : IEN [µA]
Figure 22. Output ON-Resistance vs Junction Temperature
(VCC=5V/VOUT=1.2V)
50
70
90
110
130
150
-50 -25 0 25 50 75 100 125 150
Tj [℃]
RON [mΩ]
Junction Temperature : Tj [°C]
Output ON-Resistance : RON [µmΩ]
Figure 20. NRCS Charge Current vs Junction
Temperature
10
11
12
13
14
15
16
17
18
19
20
-50 -25 0 25 50 75 100 125 150
Tj [℃]
INRCS [μA]
Junction Temperature : Tj [°C]
NRCS Charge Current : INRCS [µA]
Figure 19. IINSTB vs Junction Temperature
0
5
10
15
20
25
30
-50 -25 025 50 75 100 125 150
Tj [℃]
IINSTB [μA]
Junction Temperature : Tj [°C]
IINSTB [µA]
11/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Typical Performance Curve – continued
Figure 23. Output ON-Resistance vs VCC
75
85
95
105
115
125
135
3 4 5 6 7 8
Tj [℃]
RON [mΩ]
VOUT=1.0V
VOUT=2.5V
VOUT=1.8V
VOUT=1.5V
VOUT=1.2V
Supply Voltage : VCC [V]
Output ON-Resistance : RON [mΩ]
14/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Application Information
1. Evaluation Board
■
■
BD3523HFN Evaluation Board List
Component
Rating
Manufacturer
Product Name
Component
Rating
Manufacturer
Product Name
U1
-
ROHM
BD3523HFN
C13
1000pF
MURATA
GRM188B11H102KD
C1
1μF
MURATA
GRM188B11A105KD
R1
3.9kΩ
ROHM
MCR03EZPF3901
C3
10μF
KYOCERA
CM32X5R106M10A
R2
3.3kΩ
ROHM
MCR03EAPF3301
C5
22μF
KYOCERA
CM32X5R226M10A
R4
0Ω
-
Jumper
C11
0.01μF
MURATA
GRM188B11H103KD
R8
0Ω
-
Jumper
■
■
BD3523HFN Evaluation Board Layout
(2nd layer and 3rd layer are GND line.)
■
■
BD3523HFN Evaluation Board Schematic
Silk Screen
U1
BD3523HFN
1
2
3
4
8
7
6
5
VCC
VCC
VCC
GND
GND
TP1
OUT
FB
GND
OUT
NRCS
IN
R4
R8
C5
C6
C8
C9
R3
R7
R6
R5
U2
SW1
C2
C3
C7
C4
C11
C12
C1
EN
7 5 6 8
4
3 2 1
GND_S
OUT_S
GND
GND
GND
C13
GND
TP2
VCC
JPF2
JPF1
R9
C14
2
3
4
5
IN_S
U3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R2
R1
TOP Layer
Bottom Layer
15/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
2. Recommended Circuit Example
Component
Recommended
Value
Programming Notes and Precautions
R1/R2
3.9k/3.3k
IC output voltage can be set by internal reference voltage (VFB) and a value of the output
voltage setting resistance (R1, R2). Select resistance values that will avoid the impact of the
FB bias current (±100nA). The recommended total resistance value is 10kΩ.
C3
22μF
To ensure output voltage stability, make sure that the output capacitors are connected
between OUT pin and GND. Output capacitors play a role in loop gain phase compensation
and in mitigating output fluctuation during rapid changes in load level. Insufficient
capacitance may cause oscillation, while high equivalent series reisistance (ESR) will
exacerbate output voltage fluctuation under rapid load change conditions. While a 22μF
ceramic capacitor is recomended, actual stability is highly dependent on temperature and
load conditions. Also, note that connecting different types of capacitors in series may result
in insufficient total phase compensation, thus causing oscillation. Please confirm operation
across a variety of temperature and load conditions.
C1/ C2
1μF/10μF
Input capacitors reduce the output impedance of the voltage supply source connected to
the input pin (VCC, IN). If the impedance of this power supply were to increase, input
voltage (VCC, VIN) could become unstable, leading to oscillation or lowered ripple rejection
function. While a low-ESR 1μF/10μF capacitor with minimal susceptibility to temperature is
recommended, stability is highly dependent on the input power supply characteristics and
the substrate wiring pattern. In light of this information, please confirm operation across a
variety of temperature and load conditions.
C4
0.01μF
The Non Rush Current on Startup (NRCS) function is built into the IC to prevent rush
current from going through the load (IN to OUT) and affects output capacitors at power
supply start-up. Constant current comes from the NRCS pin when EN is HIGH or when the
UVLO function is deactivated. The temporary reference voltage is proportional to time, due
to the current charge of the NRCS pin capacitor, and output voltage start-up is proportional
to this reference voltage. Capacitors with low susceptibility to temperature are
recommended, to ensure a stable soft-start time.
C5
-
This component is employed when the C3 capacitor causes, or may cause, oscillation. It
provides more precise internal phase correction.
R4
Several kΩ
to several 10kΩ
It is recommended that a resistance (several kΩ to several 10kΩ) be put in R4, in case
negative voltage is applied in EN pin.
6
VCC
EN
IN
4
3
2
1
OUT
OUT
8
7
6
5
GND
FB
NRCS
C1
VCC
R4
VEN
C4
VIN
C2
R2
R1
C3
GND
FB
OUT
C5
16/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
3. Power Dissipation
In the thermal design, consider the temperature ranges wherein the IC is guaranteed to operate and apply appropriate
margins. The temperature conditions that need to be considered are listed below:
(1) Ambient temperature Ta can be no higher than 100°C.
(2) Chip junction temperature (Tj) can be no higher than 150°C.
Chip junction temperature can be determined as follows:
① Calculation based on ambient temperature (Ta)
WajTaTj
<Reference values>
θj-a: HSON8 198.4°C/W 1-layer substrate (copper foil area : below 0.2%)
92.4°C/W 1-layer substrate (copper foil area : 7%)
71.4°C/W 2-layer substrate (copper foil area : 65%)
Substrate size: 70 x 70 x 1.6mm3 (substrate with thermal via)
It is recommended to layout the VIA for heat radiation in the GND pattern of reverse (of IC) when there is the GND
pattern in the inner layer (in using multiplayer substrate). This package is so small (size: 2.9mm x 3.0mm) that it is not
available to layout the VIA in the bottom of IC. Spreading the pattern and increasing the number of VIA, as shown in the
figure below, enable to achieve superior heat radiation characteristic. (This figure is an image only. It is recommended
that the VIA size and number is designed suitable for the actual situation.).
Most of the heat loss in BD3523HFN occurs at the output N-Channel FET. Power loss is determined by the total
VIN-VOUT voltage and output current. Be sure to confirm the system input and output voltage and the output current
conditions in relation to the heat dissipation characteristics of the IN and OUT in the design. Bearing in mind that heat
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the
BD3523HFN) make sure to factor in conditions such as substrate size into the thermal design.
Power consumption (W) = Input voltage (VIN)- Output voltage (VOUT) x IOUT(Ave)
Example) Where VIN=1.7V, VOUT=1.2V, IOUT(Ave) = 2A,
◎HSON8
Power Dissipation [Pd]
[W]
0
25
75
100
125
150
50
[°C]
Ambient Temperature [Ta]
1.0
0.5
0
2.0
1.5
(1) 0.63W
(2) 1.35W
(3) 1.75W
(1) 1 layer substrate (substrate surface copper foil area: below 0.2%)
θj-a=198.4°C/W
(2) 1 layer substrate (substrate surface copper foil area:7%)
θj-a=92.4°C/W
(3) 1 layer substrate (substrate surface copper foil area:65%)
θj-a=71.4°C/W
W0.1 A0.2V2.1V7.1WnconsumptioPower
18/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
19/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Figure 24. Example of monolithic IC structure
13. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
14. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. The IC should be
powered down and turned ON again to resume normal operation because the TSD circuit keeps the outputs at the
OFF state even if the TJ falls below the TSD threshold.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
15. Output Pin
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply
line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply
terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic
capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures.
TSD on temperature [°C] (typ)
BD3523HFN
175
N N
P+PN N
P+
P Substrate
GND
NP+N N
P+
NP
P Substrate
GND GND
Parasitic
Elements
Pin A
Pin A
Pin B Pin B
B C
EParasitic
Elements
GND
Parasitic
Elements
CB
E
Transistor (NPN)Resistor
N Region
close-by
Parasitic
Elements
OUTPUT PIN
(Example)
20/22
BD3523HFN
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
TSZ02201-0J2J0A601010-1-2
02.Nov.2015 Rev.001
Ordering Information
B
D
3
5
2
3
H
F
N
-
T R
Part Number
Package
HFN : HSON8
Packaging and forming specification
TR: Embossed tape and reel
Marking Diagram
HSON8 (TOP VIEW)
523
Part Number Marking
LOT Number
1PIN MARK
BD3
Datasheet
Datasheet
Notice-PGA-E Rev.00
2
© 2015 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for applicatio n in ordinar y elec tronic eq uipm ents (such as AV equipment ,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred b y you or third parties arisin g from the use of an y ROHM’s Prod ucts for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASSⅢ CLASSⅢ CLASSⅡb CLASSⅢ
CLASSⅣ CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe d esign against the physical injur y, damage to any property, which
a failure or malfunction of our Products may cause. T he following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliabili ty, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlig ht or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing comp onents, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flu x (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radi ation-proof design.
5. Please verify and confirm ch aracteristics of the final or mounted products in using the Pro ducts.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending o n ambient temperature. When used in sealed area, confirm that it is the use i n
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or lia ble for failure induced under deviant conditio n from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogen ous (chlori ne, bromine, etc.) flu x is used, the residue of flux may negativel y affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM represe ntative in advance.
For details, please refer to ROHM Mounting specification
Datasheet
Datasheet
Notice-PGA-E Rev.00
2
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise you r own indepen dent verificatio n and judgmen t in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or loss es
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please t ake special care under dry condit ion (e.g. Grounding of human body / equipment / sol der iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportati on
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommende d storage condition, solder ability of products out of recommended storage time peri od
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommen de d storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive s t ress applied when dropping of a carton.
4. Use Products within the specified time after openin g a humidity barrier bag. Baking is require d before using Products of
which storage time is exceeding the recommended storage time perio d.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products pl ease dispose them properly us ing an authorized industr y waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoi ng information or data will not infringe any int ellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
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third parties with respect to the Products or the information contained i n this document. Provide d, however, that ROHM
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manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including b ut not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
