3PEAK TP5531 / TP5532 / TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Description Features LOW OFFSET VOLTAGE: 10 V (Max) ZERO DRIFT: 0.008 V/C 0.1Hz to 10Hz Noise: 1.1 VPP Low Supply Current: 42A per Amplifier Bandwidth: 350 kHz Slew Rate: 0.16 V/s High Gain, 130 dB High CMRR and PSRR Rail-to-rail Input and Output Swing -40C to 125C Operation Range Small Packages: SC70 and SOT23 (TP5531) Applications The 3PEAK TP5531/2/4 low-power chopper stabilized operational amplifiers provide input offset voltage correction for very low offset and offset drift over time and temperature. The devices operate with a single supply voltage as low as 1.8V, while drawing 42A per amplifier of quiescent current with a gain bandwidth product of 350kHz. They are unity gain stable, have no 1/f noise, have good Power Supply Rejection Ratio (PSRR) and Common Mode Rejection Ratio (CMRR), and feature railto-rail input and output swing. The devices were designed using an advanced CMOS process. The TP5531 (single version) is available in SC70-5, SOT23-5 and SO-8 packages. The TP5532 (dual version) is offered in MSOP-8 and SO-8 package. The TP5534 (quad version) is available in TSSOP-14 and SOIC-14 package. All versions are specified for operation from -40C to 125C. 3PEAK and the 3PEAK logo are registered trademarks of Transducer Amplifier Bidirectional Current Sense DC Offset Correction Temperature Measurement Remote Located Sensors Battery-Powered Instruments Electronic Weigh Scales 3PEAK INCORPORATED. All other trademarks are the property of their respective owners. Related Zero-Drift Op-amps VOS (Max.) 10 V 5 V GBWP 350 kHz 3.5 MHz Supply Current 42 A 500 A eN at 1 kHz 55 nV/Hz 15 nV/Hz Single TP5531 TP5551 Dual TP5532 TP5552 Quad TP5534 TP5554 Pin Configuration (Top View) TP5531 SOT23-5/SC70-5 (-T and -C Suffixes) 0.1Hz to 10Hz NOISE 1 V- 2 +IN 3 5 V+ 4 -IN 500nV/div OUT TP5531U SOT23-5/SC70-5 (-T and -C Suffixes) +IN 1 V- 2 -IN 3 5 V+ 4 OUT 5s/div www.3peakic.com.cn REV B 1 TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Pin Configuration (Top View, continued) TP5531 TP5532 TP5534 8-Pin SOIC (-S Suffix) 8-Pin SOIC/MSOP (-S and -V Suffixes) 14-Pin SOIC/TSSOP (-S and -T Suffixes) NC 1 8 NC Out A 1 In 2 7 Vs In A 2 In 3 6 Out In A 3 Vs 4 5 NC Vs 4 A B 8 Vs Out A 1 14 Out D 7 Out B In A 2 13 In D 6 In B In A 3 12 In D 5 In B Vs 4 11 Vs In B 5 10 In C A B TP5532 8-Pin DFN (-F Suffixes) Out A 1 8 In A 2 7 Out B In A 3 6 In B Vs 4 5 In B D C In B 6 9 In C Out B 7 8 Out C Vs Order Information Model Name TP5531 TP5531U TP5532 TP5534 Order Number Package Transport Media, Quantity Marking Information TP5531-TR SOT23-5 Tape and Reel, 3,000 E31T TP5531-CR SC70-5 (SOT353) Tape and Reel, 3,000 31C TP5531-SR SOIC-8 Tape and Reel, 4,000 TP5531 TP5531U-TR SOT23-5 Tape and Reel, 3,000 E31U TP5531U-CR SC70-5 31V TP5532-SR SOIC-8 Tape and Reel, 3,000 Tape and Reel, 4,000 TP5532 TP5532-FR DFN-8 2*2 Tape and Reel, 3,000 532 TP5532-VR MSOP-8 Tape and Reel, 3,000 TP5532 TP5534-SR SOIC-14 Tape and Reel, 2,500 TP5534 TP5534-TR TSSOP-14 Tape and Reel, 3,000 TP5534 Absolute Maximum Ratings Note 1 Supply Voltage: .....................................................6V - Operating Temperature Range.......-40C to 125C Input Voltage: ....................... ......V - 0.2 to V + 0.2 Maximum Junction Temperature................... 150C Input Current: +IN, -IN Note 2........................... 20mA Storage Temperature Range.......... -65C to 150C .......... Indefinite Lead Temperature (Soldering, 10 sec) ......... 260C Output Short-Circuit Duration + Note 3 Current at Supply Pins.............................. 50mA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. 2 REV B www.3peakic.com.cn TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power supply, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. ESD, Electrostatic Discharge Protection Symbol Parameter Condition Minimum Level Unit HBM Human Body Model ESD ANSI/ESDA/JEDEC JS-001 7 kV CDM Charged Device Model ESD ANSI/ESDA/JEDEC JS-002 2 kV Electrical Characteristics At TA = 27 C, VS = 5V, RL = 10k, VCM = VDD/2, unless otherwise noted. SYMBO L PARAMETER VS Supply Voltage Range IQ Quiescent current per amplifier VOS Input Offset Voltage dVOS/dT vs temperature PSRR vs power supply Vn en MAX 1.8 UNITS 5.5 V TP5531 45 65 A TP5532/TP5534 42 60 A 1 10 V VCM = 2.5V -10 VCM = 0.05 to 4.95V -20 20 V VS = 1.8V, VCM = 0.9V -20 20 V 0.05 V/C 0.008 input voltage noise, f=0.01Hz to 1Hz 0.4 Vpp input voltage noise, f=0.1Hz to 10Hz 1.1 Vpp Input voltage noise density, f=1kHz 55 nV/Hz AVOL Open-Loop Voltage Gain JA TYP dB IOS VCM CMRR VO ISC GBWP SR tOR tS IB MIN 120 Input capacitor, Differential Input capacitor, Common-Mode Input Bias Current Over temperature Input offset current Common-mode voltage range Common-mode rejection ratio Output Voltage Swing from rail Short-circuit current Unity Gain Bandwidth Slew rate Overload recovery time Settling time to 0.01% CIN CONDITIONS Thermal Resistance Junction to Ambient www.3peakic.com.cn Vs = 3V to 5V 100 3 2 50 800 100 VCM=0.5 to 4.5V RL=10k CL=100pF G=+1, CL=100pF G=-10 CL=100Pf, G=+1, 5V Step (V-)+100mV0.5V. 8 REV B 500 IN- V- INPUT ESD DIODE CURRENT LIMITINGUNITY GAIN www.3peakic.com.cn TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Low Input Referred Noise Flicker noise, as known as 1/f noise, is inherent in semiconductor devices and increases as frequency decreases. So at lower frequencies, flicker noise dominates, causing higher degrees of error for sub-Hertz frequencies or dc precision application. The TP553x series amplifiers are chopper stabilized amplifiers, the flicker noise is reduced greatly because of this technique. This reduction in 1/f noise allows the TP553x to have much lower noise at dc and low frequency compared to standard low noise amplifier. Residual Voltage Ripple The chopping technique can be used in amplifier design due to the internal notch filter. Although the chopping related voltage ripple is suppressed, higher noise spectrum exists at the chopping frequency and its harmonics due to residual ripple. So if the frequency of input signal is nearby the chopping frequency, the signal maybe interfered by the residue ripple. To further suppress the noise at the chopping frequency, it is recommended that a post filter be placed at the output of the amplifier. Broad Band and External Resistor Noise Considerations The total broadband noise output from any amplifier is primarily a function of three types of noise: input voltage noise from the amplifier, input current noise from the amplifier, and thermal (Johnson) noise from the external resistors used around the amplifier. These noise sources are not correlated with each other and their combined noise can be summed in a root sum squared manner. The full equation is given as: en total [en2 4kTRs (in Rs ) 2 ]1/2 Where: en= the input voltage noise density of the amplifier. in= the input current noise of the amplifier. RS= source resistance connected to the noninverting terminal. k= Boltzmann's constant (1.38x10-23J/K). T= ambient temperature in Kelvin (K). The total equivalent rms noise over a specific bandwidth is expressed as: en ,rms en total BW The input voltage noise density (en) of the TP553x is 55 nV/Hz, and the input current noise can be neglected. When the source resistance is 190 k, the voltage noise contribution from the source resistor and the amplifier are equal. With source resistance greater than 190 k, the overall noise of the system is dominated by the Johnson noise of the resistor itself. High Source Impedance Application The TP553x series op amps use switches at the chopper amplifier input, the input signal is chopped at 125 kHz to reduce input offset voltage down to 10V. The dynamic behavior of these switches induces a charge injection current to the input terminals of the amplifier. The charge injection current has a DC path to ground through the resistances seen at the input terminals of the amplifier. Higher input impedance causes an apparent shift in the input bias current of the amplifier. Because the chopper amplifier has charge injection currents at each terminal, the input offset current will be larger than standard amplifiers. The IOS of TP553x are 150pA under the typical condition. So the input impedance should be www.3peakic.com.cn REV B 9 TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps balanced across each input. The input impedance of the amplifier should be matched between the IN+ and IN- terminals to minimize total input offset current. Input offset currents show up as an additional output offset voltage, as shown in the following equation: vos ,total vos R f I os For a gain configure using 1M feedback resistor, a 150pA total input offset current will have an additional output offset voltage of 0.15mV. By keeping the input impedance low and balanced across the amplifier inputs, the input offset current effect will be suppressed efficiently. Ri Rf Vref +2.5V TP5531 Rs Vout VIN -2.5V Rb Vref Circuit Implication for reducing Input offset current effect PCB Surface Leakage In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. It is recommended to use multi-layer PCB layout and route the OPA's -IN and +IN signal under the PCB surface. The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 2 for Inverting Gain application. 1. For Non-Inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the Common Mode input voltage. 2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op-amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. Guard Ring VIN+ VIN- +VS The Layout of Guard Ring 10 REV B www.3peakic.com.cn TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Package Outline Dimensions SOT23-5 www.3peakic.com.cn REV B 11 TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Package Outline Dimensions SC-70-5 (SOT353) 12 REV B www.3peakic.com.cn TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Package Outline Dimensions SOP-8 (SOIC-8) www.3peakic.com.cn REV B 13 TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Package Outline Dimensions MSOP-8 14 REV B www.3peakic.com.cn TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Package Outline Dimensions DFN-8 2*2 www.3peakic.com.cn REV B 15 TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Package Outline Dimensions TSSOP-14 16 REV B www.3peakic.com.cn TP5531 / TP5532/TP5534 1.8V, 42A, RRIO, Zero Drift Op-amps Package Outline Dimensions SOP-14 (SOIC-14) www.3peakic.com.cn REV B 17