1. Product profile
1.1 General description
400 W LDMOS power transistor with improved video bandwidth for base station
applications at frequencies from 1805 MHz to 1995 MHz.
[1] Test signal: 3GPP test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF;
carrier spacing = 5 MHz; f1 = 1807.5 MHz; f2 = 1812.5 MHz; f3 = 1872.5 MHz; f4 = 1877.5 MHz.
1.2 Features and benefits
Decoupling leads to enable improved Video BandWidth (VBW) (120 MHz typical)
High efficiency
Low thermal resistance providing excellent thermal stability
Designed for broadband operation
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Design optimized for gull-wing
Excellent ruggedness
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for base stations and multi carrier applications in the 1805 MHz to
1995 MHz frequency range
BLF8G20LS-400PV;
BLF8G20LS-400PGV
Power LDMOS transistor
Rev. 5 — 1 September 2015 Product data sheet
Table 1. Typical performance
Typical RF performance at Tcase = 25
C in a common source class-AB production test circuit, tested
on straight lead device.
Test signal f IDq VDS PL(AV) GpDACPR5M
(MHz) (mA) (V) (W) (dB) (%) (dBc)
2-carrier W-CDMA 1805 to 1995 3400 28 95 19 28 33 [1]
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Product data sheet Rev. 5 — 1 September 2015 2 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
2. Pinning information
[1] Connected to flange.
3. Ordering information
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
BLF8G20LS-400PV (SOT1242B)
1drain1
2drain2
3gate1
4gate2
5source [1]
6 decoupling1
7 decoupling2
8n.c.
9n.c.
BLF8G20LS-400PGV (SOT1242C)
1drain1
2drain2
3gate1
4gate2
5source [1]
6 decoupling1
7 decoupling2
8n.c.
9n.c.
8
34
9
61 2
5
7
4
3
8
5
9
6
7
1
2
aaa-007816
1
3
627
89
4
5
4
3
8
5
9
6
7
1
2
aaa-007816
Table 3. Ordering information
Type number Package
Name Description Version
BLF8G20LS-400PV - earless flanged ceramic package; 8 leads SOT1242B
BLF8G20LS-400PGV - earless flanged ceramic package; 8 leads SOT1242C
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Product data sheet Rev. 5 — 1 September 2015 3 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
4. Limiting values
[1] Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF
calculator.
5. Thermal characteristics
6. Characteristics
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS gate-source voltage 0.5 +13 V
Tstg storage temperature 65 +150 C
Tjjunction temperature [1] - 225 C
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction to case Tcase =80C; PL= 80 W 0.23 K/W
Table 6. DC characteristics
Tj = 25
C; per section unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID= 3.0 mA 65 - - V
VGS(th) gate-source threshold voltage VDS = 10 V; ID= 300 mA 1.5 1.9 2.3 V
IDSS drain leakage current VGS = 0 V; VDS =28V - - 3.0 A
IDSX drain cut-off current VGS =V
GS(th) + 3.75 V;
VDS =10V
51.5 - A
IGSS gate leakage current VGS =11 V; V
DS = 0 V - - 300 nA
gfs forward transconductance VDS = 10 V; ID=15A - 20.6 - S
RDS(on) drain-source on-state resistance VGS =V
GS(th) + 3.75 V;
ID= 10.5 A
- 0.055 -
Table 7. RF characteristics
Test signal: 2-carrier W-CDMA; PAR = 7.5 dB at 0.01 % probability on the CCDF; 3GPP test
model 1; 1-64 DPCH; f1= 1807.5 MHz; f2= 1812.5 MHz; f3= 1872.5 MHz; f4= 1877.5 MHz;
RF performance at VDS =28V; I
Dq =3400mA; T
case =25
C; unless otherwise specified; in a
class-AB production test circuit, tested on straight lead device.
Symbol Parameter Conditions Min Typ Max Unit
Gppower gain PL(AV) =95W 17.8 19 - dB
RLin input return loss PL(AV) =95W - 12 6dB
Ddrain efficiency PL(AV) =95W 24 28 - %
ACPR5M adjacent channel power ratio (5 MHz) PL(AV) =95W - 33 28 dBc
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Product data sheet Rev. 5 — 1 September 2015 4 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
7. Test information
7.1 Ruggedness in class-AB operation
The BLF8G20LS-400PV and BLF8G20LS-400PGV are capable of withstanding a load
mismatch corresponding to VSWR = 10 : 1 through all phases under the following
conditions: VDS =28V; I
Dq = 3300 mA; 2-carrier W-CDMA signal; PL= 200 W;
fc= 1800 MHz; 5 MHz spacing, 46 % clipping.
7.2 Impedance information
[1] ZS and ZL defined in Figure 1.
Table 8. Typical impedance for the top-half of the push-pull package
Measured load-pull data; IDq = 1800 mA; VDS = 28 V; Tcase = 25
C, water cooled.
f ZS[1] ZL[1]
(MHz) () ()
BLF8G20LS-400PV (straight lead)
1800 4.1 j4.66 4.1 j4.5
1840 5.2 j3.6 4.4 j4.4
1880 4.6 j1.45 4.85 j4.25
1930 2.8 j0.3 4.5 j4.3
1960 2.1 j0.5 5.5 j3.5
1990 1.56 j0.6 5.5 j3.4
BLF8G20LS-400PGV (gull-wing)
1800 3.7 j7.6 4.2 j6.8
1840 4.34 j6.1 4.4 j6.7
1880 4.75 j5.2 4 j6.4
1930 3.17 j3.4 4.6 j6.5
1960 2 j3.05 5.8 j5.5
1990 2.5 j2.6 5.8 j5.7
Fig 1. Definition of transistor impedance
001aaf059
drain
ZL
ZS
gate
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Product data sheet Rev. 5 — 1 September 2015 5 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
7.3 VBW in class-AB operation
The BLF8G20LS-400PV and BLF8G20LS-400PGV have a video bandwidth of 120 MHz
(typical) when measured in a class-AB test circuit operating in the 1800 MHz to 1880 MHz
frequency band for VDS = 28 V and IDq = 3.3 A, where the VBW is defined as the location
of the resonance in the base-band impedance measurement obtained using a
low-frequency probe.
The VBW measurement based on the 2-tone IMD test as a function of carrier spacing is
shown below.
(1) IMD low
(2) IMD high
Fig 2. VBW capacity in a class-AB test circuit
aaa-007817
1 10 102
-80
-60
-40
-20
0
carrier spacing (MHz)
IMD
IMDIMD
(dBc)
(dBc)(dBc)
(1)(1)(1)
(2)(2)(2)
(1)(1)(1)
(2)(2)(2)
(1)(1)(1)
(2)(2)(2)
IMD3IMD3IMD3
IMD5
IMD5IMD5
IMD7
IMD7IMD7
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Product data sheet Rev. 5 — 1 September 2015 6 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
7.4 Test circuit
Printed-Circuit Board (PCB): Rogers 4350B; r = 3.66; thickness = 0.762 mm;
thickness copper plating = 35 m.
See Table 9 for a list of components.
Fig 3. Component layout
Table 9. List of components
See Figure 3 for component layout.
Component Description Value Remarks
C1, C5, C16, C20 multilayer ceramic chip capacitor 10 F, 50 V Murata, SMD 2220
C2, C6, C15, C19, C24,
C25
multilayer ceramic chip capacitor 4.7 F, 50 V Murata
C3, C7, C14, C18 multilayer ceramic chip capacitor 1 nF ATC100B
C4, C8, C9, C10, C13,
C17, C21
multilayer ceramic chip capacitor 24 pF ATC100B
C11, C12 multilayer ceramic chip capacitor 100 pF ATC100B
C22, C23 electrolytic capacitor 2200 F, 63 V
R1, R2 resistor 10 SMD 1206
R3, R5 resistor 5.1 SMD 1206
R4 resistor 33 SMD 1206
R6 resistor 100 SMD 1206
C21
C15
C16
C24 C13
C14
C19
C20
C17
C18
C9
C10
C11
C12
R3
R4R6
R5
R1
C3
C4
R2
60 mm
50 mm
input
C2
C1
C5
C6 C7
C8
C22
C23
output
aaa-007818
C25
50 mm
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Product data sheet Rev. 5 — 1 September 2015 7 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
7.5 Graphical data
7.5.1 Pulsed CW
VDS = 28 V; IDq = 3400 mA; tp= 100 s; =10%.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA; tp= 100 s; =10%.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 4. Power gain as a function of output power;
typical values
Fig 5. Drain efficiency as a function of output power;
typical values
aaa-010585
38 42 46 50 54 58
15
16
17
18
19
20
21
PL (dBm)
Gp
Gp
(dB)(dB)(dB)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010586
35 39 43 47 51 55 59
0
10
20
30
40
50
60
PL (dBm)
ηD
ηD
(%)(%)(%)
(3)(3)(3)
(2)(2)(2)
(1)(1)(1)
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Product data sheet Rev. 5 — 1 September 2015 8 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
7.5.2 IS-95
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 6. Power gain as a function of output power;
typical values
Fig 7. Drain efficiency as a function of output power;
typical values
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 8. Adjacent channel power ratio (885 kHz) as a
function of output power; typical values
Fig 9. Adjacent channel power ratio (1980 kHz) as a
function of output power; typical values
aaa-010587
39 41 43 45 47 49 51 53
18
19
20
21
22
PL (dBm)
Gp
Gp
(dB)(dB)(dB)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010588
39 41 43 45 47 49 51 53
0
10
20
30
40
PL (dBm)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010589
39 41 43 45 47 49 51 53
-70
-60
-50
-40
-30
PL (dBm)
ACPR
ACPR885k885k
ACPR885k
(dBc)(dBc)(dBc)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010590
39 41 43 45 47 49 51 53
-80
-75
-70
-65
-60
-55
-50
PL (dBm)
ACPR
_ ACPR1980k1980k
ACPR1980k
(dBc)(dBc)(dBc)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
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Product data sheet Rev. 5 — 1 September 2015 9 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
7.5.3 1-Carrier W-CDMA
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 10. Peak-to-average ratio as a function of output
power; typical values
Fig 11. Peak output power as a function of output
power; typical values
aaa-010591
39 41 43 45 47 49 51 53
4
6
8
10
12
PL (dBm)
PAR
PARPAR
(dB)
(dB)(dB)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010592
39 41 43 45 47 49 51 53
49
51
53
55
57
59
PL (dBm)
PL(M)L(M)
PL(M)
(dBm)(dBm)(dBm)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 12. Power gain as a function of output power;
typical values
Fig 13. Drain efficiency as a function of output power;
typical values
aaa-010593
38 40 42 44 46 48 50 52 54
17
18
19
20
21
22
PL (dBm)
Gp
Gp
(dB)(dB)(dB)
(1)(1)(1)
(2)
(2)(2)
(3)
(3)(3)
aaa-010594
39 41 43 45 47 49 51 53 55
0
10
20
30
40
50
PL (dBm)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
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Product data sheet Rev. 5 — 1 September 2015 10 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
7.5.4 2-Carrier W-CDMA
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 14. Peak-to-average ratio as a function of output
power; typical values
Fig 15. Input return loss as a function of output
power; typical values
aaa-010595
39 41 43 45 47 49 51 53 55
0
2
4
6
8
10
PL (dBm)
PAR
PARPAR
(dB)
(dB)(dB)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010596
39 41 43 45 47 49 51 53 55
10
14
18
22
26
30
PL (dBm)
RL
RLinin
RLin
(dB)(dB)(dB)
(1)(1)(1)
(2)
(2)(2)
(3)
(3)(3)
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 16. Power gain as a function of output power;
typical values
Fig 17. Drain efficiency as a function of output power;
typical values
aaa-010597
39 41 43 45 47 49 51 53 55
18
19
20
21
22
PL (dBm)
Gp
Gp
(dB)(dB)(dB)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010598
39 41 43 45 47 49 51 53 55
0
10
20
30
40
50
PL (dBm)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
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Product data sheet Rev. 5 — 1 September 2015 11 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 18. Input return loss as a function of output power; typical values
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 3400 mA.
(1) f = 1805 MHz
(2) f = 1840 MHz
(3) f = 1880 MHz
Fig 19. Adjacent channel power ratio (5 MHz) as a
function of output power; typical values
Fig 20. Adjacent channel power ratio (10 MHz) as a
function of output power; typical values
aaa-010599
39 41 43 45 47 49 51 53 55
10
15
20
25
30
PL (dBm)
RL
RLinin
RLin
(dB)(dB)(dB)
(1)(1)(1)
(2)
(2)(2)
(3)
(3)(3)
aaa-010600
39 41 43 45 47 49 51 53 55
-60
-50
-40
-30
-20
PL (dBm)
ACPR
ACPR5M5M
ACPR5M
(dBc)(dBc)(dBc)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
aaa-010601
39 41 43 45 47 49 51 53 55
-60
-50
-40
-30
-20
PL (dBm)
ACPR
ACPR10M10M
ACPR10M
(dBc)(dBc)(dBc)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
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Product data sheet Rev. 5 — 1 September 2015 12 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
8. Package outline
Fig 21. Package outline SOT1242B
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1242B
sot1242b_po
12-11-28
15-07-21
inches
max
nom
min
0.217
0.165
0.055
0.045
0.007
0.004
1.242
0.218
1.241
1.219
0.374
0.366
0.375
0.365
Note
1. Millimeter dimensions are derived from the original inch dimensions.
2. Dimension is measured 0.030 inch (0.76 mm) from the body.
0.465
0.455
0.010
0.785
0.745
0.089
0.079
Unit(1)
mm
max
nom
min
5.5
4.2
1.41
1.14
0.18
0.10
31.55
30.94
13.72 29.47
0.540 1.16
31.52
30.96
9.50
9.30
9.53
9.27
2.26
2.01
A
Dimensions
bb
1
11.81
11.56
cDD
1e
0.25 0.10
0.004
e1EE
1
0.069
0.059
1.75
1.50
FH
19.94
18.92
Q(2) U1U2w2y
0.25
0.010
v
0 5 10 mm
scale
32.39
32.13
10.29
10.03
1.275
1.265
0.405
0.395
b1Q
e
e1
b
83 4 9
61 2
5
7
w2B
y
EE1
U2
H
U1c
D
D1
B
A
v A
A
F
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Product data sheet Rev. 5 — 1 September 2015 13 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
Fig 22. Package outline SOT1242C
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1242C
sot1242c_po
12-05-15
12-05-30
Note
1. Millimeter dimensions are derived from the original inch dimensions.
y
Unit(1)
mm
max
nom
min
5.5
4.2
1.41
1.14
31.55
30.94
31.52
30.96
13.72
9.50
9.30
1.75
1.50
10.29
10.03
A
Dimensions
bDD
1eE
1
EF
9.53
9.27
H
32.39
32.13
U1
0.195
0.045
U2vyw2
inches
max
nom
min
0.217
0.165
0.055
0.045
11.81
11.56
b1
0.465
0.455
0.18
0.10
c
0.007
0.004
1.242
1.218
e1
1.241
1.219
0.540
29.47
1.16
0.374
0.366
0.069
0.059
0.405
0.395
0.375
0.365
Q
1.38
0.98
0.055
0.039
1.275
1.265
0.008
0.002
Lp
14.70
14.50
0.579
0.571
0.25
0.01
0.25
0.01
scale
10 mm05
D
D1
A
F
5
vA
U2
H
A
U1
e1
e
1627
B
b1
b
3894
w2B
7°
0°
7°
0°
θ
detail X
Lp
Q
0.3 mm gauge plane
X
c
E
E1
θ
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Product data sheet Rev. 5 — 1 September 2015 14 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
9. Handling information
10. Abbreviations
11. Revision history
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
Table 10. Abbreviations
Acronym Description
3GPP 3rd Generation Partnership Project
CCDF Complementary Cumulative Distribution Function
CW Continuous Wave
DPCH Dedicated Physical Channel
ESD ElectroStatic Discharge
IMD InterModulation Distortion
IS-95 Interim Standard 95
LDMOS Laterally Diffused Metal Oxide Semiconductor
MTF Median Time to Failure
PAR Peak-to-Average Ratio
SMD Surface Mounted Device
VSWR Voltage Standing Wave Ratio
W-CDMA Wideband Code Division Multiple Access
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF8G20LS-400PV_LS-400PGV#5 20150901 Product data sheet BLF8G20LS-400PV
_LS-400PGV v.4
Modifications: •The format of this document has been redesigned to comply with the new
identity guidelines of Ampleon.
•Legal texts have been adapted to the new company name where appropriate.
BLF8G20LS-400PV_LS-400PGV v.4 20150728 Product data sheet - BLF8G20LS-400PV
_LS-400PGV v.3
BLF8G20LS-400PV_LS-400PGV v.3 20140603 Product data sheet - BLF8G20LS-400PV
_LS-400PGV v.2
BLF8G20LS-400PV_LS-400PGV v.2 20130625 Product data sheet - BLF8G20LS-400PV
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BLF8G20LS-400PV_LS-400PGV v.1 20130606 Preliminary data sheet - -
BLF8G20LS-400PV_LS-400PGV#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 15 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.ampleon.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Ampleon does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Ampleon sales office. In
case of any inconsistency or conflict with the short data sheet, the full data
sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Ampleon and its customer, unless Ampleon and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be valid
in which the Ampleon product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Ampleon does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Ampleon takes no responsibility for
the content in this document if provided by an information source outside of
Ampleon.
In no event shall Ampleon be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost profits,
lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Ampleon’ aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Ampleon.
Right to make changes — Ampleon reserves the right to make changes to
information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Ampleon products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction of an
Ampleon product can reasonably be expected to result in personal injury,
death or severe property or environmental damage. Ampleon and its
suppliers accept no liability for inclusion and/or use of Ampleon products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Ampleon makes no representation
or warranty that such applications will be suitable for the specified use without
further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Ampleon products, and Ampleon accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Ampleon product is suitable and
fit for the customer’s applications and products planned, as well as for the
planned application and use of customer’s third party customer(s). Customers
should provide appropriate design and operating safeguards to minimize the
risks associated with their applications and products.
Ampleon does not accept any liability related to any default, damage, costs or
problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Ampleon products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Ampleon does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Ampleon products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.ampleon.com/terms, unless otherwise agreed in a valid written
individual agreement. In case an individual agreement is concluded only the
terms and conditions of the respective agreement shall apply. Ampleon
hereby expressly objects to applying the customer’s general terms and
conditions with regard to the purchase of Ampleon products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
BLF8G20LS-400PV_LS-400PGV#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 16 of 17
BLF8G20LS-400P(G)V
Power LDMOS transistor
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Ampleon product is automotive qualified, the product
is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Ampleon
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Ampleon’ warranty of the product for such
automotive applications, use and specifications, and (b) whenever customer
uses the product for automotive applications beyond Ampleon’ specifications
such use shall be solely at customer’s own risk, and (c) customer fully
indemnifies Ampleon for any liability, damages or failed product claims
resulting from customer design and use of the product for automotive
applications beyond Ampleon’ standard warranty and Ampleon’ product
specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Any reference or use of any ‘NXP’ trademark in this document or in or on the
surface of Ampleon products does not result in any claim, liability or
entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of
the NXP group of companies and any reference to or use of the ‘NXP’
trademarks will be replaced by reference to or use of Ampleon’s own Any
reference or use of any ‘NXP’ trademark in this document or in or on the
surface of Ampleon products does not result in any claim, liability or
entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of
the NXP group of companies and any reference to or use of the ‘NXP’
trademarks will be replaced by reference to or use of Ampleon’s own
trademarks.
13. Contact information
For more information, please visit:
http://www.ampleon.com
For sales office addresses, please visit:
http://www.ampleon.com/sales
BLF8G20LS-400P(G)V
Power LDMOS transistor
© Ampleon The Netherlands B.V. 2015. All rights reserved.
For more information, please visit: http://www.ampleon.com
For sales office addresses, please visit: http://www.ampleon.com/sales
Date of release: 1 September 2015
Document identifier: BLF8G20LS-400PV_LS-400PGV#5
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.1 Ruggedness in class-AB operation . . . . . . . . . 4
7.2 Impedance information . . . . . . . . . . . . . . . . . . . 4
7.3 VBW in class-AB operation . . . . . . . . . . . . . . . 5
7.4 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.5 Graphical data . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.5.1 Pulsed CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.5.2 IS-95 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.5.3 1-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 9
7.5.4 2-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . 10
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
9 Handling information. . . . . . . . . . . . . . . . . . . . 14
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
12.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
12.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
13 Contact information. . . . . . . . . . . . . . . . . . . . . 16
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17