DATA SHEET MOS INTEGRATED CIRCUIT PD16750 384-OUTPUT TFT-LCD SOURCE DRIVER (COMPATIBLE WITH 256-GRAY SCALES) DESCRIPTION The PD16750 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scales. Data input is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216 colors by output of 256 values -corrected by an internal D/A converter and 8-by-2 external power modules. Because the output dynamic range is as large as VDD2 - 0.2 V to VSS2 + 0.2 V, level inversion operation of the LCD's common electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-in 8-bit D/A converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. Assuring a maximum clock frequency of 40 MHz when driving at 3.0 V, this driver is applicable to XGA-standard TFTLCD panels and SXGA TFT-LCD panels. This driver is applicable to SXGA TFT-LCD panels by input display signal 2 systems (Clock divide). FEATURES * CMOS level input * 384 outputs * Input of 8 bits (gradation data) by 6 dots * Capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a D/A converter * Output dynamic range: VDD2 - 0.2 V to VSS2 + 0.2 V * High-speed data transfer: fCLK = 40 MHz (internal data transfer speed when operating at 3.0 V) * Apply for dot-line inversion, n-line inversion and column line inversion * Output voltage polarity inversion function (POL) * Display data inversion function (POL21/22) * Logic power supply voltage (VDD1) : 3.3 V 0.3 V * Driver power supply voltage (VDD2) : 9.0 V 0.5 V * Low power control function (LPC) ORDERING INFORMATION Part Number Package PD16750N-xxx TCP (TAB package) Remark The TCP's external shape is customized. To order the required shape, please contact one of our sales representatives. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. S13719EJ4V0DS00 (4th edition) Date Published April 2000 NS CP (K) Printed in Japan The mark * shows major revised points. (c) 1998 PD16750 1. BLOCK DIAGRAM STHR R,/L CLK STB STHL VDD1 VSS1 64-bit bidirectional shift register C1 C2 C63 C64 D00 - D07 D10 - D17 D20 - D27 D30 - D37 D40 - D47 D50 - D57 Data register POL21 POL22 Latch POL VDD2 Level shifter VSS2 V0 - V15 D/A converter Voltage follower output LPC S1 S2 S3 S384 Remark /xxx indicates active low signal. 2. RELATIONSHIP BETWEEN OUTPUT CIRCUIT AND D/A CONVERTER S1 V7 Multiplexer 8-bit D/A converter 8 ***** V8 S383 8 ***** V0 S2 V15 POL 2 Data Sheet S13719EJ4V0DS00 S384 PD16750 3. PIN CONFIGURATION (PD16750N-xxx) * * VSS2 VDD2 V14 V12 V10 V8 V6 V4 V2 V0 R,/L D50 D51 D52 D53 D54 D55 D56 D57 D40 D41 D42 D43 D44 D45 D46 D47 D30 D31 D32 D33 D34 D35 D36 D37 POL21 POL22 POL STB STHL VDD1 CLK VSS1 LPC STHR D20 D21 D22 D23 D24 D25 D26 D27 D10 D11 D12 D13 D14 D15 D16 D17 D00 D01 D02 D03 D04 D05 D06 D07 V1 V3 V5 V7 V9 V11 V13 V15 VDD2 VSS2 S384 S383 S382 Copper Foil Surface S3 S2 S1 Remark This figure does not specify the TCP package. Data Sheet S13719EJ4V0DS00 3 PD16750 4. PIN FUNCTIONS Pin Symbol Pin Name Description S1 to S384 Driver output The D/A converted 256-gray-scale analog voltage is output. D00 to D07 Display data input The display data is input with a width of 48 bits, viz., the gray scale data (8 bits) by 6 dots (2 D10 to D17 pixels). D20 to D27 DX0: LSB, DX7: MSB D30 to D37 D40 to D47 D50 to D57 R,/L Shift direction control These refer to the start pulse input/output pins when driver ICs are connected in cascade. input STHR STHL CLK The shift directions of the shift registers are as follows. R,/L = H : STHR input, S1 S384, STHL output R,/L = L : STHL input, S384 S1, STHR output Right shift start pulse R,/L = H : Becomes the start pulse input pin. input/output R,/L = L : Becomes the start pulse output pin. Left shift start pulse R,/L = H : Becomes the start pulse output pin. input/output R,/L = L : Becomes the start pulse input pin. Shift clock input Refers to the shift register's shift clock input. The display data is incorporated into the data register at the rising edge of the 64th clock after the start pulse input, the start pulse output reaches the high level, thus becoming the start pulse of the next-level driver. STB Latch input The contents of the data register are transferred to the latch circuit at the rising edge. And, at the falling edge, the gray scale voltage is supplied to the driver. It is necessary to ensure input of one pulse per horizontal period. POL Polarity input POL = L : The S2n-1 output uses V0 to V7 as the reference supply. The S2n output uses V8 to V15 as the reference supply. POL = H : The S2n-1 output uses V8 to V15 as the reference supply. The S2n output uses V0 to V7 as the reference supply. S2n-1 indicates the odd output: and S2n indicates the even output. Input of the POL signal is allowed the setup time(tPOL-STB) with respect to STB's rising edge. POL21 Data inversion POL22 Data inversion can invert when display data is loaded. POL21/22 = H : Data inversion loads display data after inverting it. POL21/22 = L : Data inversion does not invert input data. POL21: D00 to D07, D10 to D17, D20 to D27 POL22: D30 to D37, D40 to D47, D50 to D57 LPC Low power control The output buffer constant current source is blocked, reducing current consumption. In lower input power mode (LPC = L: DC-level input possible), the ordinary static current consumption can be reduced by approx. 33 %. V0 to V15 -corrected power Input the -corrected power supplies from outside by using operational amplifier. Make sure supplies to maintain the following relationships. During the gray scale voltage output, be sure to keep the gray scale level power supply at a constant level. VDD2 - 0.2 V > V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > 0.5 VDD2 0.5 VDD2 - 0.3 V > V8 > V9 > V10 > V11 > V12 > V13 > V14 > V15 > VSS2 + 0.2 V VDD1 Logic power supply 3.3 V 0.3 V VDD2 Driver power supply 9.0 V 0.5 V VSS1 Logic ground Grounding VSS2 Driver ground Grounding 4 Data Sheet S13719EJ4V0DS00 PD16750 Cautions 1. The power start sequence must be VDD1, logic input, and VDD2 & V0 to V15 in that order. Reverse this sequence to shut down (Simultaneous power application to VDD2 and V0 to V15 is possible.). 2. To stabilize the supply voltage, please be sure to insert a 0.1- F bypass capacitor between VDD1-VSS1 and VDD2-VSS2. Furthermore, for increased precision of the D/A converter, insertion of a bypass capacitor of about 0.01 F is also advised between the -corrected power supply terminals (V0, V1, V2,....., V15) and VSS2. Data Sheet S13719EJ4V0DS00 5 PD16750 5. RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT VOLTAGE VALUE This product incorporates a 8-bit D/A converter whose odd output pins and even output pins output respectively gray scale voltages of differing polarity with respect to the LCD's counter electrode (common electrode) voltage. The D/A converter consists of ladder resistors. Figure 5-1 shows the relationship between the driving voltages such as liquid-crystal driving voltages VDD2 and VSS2, common electrode potential VCOM, and -corrected voltages V0 to V15 and the input data. Be sure to maintain the voltage relationships of VDD2 - 0.2 V > V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > 0.5 VDD2, 0.5 VDD2 - 0.3 V > V8 > V9 > V10 > V11 > V12 > V13 > V14 > V15 > VSS2 + 0.2 V Figures 5-2 and 5-3 show the relationship between the input data and the output voltage. This driver IC is designed for only single-sided mounting. Therefore, please do not use it for -corrected power supply level inversion in double-sided mounting. Figure 5-1. Relationship between Input Data and -corrected Power Supplies VDD2 0.2 V V0 32 V1 V2 32 64 V3 64 V4 32 V5 32 V6 V7 0.5 VDD2 Split interval 0.3 V V8 V9 32 V10 32 V11 64 V12 64 32 V13 V14 32 V15 0.2 V VSS2 00 6 20 40 80 Input data (HEX) Data Sheet S13719EJ4V0DS00 C0 E0 FE FF PD16750 Figure 5-2. Relationship between Input Data and Output Voltage (1/4) VDD2 - 0.2 V > V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > 0.5 VDD2, POL21/22 = L V0' V0 r0 V1' r1 V2' r2 V3' r3 r30 V31' r31 V1 V32' r32 V33' r33 r222 V223' r223 V224' V5 r224 V225' r225 r251 V252' r252 V253' r253 V254' V6 r254 V7 V255' Data DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2AH 2BH 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3AH 3BH 3CH 3DH 3EH 3FH 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Output voltage V0' V1' V2' V3' V4' V5' V6' V7' V8' V9' V10' V11' V12' V13' V14' V15' V16' V17' V18' V19' V20' V21' V22' V23' V24' V25' V26' V27' V28' V29' V30' V31' V32' V33' V34' V35' V36' V37' V38' V39' V40' V41' V42' V43' V44' V45' V46' V47' V48' V49' V50' V51' V52' V53' V54' V55' V56' V57' V58' V59' V60' V61' V62' V63' V0 V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1+(V0-V1) X V1 V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X V2+(V1-V2) X 3465.0 3102.5 2777.5 2490.0 2240.0 2017.5 1822.5 1652.5 1507.5 1387.5 1267.5 1147.5 1052.5 957.5 862.5 787.5 712.5 637.5 575.0 512.5 450.0 400.0 350.0 300.0 262.5 225.0 187.5 150.0 112.5 75.0 37.5 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 965.0 930.0 895.0 860.0 825.0 790.0 755.0 720.0 687.5 655.0 622.5 590.0 557.5 525.0 492.5 460.0 430.0 400.0 370.0 340.0 310.0 280.0 250.0 220.0 192.5 165.0 137.5 110.0 82.5 55.0 27.5 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 rn () r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 r32 r33 r34 r35 r36 r37 r38 r39 r40 r41 r42 r43 r44 r45 r46 r47 r48 r49 r50 r51 r52 r53 r54 r55 r56 r57 r58 r59 r60 r61 r62 r63 400.0 362.5 325.0 287.5 250.0 222.5 195.0 170.0 145.0 120.0 120.0 120.0 95.0 95.0 95.0 75.0 75.0 75.0 62.5 62.5 62.5 50.0 50.0 50.0 37.5 37.5 37.5 37.5 37.5 37.5 37.5 37.5 35.0 35.0 35.0 35.0 35.0 35.0 35.0 35.0 32.5 32.5 32.5 32.5 32.5 32.5 32.5 32.5 30.0 30.0 30.0 30.0 30.0 30.0 30.0 30.0 27.5 27.5 27.5 27.5 27.5 27.5 27.5 27.5 Caution There is no connection between V7 and V8 in the chip. Data Sheet S13719EJ4V0DS00 7 PD16750 Figure 5-2. Relationship between Input Data and Output Voltage (2/4) VDD2 - 0.2 V > V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > 0.5 VDD2, POL21/22 = L V0' V0 r0 V1' r1 V2' r2 V3' r3 r30 V31' r31 V1 V32' r32 V33' r33 r222 V223' r223 V224' V5 r224 V225' r225 r251 V252' r252 V253' r253 V254' V6 r254 V7 V255' Data 40H 41H 42H 43H 44H 45H 46H 47H 48H 49H 4AH 4BH 4CH 4DH 4EH 4FH 50H 51H 52H 53H 54H 55H 56H 57H 58H 59H 5AH 5BH 5CH 5DH 5EH 5FH 60H 61H 62H 63H 64H 65H 66H 67H 68H 69H 6AH 6BH 6CH 6DH 6EH 6FH 70H 71H 72H 73H 74H 75H 76H 77H 78H 79H 7AH 7BH 7CH 7DH 7EH 7FH DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V64' V65' V66' V67' V68' V69' V70' V71' V72' V73' V74' V75' V76' V77' V78' V79' V80' V81' V82' V83' V84' V85' V86' V87' V88' V89' V90' V91' V92' V93' V94' V95' V96' V97' V98' V99' V100' V101' V102' V103' V104' V105' V106' V107' V108' V109' V110' V111' V112' V113' V114' V115' V116' V117' V118' V119' V120' V121' V122' V123' V124' V125' V126' V127' Output voltage V2 V3+(V2-V3) X 1575 V3+(V2-V3) X 1550 V3+(V2-V3) X 1525 V3+(V2-V3) X 1500 V3+(V2-V3) X 1475 V3+(V2-V3) X 1450 V3+(V2-V3) X 1425 V3+(V2-V3) X 1400 V3+(V2-V3) X 1375 V3+(V2-V3) X 1350 V3+(V2-V3) X 1325 V3+(V2-V3) X 1300 V3+(V2-V3) X 1275 V3+(V2-V3) X 1250 V3+(V2-V3) X 1225 V3+(V2-V3) X 1200 V3+(V2-V3) X 1175 V3+(V2-V3) X 1150 V3+(V2-V3) X 1125 V3+(V2-V3) X 1100 V3+(V2-V3) X 1075 V3+(V2-V3) X 1050 V3+(V2-V3) X 1025 V3+(V2-V3) X 1000 V3+(V2-V3) X 975 V3+(V2-V3) X 950 V3+(V2-V3) X 925 V3+(V2-V3) X 900 V3+(V2-V3) X 875 V3+(V2-V3) X 850 V3+(V2-V3) X 825 V3+(V2-V3) X 800 V3+(V2-V3) X 775 V3+(V2-V3) X 750 V3+(V2-V3) X 725 V3+(V2-V3) X 700 V3+(V2-V3) X 675 V3+(V2-V3) X 650 V3+(V2-V3) X 625 V3+(V2-V3) X 600 V3+(V2-V3) X 575 V3+(V2-V3) X 550 V3+(V2-V3) X 525 V3+(V2-V3) X 500 V3+(V2-V3) X 475 V3+(V2-V3) X 450 V3+(V2-V3) X 425 V3+(V2-V3) X 400 V3+(V2-V3) X 375 V3+(V2-V3) X 350 V3+(V2-V3) X 325 V3+(V2-V3) X 300 V3+(V2-V3) X 275 V3+(V2-V3) X 250 V3+(V2-V3) X 225 V3+(V2-V3) X 200 V3+(V2-V3) X 175 V3+(V2-V3) X 150 V3+(V2-V3) X 125 V3+(V2-V3) X 100 V3+(V2-V3) X 75 V3+(V2-V3) X 50 V3+(V2-V3) X 25 Caution There is no connection between V7 and V8 in the chip. 8 Data Sheet S13719EJ4V0DS00 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 rn () r64 r65 r66 r67 r68 r69 r70 r71 r72 r73 r74 r75 r76 r77 r78 r79 r80 r81 r82 r83 r84 r85 r86 r87 r88 r89 r90 r91 r92 r93 r94 r95 r96 r97 r98 r99 r100 r101 r102 r103 r104 r105 r106 r107 r108 r109 r110 r111 r112 r113 r114 r115 r116 r117 r118 r119 r120 r121 r122 r123 r124 r125 r126 r127 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 PD16750 Figure 5-2. Relationship between Input Data and Output Voltage (3/4) VDD2 - 0.2 V > V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > 0.5 VDD2, POL21/22 = L V0' V0 r0 V1' r1 V2' r2 V3' r3 r30 V31' r31 V1 V32' r32 V33' r33 r222 V223' r223 V224' V5 r224 V225' r225 r251 V252' r252 V253' r253 V254' V6 r254 V7 V255' Data 80H 81H 82H 83H 84H 85H 86H 87H 88H 89H 8AH 8BH 8CH 8DH 8EH 8FH 90H 91H 92H 93H 94H 95H 96H 97H 98H 99H 9AH 9BH 9CH 9DH 9EH 9FH A0H A1H A2H A3H A4H A5H A6H A7H A8H A9H AAH ABH ACH ADH AEH AFH B0H B1H B2H B3H B4H B5H B6H B7H B8H B9H BAH BBH BCH BDH BEH BFH DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V128' V129' V130' V131' V132' V133' V134' V135' V136' V137' V138' V139' V140' V141' V142' V143' V144' V145' V146' V147' V148' V149' V150' V151' V152' V153' V154' V155' V156' V157' V158' V159' V160' V161' V162' V163' V164' V165' V166' V167' V168' V169' V170' V171' V172' V173' V174' V175' V176' V177' V178' V179' V180' V181' V182' V183' V184' V185' V186' V187' V188' V189' V190' V191' Output voltage V3 V4+(V3-V4) X 1875.0 V4+(V3-V4) X 1850.0 V4+(V3-V4) X 1825.0 V4+(V3-V4) X 1800.0 V4+(V3-V4) X 1775.0 V4+(V3-V4) X 1750.0 V4+(V3-V4) X 1725.0 V4+(V3-V4) X 1700.0 V4+(V3-V4) X 1675.0 V4+(V3-V4) X 1650.0 V4+(V3-V4) X 1625.0 V4+(V3-V4) X 1600.0 V4+(V3-V4) X 1575.0 V4+(V3-V4) X 1550.0 V4+(V3-V4) X 1525.0 V4+(V3-V4) X 1500.0 V4+(V3-V4) X 1475.0 V4+(V3-V4) X 1450.0 V4+(V3-V4) X 1425.0 V4+(V3-V4) X 1400.0 V4+(V3-V4) X 1375.0 V4+(V3-V4) X 1350.0 V4+(V3-V4) X 1325.0 V4+(V3-V4) X 1300.0 V4+(V3-V4) X 1272.5 V4+(V3-V4) X 1245.0 V4+(V3-V4) X 1217.5 V4+(V3-V4) X 1190.0 V4+(V3-V4) X 1162.5 V4+(V3-V4) X 1135.0 V4+(V3-V4) X 1107.5 V4+(V3-V4) X 1080.0 V4+(V3-V4) X 1050.0 V4+(V3-V4) X 1020.0 V4+(V3-V4) X 990.0 V4+(V3-V4) X 960.0 V4+(V3-V4) X 930.0 V4+(V3-V4) X 900.0 V4+(V3-V4) X 870.0 V4+(V3-V4) X 840.0 V4+(V3-V4) X 807.5 V4+(V3-V4) X 775.0 V4+(V3-V4) X 742.5 V4+(V3-V4) X 710.0 V4+(V3-V4) X 677.5 V4+(V3-V4) X 645.0 V4+(V3-V4) X 612.5 V4+(V3-V4) X 580.0 V4+(V3-V4) X 545.0 V4+(V3-V4) X 510.0 V4+(V3-V4) X 475.0 V4+(V3-V4) X 440.0 V4+(V3-V4) X 405.0 V4+(V3-V4) X 370.0 V4+(V3-V4) X 335.0 V4+(V3-V4) X 300.0 V4+(V3-V4) X 262.5 V4+(V3-V4) X 225.0 V4+(V3-V4) X 187.5 V4+(V3-V4) X 150.0 V4+(V3-V4) X 112.5 V4+(V3-V4) X 75.0 V4+(V3-V4) X 37.5 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 rn r128 r129 r130 r131 r132 r133 r134 r135 r136 r137 r138 r139 r140 r141 r142 r143 r144 r145 r146 r147 r148 r149 r150 r151 r152 r153 r154 r155 r156 r157 r158 r159 r160 r161 r162 r163 r164 r165 r166 r167 r168 r169 r170 r171 r172 r173 r174 r175 r176 r177 r178 r179 r180 r181 r182 r183 r184 r185 r186 r187 r188 r189 r190 r191 () 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 27.5 27.5 27.5 27.5 27.5 27.5 27.5 27.5 30.0 30.0 30.0 30.0 30.0 30.0 30.0 30.0 32.5 32.5 32.5 32.5 32.5 32.5 32.5 32.5 35.0 35.0 35.0 35.0 35.0 35.0 35.0 35.0 37.5 37.5 37.5 37.5 37.5 37.5 37.5 37.5 Caution There is no connection between V7 and V8 in the chip. Data Sheet S13719EJ4V0DS00 9 PD16750 Figure 5-2. Relationship between Input Data and Output Voltage (4/4) VDD2 - 0.2 V > V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > 0.5 VDD2 V0' V0 r0 V1' r1 V2' r2 V3' r3 r30 V31' r31 V1 V32' r32 V33' r33 r222 V223' r223 V224' V5 r224 V225' r225 r251 V252' r252 V253' r253 V254' V6 r254 V7 V255' Caution 10 Data C0H C1H C2H C3H C4H C5H C6H C7H C8H C9H CAH CBH CCH CDH CEH CFH D0H D1H D2H D3H D4H D5H D6H D7H D8H D9H DAH DBH DCH DDH DEH DFH E0H E1H E2H E3H E4H E5H E6H E7H E8H E9H EAH EBH ECH EDH EEH EFH F0H F1H F2H F3H F4H F5H F6H F7H F8H F9H FAH FBH FCH FDH FEH FFH DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V192' V193' V194' V195' V196' V197' V198' V199' V200' V201' V202' V203' V204' V205' V206' V207' V208' V209' V210' V211' V212' V213' V214' V215' V216' V217' V218' V219' V220' V221' V222' V223' V224' V225' V226' V227' V228' V229' V230' V231' V232' V233' V234' V235' V236' V237' V238' V239' V240' V241' V242' V243' V244' V245' V246' V247' V248' V249' V250' V251' V252' V253' V254' V255' Output voltage V4 V5+(V4-V5) X 1557.5 V5+(V4-V5) X 1515.0 V5+(V4-V5) X 1472.5 V5+(V4-V5) X 1430.0 V5+(V4-V5) X 1387.5 V5+(V4-V5) X 1345.0 V5+(V4-V5) X 1302.5 V5+(V4-V5) X 1260.0 V5+(V4-V5) X 1212.5 V5+(V4-V5) X 1165.0 V5+(V4-V5) X 1117.5 V5+(V4-V5) X 1070.0 V5+(V4-V5) X 1022.5 V5+(V4-V5) X 975.0 V5+(V4-V5) X 927.5 V5+(V4-V5) X 880.0 V5+(V4-V5) X 827.5 V5+(V4-V5) X 775.0 V5+(V4-V5) X 722.5 V5+(V4-V5) X 670.0 V5+(V4-V5) X 617.5 V5+(V4-V5) X 565.0 V5+(V4-V5) X 512.5 V5+(V4-V5) X 460.0 V5+(V4-V5) X 402.5 V5+(V4-V5) X 345.0 V5+(V4-V5) X 287.5 V5+(V4-V5) X 230.0 V5+(V4-V5) X 172.5 V5+(V4-V5) X 115.0 V5+(V4-V5) X 57.5 V5 V6+(V5-V6) X 4630.0 V6+(V5-V6) X 4560.0 V6+(V5-V6) X 4490.0 V6+(V5-V6) X 4420.0 V6+(V5-V6) X 4337.5 V6+(V5-V6) X 4255.0 V6+(V5-V6) X 4172.5 V6+(V5-V6) X 4077.5 V6+(V5-V6) X 3982.5 V6+(V5-V6) X 3887.5 V6+(V5-V6) X 3775.0 V6+(V5-V6) X 3662.5 V6+(V5-V6) X 3550.0 V6+(V5-V6) X 3420.0 V6+(V5-V6) X 3290.0 V6+(V5-V6) X 3142.5 V6+(V5-V6) X 2995.0 V6+(V5-V6) X 2830.0 V6+(V5-V6) X 2665.0 V6+(V5-V6) X 2482.5 V6+(V5-V6) X 2300.0 V6+(V5-V6) X 2100.0 V6+(V5-V6) X 1900.0 V6+(V5-V6) X 1675.0 V6+(V5-V6) X 1450.0 V6+(V5-V6) X 1200.0 V6+(V5-V6) X 950.0 V6+(V5-V6) X 650.0 V6+(V5-V6) X 350.0 V6 V7 There is no connection between V7 and V8 in the chip. Data Sheet S13719EJ4V0DS00 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 rn r192 r193 r194 r195 r196 r197 r198 r199 r200 r201 r202 r203 r204 r205 r206 r207 r208 r209 r210 r211 r212 r213 r214 r215 r216 r217 r218 r219 r220 r221 r222 r223 r224 r225 r226 r227 r228 r229 r230 r231 r232 r233 r234 r235 r236 r237 r238 r239 r240 r241 r242 r243 r244 r245 r246 r247 r248 r249 r250 r251 r252 r253 r254 TOTAL () 42.5 42.5 42.5 42.5 42.5 42.5 42.5 42.5 47.5 47.5 47.5 47.5 47.5 47.5 47.5 47.5 52.5 52.5 52.5 52.5 52.5 52.5 52.5 52.5 57.5 57.5 57.5 57.5 57.5 57.5 57.5 57.5 57.5 70.0 70.0 70.0 82.5 82.5 82.5 95.0 95.0 95.0 112.5 112.5 112.5 130.0 130.0 147.5 147.5 165.0 165.0 182.5 182.5 200.0 200.0 225.0 225.0 250.0 250.0 300.0 300.0 350.0 350.0 15002.5 PD16750 Figure 5-3. Relationship between Input Data and Output Voltage (1/4) 0.5 VDD2 - 0.3 V > V8 > V9 > V10 > V11 > V12 > V13 > V14 > V15 > VSS2 + 0.2 V, POL21/22 = L V8 V255'' r254 V9 V254'' r253 V253'' r252 V252'' r251 V251'' r250 r225 V225'' r224 V224'' V10 r223 V223'' r222 r33 V33'' r32 V32'' V14 r31 V31'' r30 r2 V2'' r1 V1'' r0 V15 V0'' Data 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2AH 2BH 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3AH 3BH 3CH 3DH 3EH 3FH DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V0" V1" V2" V3" V4" V5" V6" V7" V8" V9" V10" V11" V12" V13" V14" V15" V16" V17" V18" V19" V20" V21" V22" V23" V24" V25" V26" V27" V28" V29" V30" V31" V32" V33" V34" V35" V36" V37" V38" V39" V40" V41" V42" V43" V44" V45" V46" V47" V48" V49" V50" V51" V52" V53" V54" V55" V56" V57" V58" V59" V60" V61" V62" V63" Output voltage V15 V15+(V14-V15) X 400.0 V15+(V14-V15) X 762.5 V15+(V14-V15) X 1087.5 V15+(V14-V15) X 1375.0 V15+(V14-V15) X 1625.0 V15+(V14-V15) X 1847.5 V15+(V14-V15) X 2042.5 V15+(V14-V15) X 2212.5 V15+(V14-V15) X 2357.5 V15+(V14-V15) X 2477.5 V15+(V14-V15) X 2597.5 V15+(V14-V15) X 2717.5 V15+(V14-V15) X 2812.5 V15+(V14-V15) X 2907.5 V15+(V14-V15) X 3002.5 V15+(V14-V15) X 3077.5 V15+(V14-V15) X 3152.5 V15+(V14-V15) X 3227.5 V15+(V14-V15) X 3290.0 V15+(V14-V15) X 3352.5 V15+(V14-V15) X 3415.0 V15+(V14-V15) X 3465.0 V15+(V14-V15) X 3515.0 V15+(V14-V15) X 3565.0 V15+(V14-V15) X 3602.5 V15+(V14-V15) X 3640.0 V15+(V14-V15) X 3677.5 V15+(V14-V15) X 3715.0 V15+(V14-V15) X 3752.5 V15+(V14-V15) X 3790.0 V15+(V14-V15) X 3827.5 V14 V14+(V13-V14) X 35.0 V14+(V13-V14) X 70.0 V14+(V13-V14) X 105.0 V14+(V13-V14) X 140.0 V14+(V13-V14) X 175.0 V14+(V13-V14) X 210.0 V14+(V13-V14) X 245.0 V14+(V13-V14) X 280.0 V14+(V13-V14) X 312.5 V14+(V13-V14) X 345.0 V14+(V13-V14) X 377.5 V14+(V13-V14) X 410.0 V14+(V13-V14) X 442.5 V14+(V13-V14) X 475.0 V14+(V13-V14) X 507.5 V14+(V13-V14) X 540.0 V14+(V13-V14) X 570.0 V14+(V13-V14) X 600.0 V14+(V13-V14) X 630.0 V14+(V13-V14) X 660.0 V14+(V13-V14) X 690.0 V14+(V13-V14) X 720.0 V14+(V13-V14) X 750.0 V14+(V13-V14) X 780.0 V14+(V13-V14) X 807.5 V14+(V13-V14) X 835.0 V14+(V13-V14) X 862.5 V14+(V13-V14) X 890.0 V14+(V13-V14) X 917.5 V14+(V13-V14) X 945.0 V14+(V13-V14) X 972.5 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 3865 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 rn () r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 r32 r33 r34 r35 r36 r37 r38 r39 r40 r41 r42 r43 r44 r45 r46 r47 r48 r49 r50 r51 r52 r53 r54 r55 r56 r57 r58 r59 r60 r61 r62 r63 400.0 362.5 325.0 287.5 250.0 222.5 195.0 170.0 145.0 120.0 120.0 120.0 95.0 95.0 95.0 75.0 75.0 75.0 62.5 62.5 62.5 50.0 50.0 50.0 37.5 37.5 37.5 37.5 37.5 37.5 37.5 37.5 35.0 35.0 35.0 35.0 35.0 35.0 35.0 35.0 32.5 32.5 32.5 32.5 32.5 32.5 32.5 32.5 30.0 30.0 30.0 30.0 30.0 30.0 30.0 30.0 27.5 27.5 27.5 27.5 27.5 27.5 27.5 27.5 Caution There is no connection between V7 and V8 in the chip. Data Sheet S13719EJ4V0DS00 11 PD16750 Figure 5-3. Relationship between Input Data and Output Voltage (2/4) 0.5 VDD2 - 0.3 V > V8 > V9 > V10 > V11 > V12 > V13 > V14 > V15 > VSS2 + 0.2 V, POL21/22 = L V8 V255'' r254 V9 V254'' r253 V253'' r252 V252'' r251 V251'' r250 r225 V225'' r224 V224'' V10 r223 V223'' r222 r33 V33'' r32 V32'' V14 r31 V31'' r30 r2 V2'' r1 V1'' r0 V15 V0'' Data 40H 41H 42H 43H 44H 45H 46H 47H 48H 49H 4AH 4BH 4CH 4DH 4EH 4FH 50H 51H 52H 53H 54H 55H 56H 57H 58H 59H 5AH 5BH 5CH 5DH 5EH 5FH 60H 61H 62H 63H 64H 65H 66H 67H 68H 69H 6AH 6BH 6CH 6DH 6EH 6FH 70H 71H 72H 73H 74H 75H 76H 77H 78H 79H 7AH 7BH 7CH 7DH 7EH 7FH DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V64" V65" V66" V67" V68" V69" V70" V71" V72" V73" V74" V75" V76" V77" V78" V79" V80" V81" V82" V83" V84" V85" V86" V87" V88" V89" V90" V91" V92" V93" V94" V95" V96" V97" V98" V99" V100" V101" V102" V103" V104" V105" V106" V107" V108" V109" V110" V111" V112" V113" V114" V115" V116" V117" V118" V119" V120" V121" V122" V123" V124" V125" V126" V127" Output voltage V13 V13+(V12-V13) X 25 V13+(V12-V13) X 50 V13+(V12-V13) X 75 V13+(V12-V13) X 100 V13+(V12-V13) X 125 V13+(V12-V13) X 150 V13+(V12-V13) X 175 V13+(V12-V13) X 200 V13+(V12-V13) X 225 V13+(V12-V13) X 250 V13+(V12-V13) X 275 V13+(V12-V13) X 300 V13+(V12-V13) X 325 V13+(V12-V13) X 350 V13+(V12-V13) X 375 V13+(V12-V13) X 400 V13+(V12-V13) X 425 V13+(V12-V13) X 450 V13+(V12-V13) X 475 V13+(V12-V13) X 500 V13+(V12-V13) X 525 V13+(V12-V13) X 550 V13+(V12-V13) X 575 V13+(V12-V13) X 600 V13+(V12-V13) X 625 V13+(V12-V13) X 650 V13+(V12-V13) X 675 V13+(V12-V13) X 700 V13+(V12-V13) X 725 V13+(V12-V13) X 750 V13+(V12-V13) X 775 V13+(V12-V13) X 800 V13+(V12-V13) X 825 V13+(V12-V13) X 850 V13+(V12-V13) X 875 V13+(V12-V13) X 900 V13+(V12-V13) X 925 V13+(V12-V13) X 950 V13+(V12-V13) X 975 V13+(V12-V13) X 1000 V13+(V12-V13) X 1025 V13+(V12-V13) X 1050 V13+(V12-V13) X 1075 V13+(V12-V13) X 1100 V13+(V12-V13) X 1125 V13+(V12-V13) X 1150 V13+(V12-V13) X 1175 V13+(V12-V13) X 1200 V13+(V12-V13) X 1225 V13+(V12-V13) X 1250 V13+(V12-V13) X 1275 V13+(V12-V13) X 1300 V13+(V12-V13) X 1325 V13+(V12-V13) X 1350 V13+(V12-V13) X 1375 V13+(V12-V13) X 1400 V13+(V12-V13) X 1425 V13+(V12-V13) X 1450 V13+(V12-V13) X 1475 V13+(V12-V13) X 1500 V13+(V12-V13) X 1525 V13+(V12-V13) X 1550 V13+(V12-V13) X 1575 Caution There is no connection between V7 and V8 in the chip. 12 Data Sheet S13719EJ4V0DS00 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 1600 rn () r64 r65 r66 r67 r68 r69 r70 r71 r72 r73 r74 r75 r76 r77 r78 r79 r80 r81 r82 r83 r84 r85 r86 r87 r88 r89 r90 r91 r92 r93 r94 r95 r96 r97 r98 r99 r100 r101 r102 r103 r104 r105 r106 r107 r108 r109 r110 r111 r112 r113 r114 r115 r116 r117 r118 r119 r120 r121 r122 r123 r124 r125 r126 r127 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 PD16750 Figure 5-3. Relationship between Input Data and Output Voltage (3/4) 0.5 VDD2 - 0.3 V > V8 > V9 > V10 > V11 > V12 > V13 > V14 > V15 > VSS2 + 0.2 V, POL21/22 = L V8 V255'' r254 V9 V254'' r253 V253'' r252 V252'' r251 V251'' r250 r225 V225'' r224 V224'' V10 r223 V223'' r222 r33 V33'' r32 V32'' V14 r31 V31'' r30 r2 V2'' r1 V1'' r0 V15 V0'' Data 80H 81H 82H 83H 84H 85H 86H 87H 88H 89H 8AH 8BH 8CH 8DH 8EH 8FH 90H 91H 92H 93H 94H 95H 96H 97H 98H 99H 9AH 9BH 9CH 9DH 9EH 9FH A0H A1H A2H A3H A4H A5H A6H A7H A8H A9H AAH ABH ACH ADH AEH AFH B0H B1H B2H B3H B4H B5H B6H B7H B8H B9H BAH BBH BCH BDH BEH BFH DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V128" V129" V130" V131" V132" V133" V134" V135" V136" V137" V138" V139" V140" V141" V142" V143" V144" V145" V146" V147" V148" V149" V150" V151" V152" V153" V154" V155" V156" V157" V158" V159" V160" V161" V162" V163" V164" V165" V166" V167" V168" V169" V170" V171" V172" V173" V174" V175" V176" V177" V178" V179" V180" V181" V182" V183" V184" V185" V186" V187" V188" V189" V190" V191" Output voltage V12 V12+(V11-V12) X 25.0 V12+(V11-V12) X 50.0 V12+(V11-V12) X 75.0 V12+(V11-V12) X 100.0 V12+(V11-V12) X 125.0 V12+(V11-V12) X 150.0 V12+(V11-V12) X 175.0 V12+(V11-V12) X 200.0 V12+(V11-V12) X 225.0 V12+(V11-V12) X 250.0 V12+(V11-V12) X 275.0 V12+(V11-V12) X 300.0 V12+(V11-V12) X 325.0 V12+(V11-V12) X 350.0 V12+(V11-V12) X 375.0 V12+(V11-V12) X 400.0 V12+(V11-V12) X 425.0 V12+(V11-V12) X 450.0 V12+(V11-V12) X 475.0 V12+(V11-V12) X 500.0 V12+(V11-V12) X 525.0 V12+(V11-V12) X 550.0 V12+(V11-V12) X 575.0 V12+(V11-V12) X 600.0 V12+(V11-V12) X 627.5 V12+(V11-V12) X 655.0 V12+(V11-V12) X 682.5 V12+(V11-V12) X 710.0 V12+(V11-V12) X 737.5 V12+(V11-V12) X 765.0 V12+(V11-V12) X 792.5 V12+(V11-V12) X 820.0 V12+(V11-V12) X 850.0 V12+(V11-V12) X 880.0 V12+(V11-V12) X 910.0 V12+(V11-V12) X 940.0 V12+(V11-V12) X 970.0 V12+(V11-V12) X 1000.0 V12+(V11-V12) X 1030.0 V12+(V11-V12) X 1060.0 V12+(V11-V12) X 1092.5 V12+(V11-V12) X 1125.0 V12+(V11-V12) X 1157.5 V12+(V11-V12) X 1190.0 V12+(V11-V12) X 1222.5 V12+(V11-V12) X 1255.0 V12+(V11-V12) X 1287.5 V12+(V11-V12) X 1320.0 V12+(V11-V12) X 1355.0 V12+(V11-V12) X 1390.0 V12+(V11-V12) X 1425.0 V12+(V11-V12) X 1460.0 V12+(V11-V12) X 1495.0 V12+(V11-V12) X 1530.0 V12+(V11-V12) X 1565.0 V12+(V11-V12) X 1600.0 V12+(V11-V12) X 1637.5 V12+(V11-V12) X 1675.0 V12+(V11-V12) X 1712.5 V12+(V11-V12) X 1750.0 V12+(V11-V12) X 1787.5 V12+(V11-V12) X 1825.0 V12+(V11-V12) X 1862.5 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 1900.0 rn () r128 r129 r130 r131 r132 r133 r134 r135 r136 r137 r138 r139 r140 r141 r142 r143 r144 r145 r146 r147 r148 r149 r150 r151 r152 r153 r154 r155 r156 r157 r158 r159 r160 r161 r162 r163 r164 r165 r166 r167 r168 r169 r170 r171 r172 r173 r174 r175 r176 r177 r178 r179 r180 r181 r182 r183 r184 r185 r186 r187 r188 r189 r190 r191 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 25.0 27.5 27.5 27.5 27.5 27.5 27.5 27.5 27.5 30.0 30.0 30.0 30.0 30.0 30.0 30.0 30.0 32.5 32.5 32.5 32.5 32.5 32.5 32.5 32.5 35.0 35.0 35.0 35.0 35.0 35.0 35.0 35.0 37.5 37.5 37.5 37.5 37.5 37.5 37.5 37.5 Caution There is no connection between V7 and V8 in the chip. Data Sheet S13719EJ4V0DS00 13 PD16750 Figure 5-3. Relationship between Input Data and Output Voltage (4/4) 0.5 VDD2 - 0.3 V > V8 > V9 > V10 > V11 > V12 > V13 > V14 > V15 > VSS2 + 0.2 V, POL21/22 = L V8 V255'' r254 V9 V254'' r253 V253'' r252 V252'' r251 V251'' r250 r225 V225'' r224 V224'' V10 r223 V223'' r222 r33 V33'' r32 V32'' V14 r31 V31'' r30 r2 V2'' r1 V1'' r0 V15 V0'' Data C0H C1H C2H C3H C4H C5H C6H C7H C8H C9H CAH CBH CCH CDH CEH CFH D0H D1H D2H D3H D4H D5H D6H D7H D8H D9H DAH DBH DCH DDH DEH DFH E0H E1H E2H E3H E4H E5H E6H E7H E8H E9H EAH EBH ECH EDH EEH EFH F0H F1H F2H F3H F4H F5H F6H F7H F8H F9H FAH FBH FCH FDH FEH FFH DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V192" V193" V194" V195" V196" V197" V198" V199" V200" V201" V202" V203" V204" V205" V206" V207" V208" V209" V210" V211" V212" V213" V214" V215" V216" V217" V218" V219" V220" V221" V222" V223" V224" V225" V226" V227" V228" V229" V230" V231" V232" V233" V234" V235" V236" V237" V238" V239" V240" V241" V242" V243" V244" V245" V246" V247" V248" V249" V250" V251" V252" V253" V254" V255" Output voltage V11 V11+(V10-V11) X 42.5 V11+(V10-V11) X 85.0 V11+(V10-V11) X 127.5 V11+(V10-V11) X 170.0 V11+(V10-V11) X 212.5 V11+(V10-V11) X 255.0 V11+(V10-V11) X 297.5 V11+(V10-V11) X 340.0 V11+(V10-V11) X 387.5 V11+(V10-V11) X 435.0 V11+(V10-V11) X 482.5 V11+(V10-V11) X 530.0 V11+(V10-V11) X 577.5 V11+(V10-V11) X 625.0 V11+(V10-V11) X 672.5 V11+(V10-V11) X 720.0 V11+(V10-V11) X 772.5 V11+(V10-V11) X 825.0 V11+(V10-V11) X 877.5 V11+(V10-V11) X 930.0 V11+(V10-V11) X 982.5 V11+(V10-V11) X 1035.0 V11+(V10-V11) X 1087.5 V11+(V10-V11) X 1140.0 V11+(V10-V11) X 1197.5 V11+(V10-V11) X 1255.0 V11+(V10-V11) X 1312.5 V11+(V10-V11) X 1370.0 V11+(V10-V11) X 1427.5 V11+(V10-V11) X 1485.0 V11+(V10-V11) X 1542.5 V10 V10+(V9-V10) X 57.5 V10+(V9-V10) X 127.5 V10+(V9-V10) X 197.5 V10+(V9-V10) X 267.5 V10+(V9-V10) X 350.0 V10+(V9-V10) X 432.5 V10+(V9-V10) X 515.0 V10+(V9-V10) X 610.0 V10+(V9-V10) X 705.0 V10+(V9-V10) X 800.0 V10+(V9-V10) X 912.5 V10+(V9-V10) X 1025.0 V10+(V9-V10) X 1137.5 V10+(V9-V10) X 1267.5 V10+(V9-V10) X 1397.5 V10+(V9-V10) X 1545.0 V10+(V9-V10) X 1692.5 V10+(V9-V10) X 1857.5 V10+(V9-V10) X 2022.5 V10+(V9-V10) X 2205.0 V10+(V9-V10) X 2387.5 V10+(V9-V10) X 2587.5 V10+(V9-V10) X 2787.5 V10+(V9-V10) X 3012.5 V10+(V9-V10) X 3237.5 V10+(V9-V10) X 3487.5 V10+(V9-V10) X 3737.5 V10+(V9-V10) X 4037.5 V10+(V9-V10) X 4337.5 V9 V8 Caution There is no connection between V7 and V8 in the chip. 14 Data Sheet S13719EJ4V0DS00 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 1600.0 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 4687.5 rn () r192 r193 r194 r195 r196 r197 r198 r199 r200 r201 r202 r203 r204 r205 r206 r207 r208 r209 r210 r211 r212 r213 r214 r215 r216 r217 r218 r219 r220 r221 r222 r223 r224 r225 r226 r227 r228 r229 r230 r231 r232 r233 r234 r235 r236 r237 r238 r239 r240 r241 r242 r243 r244 r245 r246 r247 r248 r249 r250 r251 r252 r253 r254 TOTAL 42.5 42.5 42.5 42.5 42.5 42.5 42.5 42.5 47.5 47.5 47.5 47.5 47.5 47.5 47.5 47.5 52.5 52.5 52.5 52.5 52.5 52.5 52.5 52.5 57.5 57.5 57.5 57.5 57.5 57.5 57.5 57.5 57.5 70.0 70.0 70.0 82.5 82.5 82.5 95.0 95.0 95.0 112.5 112.5 112.5 130.0 130.0 147.5 147.5 165.0 165.0 182.5 182.5 200.0 200.0 225.0 225.0 250.0 250.0 300.0 300.0 350.0 350.0 15002.5 PD16750 6. RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT PIN Data format : 8 bits x 2 RGBs (6 dots) Input width : 48 bits (2-pixel data) (1) R,/L = H (Right shift) Output S1 S2 S3 S4 xxx S383 S384 Data D00 to D07 D10 to D17 D20 to D27 D30 to D37 xxx D40 to D47 D50 to D57 (2) R,/L = L (Left shift) Output S1 S2 S3 S4 xxx S383 S384 Data D00 to D07 D10 to D17 D20 to D27 D30 to D37 xxx D40 to D47 D50 to D57 Note Note S2n S2n-1 POL L V0 to V7 V8 to V15 H V8 to V15 V0 to V7 Note S2n-1 (Odd output), S2n (Even output) 7. RELATIONSHIP BETWEEN STB, POL AND OUTPUT WAVEFORM The output voltage is written to the LCD panel synchronized with the STB falling edge. STB POL S2n-1 Selected voltage V0 to V7 Selected voltage V8 to V15 Selected voltage V0 to V7 S2n Selected voltage V0 to V7 Selected voltage V8 to V15 Hi-Z Hi-Z Data Sheet S13719EJ4V0DS00 Selected voltage V8 to V15 Hi-Z 15 PD16750 8. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = 25C, VSS1 = VSS2 = 0 V) Parameter Symbol Rating Unit Logic Part Supply Voltage VDD1 -0.5 to +4.0 V Driver Part Supply Voltage VDD2 -0.5 to +10.0 V Logic Part Input Voltage VI1 -0.5 to VDD1 + 0.5 V Driver Part Input Voltage VI2 -0.5 to VDD2 + 0.5 V Logic Part Output Voltage VO1 -0.5 to VDD1 + 0.5 V Driver Part Output Voltage VO2 -0.5 to VDD2 + 0.5 V Operating Ambient Temperature TA -10 to +75 C Storage Temperature Tstg -55 to +125 C Caution If the absolute maximum rating of even one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. Absolute maximum ratings, therefore, specify the values exceeding which the product may be physically damaged. Be sure to use the product within the range of the absolute maximum ratings. Recommended Operating Range (TA = -10 to +75C, VSS1 = VSS2 = 0 V) Parameter Symbol MIN. TYP. MAX. Unit Logic Part Supply Voltage VDD1 3.0 3.3 3.6 V Driver Part Supply Voltage VDD2 8.5 9.0 9.5 V VIH 0.7 VDD1 VDD1 V High-Level Input Voltage Low-Level Input Voltage VIL 0 0.3 VDD1 V V0 to V7 0.5 VDD2 VDD2 - 0.2 V V8 to V15 VSS2 + 0.2 0.5 VDD2 - 0.3 V Driver Part Output Voltage VO VSS2 + 0.2 VDD2 - 0.2 V Clock Frequency fCLK 40 MHz -Corrected Voltage 16 Data Sheet S13719EJ4V0DS00 PD16750 Electrical Characteristics (TA = -10 to +75C, VDD1 = 3.3 V 0.3 V, VDD2 = 9.0 V 0.5 V, VSS1 = VSS2 = 0 V) Parameter Input Leak Current Symbol Condition MIN. IIL TYP. MAX. Unit 0.1 1.0 A High-Level Output Voltage VOH STHR (STHL), IOH = 0 mA VDD1 - 0.1 VDD1 V Low-Level Output Voltage VOL STHR (STHL), IOL = 0 mA 0 0.1 V -Corrected Supply Current I V0 to V7 = V8 to V15 = 4.0 V Driver Output Current Output Voltage Deviation IVOH VX = 7.0 V, VOUT = 6.5 V IVOL VX = 1.0 V, VOUT = 1.5 V VO V0 pin, V8 pin 225 450 900 A V7 pin, V15 pin -900 -450 -225 A -185 -90 A Note Note 120 VO = 0.2 V to 1.2 V A 238 30 50 mV 10 20 mV 20 40 mV 10 20 mV 3 10 mV 4.440 4.447 V VDD2 - 0.2 V VO = VDD2 - 1.2 V to VDD2 - 0.2 V VO = 1.2 V to 0.5 VDD2 - 0.3 V VO = 0.5 VDD2 to VDD2 - 1.2 V Output Swing Difference VP-P VO = 0.2 V to 0.8 V VO = VDD2 - 0.8 V to VDD2 - 0.2 V Deviation VO = 0.8 V to 1.2 V VO = VDD2 - 1.2 V to VDD2 - 0.8 V VO = 1.2 V to 0.5 VDD2 - 0.3 V VO = 0.5 VDD2 to VDD2 - 1.2 V Output Swing Average AVO VDD2 = 8.5 V, V0 = 7.9 V, V3 = 6.22 V, 4.433 V7 = 4.0 V, V8 = 4.0 V, V12 = 1.78 V, Difference Deviation V12 = 0.1 V, V1, V2, V4, V5, V6, V9, V10, V11, V13, V14 : Open, TA = 25C, Input data: 80 H Output Voltage Range VO 0.2 Logic Part Dynamic Current IDD1 VDD1, with no load 0.8 6.0 mA IDD2 VDD2, with no load 4.5 11.0 mA Consumption Driver Part Dynamic Current Consumption Note VX refers to the output voltage of analog output pins S1 to S384. VOUT refers to the voltage applied to analog output pins S1 to S384. Cautions 1. The STB cycle is defined to be 20 s at fCLK. = 40 MHz. 2. The TYP. values refer to an all black or all white input pattern. The MAX. value refers to the measured values in the dot checkerboard input pattern. 3. Refers to the current consumption per driver when cascades are connected under the assumption of XGA single-sided mounting (8 units). Data Sheet S13719EJ4V0DS00 17 PD16750 Switching Characteristics (TA = -10 to +75C, VDD1 = 3.3 V 0.3 V, VDD2 = 9.0 V 0.5 V, VSS1 = VSS2 = 0 V) Parameter Symbol Condition MIN. TYP. MAX. Unit Start Pulse Delay Time tPLH1 CL = 15 pF 8 20 ns Driver Output Delay Time tPLH2 CL = 75 pF, RL = 5 k 3 6 s tPLH3 4 8 s tPHL2 3 6 s tPHL3 4 8 s Input Capacitance CI1 STHR (STHL) excluded, TA = 25C 4.8 10 pF CI2 STHR (STHL),TA = 25C 8.6 15 pF <Measurement Condition> RL RL RL RL RL RL = 1 k OUTPUT CL = 15 pF CL 18 CL Data Sheet S13719EJ4V0DS00 CL CL CL PD16750 Timing Requirements (TA = -10 to +75C, VDD1 = 3.3 V 0.3 V, VSS1 = 0 V, tr = tf = 8.0 ns) Parameter Clock Pulse Width Symbol Condition MIN. TYP. MAX. Unit PW CLK 25 ns Clock Pulse High Period PW CLK(H) 4 ns Clock Pulse Low Period PW CLK(L) 4 ns Data Setup Time tSETUP1 2 ns Data Hold Time tHOLD1 2 ns Start Pulse Setup Time tSETUP2 2 ns Start Pulse Hold Time tHOLD2 2 ns * POL21/22 Setup Time tSETUP3 2 ns * POL21/22 Hold Time tHOLD3 2 ns tSPL 1 CLK PW STB 2 s Data Invalid Period tINV 1 CLK Last Data Timing tLDT 2 CLK Start Pulse Low Period STB Pulse Width CLK-STB Time tCLK-STB CLK STB 6 ns STB-CLK Time tSTB-CLK STB CLK 6 ns Time Between STB and Start Pulse tSTB-STH STB STHR(STHL) 2 CLK POL-STB Time tPOL-STB POL or STB -5 ns STB-POL Time tSTB-POL STB POL or 6 ns Remark Unless otherwise specified, the input level is defined to be VIH = 0.7 VDD1, VIL = 0.3 VDD1. Data Sheet S13719EJ4V0DS00 19 tSETUP2 2 3 1 64 65 66 513 tf VDD1 90 % 514 10 % tCLK-STB tSTB-CLK tHOLD2 tr 2 VDD1 STHR (1st Dr.) VSS1 tSETUP1/3 Dn0 - Dn7 VSS1 INVALID D1 - D6 tHOLD1/3 D7 - D12 tSETUP3 tSTB-STH D373 D378 D379 D384 D385 D390 VDD1 D3067 D3072 INVALID D1 - D6 D7 - D12 VSS1 tHOLD3 VDD1 POL21/22 INVALID INVALID VSS1 Data Sheet S13719EJ4V0DS00 tPLH1 VDD1 STHL (1st Dr.) VSS1 tINV tLDT PWSTB VDD1 STB VSS1 tPOL-STB tSTB-POL VDD1 POL VSS1 tPLH3 Hi-Z tPLH2 9. SWITCHING CHARACTERISTIC WAVEFORM (R,/L= H) 1 CLK PWCLK(H) Unless otherwise specified, the input level is defined to be VIH = 0.7 VDD1, VIL = 0.3 VDD1. 20 PWCLK(L) PWCLK Target Voltage 0.1 VDD2 8-bit accuracy VOUT PD16750 tPHL2 tPHL3 PD16750 10. RECOMMENDED MOUNTING CONDITIONS The following conditions must be met for mounting conditions of the PD16750. For more details, refer to the Semiconductor Device Mounting Technology Manual (C10535E). Please consult with our sales offices in case other mounting process is used, or in case the mounting is done under different conditions. PD16750N-xxx : TCP (TAB Package) Mounting Condition Thermocompression Mounting Method Soldering Condition Heating tool 300 to 350C, heating for 2 to 3 seconds : pressure 100g (per solder) 2 ACF Temporary bonding 70 to 100C : pressure 3 to 8 kg/cm : time 3 to 5 (Adhesive sec. Real bonding 165 to 180C: pressure 25 to 45 kg/cm : time 30 to Conductive Film) 40 sec. (When using the anisotropy conductive film SUMIZAC1003 of 2 Sumitomo Bakelite,Ltd). Caution To find out the detailed conditions for mounting the ACF part, please contact the ACF manufacturing company. Be sure to avoid using two or more mounting methods at a time. Data Sheet S13719EJ4V0DS00 21 PD16750 [MEMO] 22 Data Sheet S13719EJ4V0DS00 PD16750 NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. Data Sheet S13719EJ4V0DS00 23 PD16750 Reference Documents NEC Semiconductor Device Reliability/Quality Control System(C10983E) Quality Grades to NEC's Semiconductor Devices(C11531E) * The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. * NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. * Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. * While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. * NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. M7 98. 8