1
RF Components
RF Components
2
PSC03, Module Spec
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■■
■Scope
• This specification applies to the Cellular CDMA systems.
■
■■
■Absolute Maximum Ratings
■
■■
■Features
• Low idle current
• High efficiency
• Excellent linearity
Parameter Symbol Minimum Nominal Maximum Unit
RF input Power Pin - - +7 dBm
Supply Voltage Vcc 0 +3.5 +5 V
Reference Voltage Vref 0 +2.8 +3.1 V
Mode Control Voltage Vctrl 0 +2.8 / 0 +3.5 V
Operating Temperature Tc -30 +25 +80 °
C
Storage Temperature Tstr -40 +25 +130 °C
3
PSC03, Module Spec
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■■
■Electrical Characteristics
Symbol Condition Min Typical Max
Gain 1(High Mode) G_H Vctrl=High 26 28.5 -
Gain 2(Low Mode) G_L Vctrl=Low 24 26 -
Power Added Efficiency 1 Eff_H Vctrl=High 35 38 -
Power Added Efficiency 2 Eff_L Vctrl=Low 7 8 -
Total Supply Current 1 Icc_H Vctrl=High - 460 510
Total Supply Current 2 Icc_L Vctrl=Low - 125 150
Quiescent Current 1 Iq_H Vctrl=High - 80 -
Quiescent Current 2 Iq_L Vctrl=Low - 58 -
Reference Current Iref - - 10 -
Control Current Ivtrl Vctrl=High - 50 -
Total Supply Current
in Power-down Mode
Offset 1 +ACP1 -50 -44
Offset 2 -ACP1 -50 -44
Offset 1 +ACP2 -60 -56
Offset 2 -ACP2 -60 -56
Noise Power in RX Band NB_Rx Po≤28dBm - -135dBm -
Noise Figure NF - - 5 -
Input VSWR VSWR - - - 2.0:1
Stability (Spurious Output) S 5:1 VSWR
all phases - - -60
Ruggedness Ru Po≤28dBm 10:1 - -
Characteristics
Ipd Vref=off
Vcc=3.5V - 3 5
Adjacent Channel Power 2
Adjacent Channel Power 1
±1980KHz
-
-
±900KHz
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PSC03, Module Spec
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■Package type & Pin description
< Top View 1 >
•Marking Descriptions
SC04S
LG Y MD S
xxxxxx
Production Month/Day
S Made in SSI
Space
Made in LGIT
Wafer Number
Customer Part Name
-. Revision Number
Maker
Production Year
Production Month/Day
Bonding operating
month
Bonding operating
day
1 1 1 1
2 2 2 2
: : : :
A A 10 10
B B 11 11
C C 12 12
: : : :
C W 12 31
Marking
< Top View>
< Side View >
1.7
+
A
1.9
1.0
0.85
1.9
0.4E0.05
Solder Mask Edges
0.4E0.05
0.1
Metal Pad Edges
0.48
1.5E0.1
Pin Name Description
1 VREF Power range logic using analog voltage(switching PA module)
2 Vctrl Power range logic using analog voltage(mode control)
3,7,9,10 GND Common of circuit
4 RFin 50Ω RF input - DC decoupled internally inside module
5 VCC1 Supply voltage for collector bias of drive amplifier
6 VCC2 Supply voltage for collector bias of power amplifier
8 RFout 50Ω RF output - DC decoupled internally inside module
5
PSC03, Module Spec
Measured Condition : Vcc=3.5V, Vref=2.8V, Vctrl=2.8V, Room Temperature
Figure 1. Output power vs. Gain Drift
Pout & Gain Drift
20.0
21.0
22.0
23.0
24.0
25.0
26.0
27.0
28.0
29.0
30.0
-54 -45 -40 -30 -20 -10 0 10 16 20 25 26 27 28 29
Pout[dBm]
Gain[dB]
824MHz
836.5MHz
849MHz
Figure 2. Output power vs. ACPR1
Pout & ACPR1
-66
-64
-62
-60
-58
-56
-54
-52
-50
-48
-46
-44
-42
-40
0 10 16 20 25 26 27 28 29
Pout[dBm]
ACPR1[dBc]
824MHz
836.5MHz
849MHz
CDMA mode[HPM/LPM]
6
PSC03, Module Spec
Measured Condition : Vcc=3.5V, Vref=2.8V, Vctrl=2.8V, Room Temperature
Figure 3. Output power vs. ACPR2
Figure 4. Output power vs. Icc CDMA mode[HPM/LPM]
Pout & ACPR2
-75
-73
-71
-69
-67
-65
-63
-61
-59
-57
-55
-53
-51
0 10 16 20 25 26 27 28 29
Pout[dBm]
ACPR1[dBc]
824MHz
836.5MHz
849MHz
CDMA mode[HPM/LPM]
Pout & Icc
0
50
100
150
200
250
300
350
400
450
500
550
600
-54 -45 -40 -30 -20 -10 0 10 16 20 25 26 27 28 29
Pout[dBm]
Icc[mA]
824MHz
836.5MHz
849MHz
