1
Application Note 1799
Author: Manjing Xie
ISL9444EVAL3Z: Triple PWM Step-Down Synchronous
Converters
Introduction
ISL9444EVAL3Z consists of three PWM step-down synchronous
converters, which features the triple PWM controller, ISL9444.
The PWM1 delivers 5V output at 5A. PWM2 and PWM3 deliver
5V at 25A and 3.3V at 25A, respectively.
A power failure monitor and three independent enable pins
accommodate variable power sequencing requirement. The
Extbias option is provided to achieve low standby power.
Strong gate driver and adaptive deadtime control achieve
excellent efficiency over 96%.
ISL9444 Key Features
• Wide input voltage range: 4.5V to 28V
• Use lower MOSFET’s rDS(ON) for current sensing
• Extbias pin to save operating loss
• Power failure monitor
• Complete protection: overvoltage, overcurrent, thermal
shutdown
• Three independent power-good indicators
Evaluation Board Specifications
+++
TABLE 1. EVALUATION BOARD ELECTRICAL SPECIFICATIONS
SPEC DESCRIPTION MIN TYP MAX UNIT
VIN Input for PWM2 and PWM3 5.6 12 16 V
VOUT2 IOUT = 0A 4.75 5.0 5.25 V
VOUT3 IOUT = 0A 3.15 3.3 3.65 V
IOUT_2
IOUT_3
Output Current of PWM2
and PWM3
25 A
VIN2 Input for PWM1 5.6 12 16 V
VOUT1 IOUT = 0A 4.75 5 5.25 V
IOUT_1 Output Current of PWM1 6 A
FSW 330 kHz
ηVIN = 12V, PWM1, 6A,
EN2 = EN3 = GND
96 %
ηVIN = 12V, PWM1 at 6A,
PWM 2 and PWM3 at 25A
respectively
95.9 %
TABLE 2. RECOMMENDED COMPONENT SELECTION FOR QUICK EVALUATION FOR PWM CHANNEL
VOUT
(V)
IOUT
(A)
VIN
(V)
FSW(kHz)
/RT(kΩ)
MOSFET(s),
LOWER, UPPER RSEN
INDUCTOR
(L, ISAT) COUTs
FEEDBACK RES
(LOWER, UPPER, kΩ)CFF
12 15 19 to 26.4 250/130 1XBSC059N04,
1XBSC059N04
2.0kΩ4.7µH, 20A 270µF, OSCON, 16V and
2x1.0µF, ceramic
3.24, 52.3 1nF
NOTES:
1. Please select the output capacitor with a voltage rating higher than the output.
2. Please adjust ROCSET accordingly.
3. Please contact Intersil Sales for assistance.
FIGURE 1. ISL9444EVAL3Z TOP AND BOTTOM VIEW
December 5, 2012
AN1799.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1799
2AN1799.0
December 5, 2012
Recommended Equipment
The following equipment is recommended for evaluation:
• 0V to 20V power supply with 30A source current capability
• Electronic load capable of sinking 30A @ 20V
• Digital Multimeters (DMMs)
• 100MHz Quad-Trace Oscilloscope
Quick Test Setup
1. Ensure that the evaluation board is correctly connected to the
power supply and the electronic load prior to applying any
power. Please refer to Figure 2 for proper set-up.
2. Refer to Table 3 for jumper default positions. For set-up
different than the default setting, please refer to the
datasheet for details (ISL9444, FN7665).
3. Turn on the power supplies; VIN < 16V; VIN2 < 16V
4. Adjust input voltage VIN and VIN2 within the specified range
and observe output voltage. The output voltage variation
should be within 5%.
5. Adjust load current within specified range. The output voltage
variation should be within 5%.
6. Use an oscilloscope to observe the output ripple voltage and
phase node ringing. For accurate measurement, please refer
to Figure 3 for proper probe set-up.
7. Optimization. Please refer to Table 2 on page 1 for
optimization recommendation.
NOTE: All Test points are for voltage measurement or small signal only.
Do not allow high current through these test points.
Probe Set-up
FIGURE 2. ISL9444EVAL3Z TEST SET-UP
TABLE 3. JUMPER DEFAULT POSITIONS
JUMPER
NAME PFI EN1 EN2 EN3 MODE
Positions VIN EN PFO EN2 CCM
FIGURE 3. OSCILLOSCOPE PROBE SET-UP
OUTPUT CAP
OR MOSFET
OUTPUT CAP
OR MOSFET
OUTPUT CAP
OR MOSFET
Application Note 1799
3AN1799.0
December 5, 2012
Output Setting
The output voltage is set by the feedback resistor divider, Rlow
and Rup.
Where Rlow is the resistor from FBx to GND, Rup is the resistor
from VOx to FBx. Resistor R10, R12 and R13 are resistor jumpers
for loop gain measurement. They are not must-to-have
components. It is recommended to use 50Ω for loop gain
measurement.
Remote Sensing
By sensing the positive rail from load, significant voltage drop
along the PCB trace can be compensated.
For applications with load far from the ISL9444, it is likely that
the remote sensing trace picks up noise from the environment.
To prevent noise being coupled into the feedback loop, it is
recommended to connect the phase boosting capacitors, Cff1,
Cff2 and Cff3 to the local output capacitors.
For applications that Cffx is not used for phase boosting, a pair of
Cff and Cp is recommended for remote sensing. Please set Cff
and Cp according to Equation 2.
In case the remote sensing trace become open-circuit, a default
resistor is recommended to connect the resistor Rup to the local
VOUT.
The ISL9444 does not provide dedicated differential amplifier for
remote sensing.
Transient Load Test
The ISL9444EVAL3Z provides optional load transient test
footprints for high di/dt load transient response tests. Please
refer to Figure 4 for the load transient circuit of PWM1.
1. Select a powerpak or SOIC8 MOSFET with VDSS breakdown
greater than VOUT. Select a current sensing resistor. For
accurate current sensing, please use tighter than 5%
tolerance resistors. To alleviate thermal stress, use 0.1Ω or
smaller resistance. For 25A application, a 10mΩ precision
resistor is recommended. Use an oscilloscope to monitor
voltage across R21 and the output voltage.
2. Install the load transient circuit as indicated in the
“Schematic (Optional Circuits and Optional Footprints)” on
page 8. R18, R20 and R22 are 10kΩ resistors for MOSFET
gate discharging.
3. Apply pulse square waveform to the gate of the load transient
test MOSFET, Q10. The duty cycle of the pulse waveform
should be small (<5%) to limit thermal stress on current
sensing resistor and the MOSFETs. Set the amplitude of the
square waveform below 0.5V at the beginning.
4. The amplitude of the square waveform set the current step
amplitude. Slowly increase the amplitude of the square
waveform and monitor the current amplitude. Adjust the
square waveform rising and falling time to set the current
step slew rate.
5. Monitor overshoot and undershoot at the corresponding
output.
VOUT
Rlow Rup
+
Rlow
-----------------------------0.7V×=(EQ. 1)
Rlow CP
⋅Rup Cff
⋅=(EQ. 2)
FIGURE 4. LOAD TRANSIENT SET-UP
R20
DNP,
10k
J5
ISTEP2
12
Q10
DNP
LOAD TRANSIENT CIRCUIT 1
J4
VO1
12
R21
DNP,
0.01
VO1
Application Note 1799
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December 5, 2012
Typical Performance Curves
Oscilloscope Plots were taken at VIN = 12V, VIN2 = 12V and jumpers in default positions, unless otherwise noted.
FIGURE 5. EFFICIENCY vs LOAD CURRENT FOR PWM1
(EN2 = EN3 = GND)
FIGURE 6. TOTAL EFFICIENCY vs LOAD PWM2 AND PWM3 (EN/SS1
IS GROUNDED)
FIGURE 7. EFFICIENCY vs LOAD(%) FOR ALL PWMs (6A, 25A, 25A) FIGURE 8. LOAD REGULATION OF PWM1 (VIN2 = 12V)
FIGURE 9. LOAD REGULATION of PWM2 (VIN = 12V) FIGURE 10. LOAD REGULATION of PWM3 (VIN = 12V)
80
84
88
90
94
98
02.03.0 6.0
LOAD CURRENT (A)
EFFICIENCY (%)
4.0 5.0
82
86
96
92
1.0
88
90
92
93
95
97
0101525
LOAD CURRENT (A)
EFFICIENCY (%)
20
89
91
96
94
5.0
88
90
92
93
95
97
0 40 60 100
LOAD(%)
EFFICIENCY (%)
80
89
91
96
94
20
4.80
4.85
4.90
4.95
5.00
5.05
5.10
5.15
5.2
0 1.2 2.4 3.6 4.8 6.0
LOAD CURRENT(A)
VOUT REGULATION(V)
4.80
4.85
4.90
4.95
5.00
5.05
5.10
5.15
5.20
0 5 10 15 20 25
LOAD CURRENT (A)
VOUT REGULATION (V)
3.26
3.27
3.28
3.29
3.30
3.31
3.32
3.33
3.34
0 5 10 15 20 25
LOAD CURRENT (A)
VOUT REGULATION (V)
Application Note 1799
5AN1799.0
December 5, 2012
FIGURE 11. OUTPUT RIPPLE (VIN = 12V, FULL LOAD, 20MHz BW) FIGURE 12. LOAD TRANSIENT RESPONSE of PWM1 (1.25A TO 3.75A
AT 2A/µs)
FIGURE 13. LOAD TRANSIENT RESPONSE of PWM2 (6.25A TO
18.75A AT 2A/µs)
FIGURE 14. LOAD TRANSIENT RESPONSE OF PWM1 (6.25A TO
18.75A AT 2A/µs)
FIGURE 15. POWER-UP SEQUENCING (DEFAULT CONFIGURATION) FIGURE 16. POWER-UP SEQUENCING (EN2 = PGOOD1)
Typical Performance Curves
Oscilloscope Plots were taken at VIN = 12V, VIN2 = 12V and jumpers in default positions, unless otherwise noted. (Continued)
VO3(AC) AT 50mV/DIV
VO1(AC) AT 50mV/DIV
VO2(AC) AT 50mV/DIV
TIME AT 5µs/DIV
TIME AT 200µs/DIV
VO1(AC) AT 50mV/DIV
VO2(AC) AT 100mV/DIV
TIME AT 200µs/DIV
TIME AT 200µs/DIV
VO3(AC ) AT 50mV/D IV
TIME AT 10m s /DIV
VO3 AT 2V/DIV
VO1 AT 2V/DIV
VIN AT 5V/DIV
VO2 AT 2V/DIV
TIME AT 10ms/DIV
VO3 AT 2V /DIV
VIN AT 5V/DIV
VO2 AT 2V/DIV
VO1 AT 2V/DIV
Application Note 1799
6AN1799.0
December 5, 2012
FIGURE 17. OVERCURRENT PROTECTION RESPONSE OF PWM1 FIGURE 18. OVERCURRENT PROTECTION OF PWM2
Typical Performance Curves
Oscilloscope Plots were taken at VIN = 12V, VIN2 = 12V and jumpers in default positions, unless otherwise noted. (Continued)
TIME AT 200ms/DIV
VO AT 100mV/DIV
PHASE AT 5V/DIV
PHASE AT 5V/DIV
TIME AT 20ms/DIV
VO AT 0.5V/DIV
Application Note 1799
7AN1799.0
December 5, 2012
Schematic, Main
QU3
BSC0902NS
TP7
VO2
1
TP8
GND
1
L2 1.0µH
1 2
3
VO3
J3 1
CLKOUT
TP12
CLKOUT 1
CIN9
DNP
TP9
VO3
1
TP10
GND
1
VO3SNS
CO14
DNP
10V
VIN
Cff2 470p
L3 1.0µH
12
3
CIN10
100µ
35V
DEM
JMODE
MODE/SYNC
1
122
3
344
5
566
MODESYNC TP14
Ext. Clock
1SYNC
VCC5V
TP1
VIN 1
CCM
RL1
1.6
5Vsb @ 5A
TP2
GND 1
CL1
470p
CO38
10µ
16V
CIN6
10µ
25V
5V@25A
CIN8
10µ
25V
RL2
1.6
CL2
820p
TP5
VO1 1
TP6
GND 1
PFO_N
FB3
CIN2
100µ
35V
Q6
DNP
VO2
R830.9k 1%
J2 1
ROC1
243k
J8
1
CB1
0.22µ
16V
Q5
DNP
R13 10
R5 12.1k 1%
CIN5
10µ
25V
TP4
PFI_Ext
1
J16
BIAS
1 2
QL3
BSC0902NS CO36
DNP
CO37
DNP
R130.9k 1%
QU2
BSC0902NS
CO32
270µ
16V
J1 1
CO34
10µ
16V
CO33
10µ
16V
CO35
270µ
16V
EN2
UG1
PH3
L1 4.7µH
Q3
BSC0902NS
R11
4.99k
1%
PH1
7V to 16V
CB3 0.22µ
CS247n
J6 1
EXTBIAS
RFIN 22
Rsen1
2.0k
QU1
BSC057N03
EN2
VIN
CO25
DNP
6.3V
Rsen3 2.0k
LG1
VIN
Rsen2
2.0k
SVIN
R6
15.8k
1%
VO3SNS
ROC3 243k
R9
DNP
0.1%
VO2
CS3
47n
VO1
CO13
DNP
VCC5V
RB3 0
DISABLE
ENABLE
EN/SS1
JEN1
EN1
1
122
3
3
RB1
0
CIN1
100µ
35V
CO17
10µ
10V
CO11
DNP
CO15
DNP
VIN
PFI_Ext
CO12
DNP
PFI_x
J14
PFI_Select
1
122
3
3
VO1
VO3
VO2
U1
ISL9444
PFO_N
1
PFI
2
EXTBIAS
3
VCC_5V
4
VIN
5
EN/SS1
6
FB1
7
OCSET1
8
RT
9
PGOOD1
10
PGOOD2
11
PGOOD3
12
PG3_DLY
13
EN2
14
SGND
15
OCSET2
16
FB2
17
TK/SS2
18
OCSET3
19
FB3
20
TK/SS3 21
EN3 22
MODE/SYNC 23
ISEN3 24
PHASE3 25
BOOT3 26
UGATE3 27
LGATE3 28
PGND 29
CLKOUT 30
ISEN2 31
PHASE2 32
PAD
41
BOOT2 33
UGATE2 34
LGATE2 35
LGATE1 36
UGATE1 37
ISEN1 40
PHASE1 39
BOOT1 38
EN3
Cs1 47n
PGOOD2
PGOOD3
RPG2 100k
RPG1
100k
PGOOD1
RPG3 100k
CO18
1µF
10V
R19, R20, R21 and R23 are for EVAL board testing onl y.
They are not necessary in end applications.
MODESYNC
EN/SS1
R7 DNP
1%
PH2
PH3
PH1
VO1
TP11
VIN2 1
CO16
560µF
CIN3
10µ
25V
UG2
R4 51.1k 1%
PFI_x
VIN2
R10
10
1%
VO1SNS
J13 1
CVCC 4.7µ
10V VCC5V
ROC2
243k
Cff3
330p
R12
10
1%
VO2SNS
VO3
RT
88.7k
R359k
1%
CLKOUT
PH3
J15
PGOOD
11
22
3
3
PGOOD1
TP16
GND 1
Do NOT connect unless VO1 is less than 6V
VIN2
PGOOD3
PGOOD2
Cp3
DNP
VFB1
J7 1
CO26
DNP
10V
Q1
DNP CO27
DNP
10V
CO28
10µF
10V
CO29
DNP
10V
RB2
0
PGOOD1
PFO_N
TP13
EN2
1
VO1
CB2
0.22µ
16V
PGOOD1
Cff1 1000p
JEN2
EN2
1
122
3
344
5
566PFO_N
DISABLE
CIN7
10µ
25V
QL1
BSC057N03
RL3
1.6
VIN
VO1SNS
CL3
820p
VO2SNS
PH2
J9
1
LG2
J10
1
Q7
DNP
CDLYDNP
QL2
BSC0902NS
CO21
270µ
16V
TP3
PFO_N
1
Cp2
DNP
PWM3 is configured to track the VO2 by default.
EN2
VCC5V
CO22
270µ
16V
CBS
1µ
16V
TP15
EN3
1
EN2
EN3
Cp1
DNP
EXTBIAS
JEN3
EN3
1
122
3
344
5
566
DISABLE
CO24
10µ
10V
VCC5V
Q2
BSC0902NS
CO23
10µ
10V
CIN11
10µF
25V
J11
1
R2
4.99k
1%
LG3
CFIN 0.47µ
35V
UG3
CIN4
10µ
25V
CO31
DNP 3.3V@25A
16V
Application Note 1799
8AN1799.0
December 5, 2012
Schematic (Optional Circuits and Optional Footprints)
Bill of Materials
ITEM QTY REFERENCE VALUE DESCRIPTION PART # VENDOR
ESSENTIAL COMPONENTS
1 1 CBS 1µ Ceramic CAP, X5R, 16V, SM0603 Generic Generic
2 3 CB1, CB2, CB3 0.22µ Ceramic CAP, X5R, 16V, SM0603 Generic Generic
3 1 CFIN 0.47µ Ceramic CAP, X5R, 35V, SM0603 Generic Generic
4 3 CIN1, CIN2, CIN10 100µ Alum. CAP, 25V UTT1E101MPD Nichicon
5 7 CIN3, CIN4, CIN5, CIN6, CIN7, CIN8, CIN11 10µ Ceramic CAP, X5R, 25V, SM1206 Generic Generic
6 1 CL1 470p Ceramic CAP, NP0 or C0G, SM0805 Generic Generic
7 2 CL2, CL3 820p Ceramic CAP, NP0 or C0G, SM0805 Generic Generic
8 8 CO17, CO18, CO23, CO24, CO28, CO33,
CO34, CO38
10µ Ceramic CAP, X5R, 10V, SM0805 Generic Generic
9 5 CO16, CO21, CO22, CO32, CO35 270µF OSCON, 16V, RADIAL 8x8 16SEPC270MX SANYO
10 3 CS1, CS2, CS3 47n Ceramic CAP, NP0 or C0G, SM0603 Generic Generic
11 1 CVCC 4.7µ Ceramic CAP, X5R 10V, SM0805 Generic Generic
12 2 Cff1 1000p Ceramic CAP, NP0 or C0G, SM0603 Generic Generic
13 1 Cff2 470p Ceramic CAP, NP0 or C0G, SM0603 Generic Generic
14 1 Cff3 330p Ceramic CAP, NP0 or C0G, SM0604 Generic Generic
15 1 L1 4.7µH INDUCTOR, ISAT > 10A 7443320470 Wurth Electronics
16 2 L2, L3 1.0µH INDUCTOR, ISAT > 35A SER2010-102ML Coilcraft
17 2 QU1, QL1 Single Channel NFET, 30V BSC057N03 Infineon
18 6 QU2, QL2, Q2, QU3, QL3, Q3 Single Channel NFET, 30V BSC0902NS Infineon
19 3 RB1, RB2, RB3 0 RESISTOR, SM0603 Generic Generic
20 1 RFIN 22 RESISTOR, SM0603, 10% Generic Generic
21 3 RL1, RL2, RL3 1.6 RESISTOR, SM0805, 10% Generic Generic
22 3 ROC1, ROC2, ROC3 243k RESISTOR, SM0603, 1% Generic Generic
23 3 RPG1, RPG2, RPG3 100k RESISTOR, SM0603, 10% Generic Generic
Application Note 1799
9AN1799.0
December 5, 2012
24 1 RT 88.7k RESISTOR, SM0603, 1% Generic Generic
25 3 Rsen1, Rsen2, Rsen3 2.0k RESISTOR, SM0603, 1% Generic Generic
26 2 R1, R8 30.9k RESISTOR, SM0603,1% Generic Generic
27 2 R2, R11 4.99k RESISTOR, SM0603,1% Generic Generic
28 1 R3 59k RESISTOR, SM0603,1% Generic Generic
29 1 R4 51.1k RESISTOR, SM0603, 1% Generic Generic
30 1 R5 12.1k RESISTOR, SM0603,1% Generic Generic
31 1 R6 15.8k RESISTOR, SM0603, 1% Generic Generic
32 3 R10, R12, R13 10 RESISTOR, SM0603, 10% Generic Generic
33 1 U1 Triple PWM Controller, 40L- 5x5 QFN ISL9444IRZ Intersil
EVAL BOARD HARDWARE AND RESISTOR JUMPERs
34 3 JEN1, J14, J15 1x3 Header Generic Generic
35 3 JEN2, JEN3, JMODE 2x3 Header Generic Generic
36 10 J1, J2, J3, J6, J7, J8, J9, J10, J11, J13 CONN- Big Lug, TERMINAL POST KPA8CTP
37 1 J16 BIAS 1x2 Header Generic Generic
38 16 TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8,
TP9, TP10, TP11, TP12, TP13, TP14,
TP15, TP16
CONN-TURRET, TERMINAL POST, TH 1514-2 KEYSTONE
39 5 JEN1, J14, JEN2, JEN3, JMODE Connector Jumper SPC02SYAN Sullins
OPTIONAL FOOTPRINTs
40 4 Cp1, Cp2, Cp3, CDLY DNP Ceramic CAP, NP0 or C0G, SM0603
41 2 CO25, CO11, CO31 DNP ELEC. CAP, RADIAL 8x8
42 2 CO13, CO29, CO14 DNP CAP, SM1210
43 4 CO12, CO15, CO26, CO27, CO36, CO37 DNP ELEC. CAP, SM7343
44 6 J4, J5, J12, J17, J18, J19 DNP
45 3 L4, L5, L6 DNP INDUCTOR
46 2 Q1, Q5, Q6, Q7 DNP Single Channel NFET
47 2 R7, R9 DNP RESISTOR, SM0603
COMPONENTs FOR LOAD TRANSIENT TEST CIRCUITs
48 3 Q8, Q9, Q10 DNP N-Channel MOSFET, TO252
49 1 R17, R19, R21 DNP, 0.01 RESISTOR, SM2512
50 3 R18, R20, R22 DNP, 10k RESISTOR, SM0603
Bill of Materials (Continued)
ITEM QTY REFERENCE VALUE DESCRIPTION PART # VENDOR
Application Note 1799
10 AN1799.0
December 5, 2012
ISL9444EVAL3Z PCB Layout
FIGURE 19. TOP SILKSCREEN
Application Note 1799
11 AN1799.0
December 5, 2012
FIGURE 20. TOP LAYER
ISL9444EVAL3Z PCB Layout (Continued)
Application Note 1799
12 AN1799.0
December 5, 2012
FIGURE 21. TOP LAYER ZOOM IN
ISL9444EVAL3Z PCB Layout (Continued)
Application Note 1799
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December 5, 2012
FIGURE 22. SECOND LAYER
ISL9444EVAL3Z PCB Layout (Continued)
Application Note 1799
14 AN1799.0
December 5, 2012
FIGURE 23. BOTTOM SILKSCREEN
ISL9444EVAL3Z PCB Layout (Continued)
Application Note 1799
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December 5, 2012
FIGURE 24.
ISL9444EVAL3Z PCB Layout (Continued)
Application Note 1799
16
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
AN1799.0
December 5, 2012
FIGURE 25. BOTTOM SILKSCREEN
ISL9444EVAL3Z PCB Layout (Continued)
Mouser Electronics
Authorized Distributor
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ISL9444EVAL3Z