LM2665
LM2665 Switched Capacitor Voltage Converter
Literature Number: SNVS009E
LM2665
Switched Capacitor Voltage Converter
General Description
The LM2665 CMOS charge-pump voltage converter oper-
ates as a voltage doubler for an input voltage in the range of
+2.5V to +5.5V. Two low cost capacitors and a diode
(needed during start-up) are used in this circuit to provide up
to 40 mA of output current. The LM2665 can also work as a
voltage divider to split a voltage in the range of +1.8V to
+11V in half.
The LM2665 operates at 160 kHz oscillator frequency to
reduce output resistance and voltage ripple. With an operat-
ing current of only 650 µA (operating efficiency greater than
90% with most loads) and 1µA typical shutdown current, the
LM2665 provides ideal performance for battery powered
systems. The device is in SOT-23-6 package.
Features
nDoubles or Splits Input Supply Voltage
nSOT23-6 Package
n12Typical Output Impedance
n90% Typical Conversion Efficiency at 40 mA
n1µA Typical Shutdown Current
Applications
nCellular Phones
nPagers
nPDAs
nOperational Amplifier Power Suppliers
nInterface Power Suppliers
nHandheld Instruments
Basic Application Circuits
Voltage Doubler
10004901
Splitting V
in
in Half
10004902
September 2005
LM2665 Switched Capacitor Voltage Converter
© 2005 National Semiconductor Corporation DS100049 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V+ to GND Voltage: 5.8V
OUT to GND Voltage: 11.6V
OUT to V+ Voltage: 5.8V
SD (GND 0.3V) to (V+ +
0.3V)
V+ and OUT Continuous Output Current 50 mA
Output Short-Circuit Duration to GND (Note 2) 1 sec.
Continuous Power
Dissipation (T
A
= 25˚C)(Note
3)
600 mW
T
JMax
(Note 3) 150˚C
θ
JA
(Note 3) 210˚C/W
Operating Junction
Temperature Range
−40˚ to 85˚C
Storage Temperature Range −65˚C to +150˚C
Lead Temp. (Soldering, 10 seconds) 300˚C
ESD Rating 2kV
Electrical Characteristics
Limits in standard typeface are for T
J
= 25˚C, and limits in boldface type apply over the full operating temperature range. Un-
less otherwise specified: V+ = 5V, C
1
=C
2
= 3.3 µF. (Note 4)
Symbol
Parameter Condition
Min
(Note 5)
Typ
(Note 6)
Max
(Note 5) Units
V+ Supply Voltage 2.5 5.5 V
I
Q
Supply Current No Load 650 1250 µA
I
SD
Shutdown Supply Current 1 µA
V
SD
Shutdown Pin Input Voltage Shutdown Mode 2.0
(Note 7) V
Normal Operation 0.8
(Note 8)
I
L
Output Current 40 mA
R
SW
Sum of the R
ds(on)
of the four
internal MOSFET switches I
L
=40mA 3.5 8
R
OUT
Output Resistance (Note 9) I
L
=40mA 12 25
f
OSC
Oscillator Frequency (Note 10) 80 160 kHz
f
SW
Switching Frequency (Note 10) 40 80 kHz
P
EFF
Power Efficiency R
L
(1.0k) between GND and
OUT 86 93 %
I
L
=40mAtoGND 90
V
OEFF
Voltage Conversion Efficiency No Load 99 99.96 %
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
beyond its rated operating conditions.
Note 2: OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided. Also, for
temperatures above 85˚C, OUT must not be shorted to GND or V+, or device may be damaged.
Note 3: The maximum allowable power dissipation is calculated by using PDMax =(T
JMax −T
A)/θJA, where TJMax is the maximum junction temperature, TAis the
ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package.
Note 4: In the test circuit, capacitors C1and C2are 3.3 µF, 0.3maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce
output voltage and efficiency.
Note 5: Min. and Max. limits are guaranteed by design, test, or statistical analysis.
Note 6: Typical numbers are not guaranteed but represent the most likely norm.
Note 7: The minimum input high for the shutdown pin equals 40% of V+.
Note 8: The maximum input low of the shutdown pin equals 20% of V+.
Note 9: Specified output resistance includes internal switch resistance and capacitor ESR. See the details in the application information for positive voltage doubler.
Note 10: The output switches operate at one half of the oscillator frequency, fOSC =2f
SW.
LM2665
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Test Circuit
Typical Performance Characteristics (Circuit of Figure 1, V+ = 5V unless otherwise specified)
Supply Current vs
Supply Voltage
Supply Current vs
Temperature
10004904 10004905
Output Source
Resistance vs Supply
Voltage
Output Source
Resistance vs
Temperature
10004906 10004907
10004903
FIGURE 1. LM2665 Test Circuit
LM2665
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Typical Performance Characteristics (Circuit of Figure 1, V+ = 5V unless otherwise specified)
(Continued)
Output Voltage Drop
vs Load Current Efficiency vs
Load Current
10004908 10004909
Oscillator Frequency vs
Supply Voltage
Oscillator Frequency vs
Temperature
10004910 10004911
Shutdown Supply
Current vs
Temperature
10004912
LM2665
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Connection Diagram
6-Lead SOT (M6)
10004913
Top View With Package Marking
10004922
Actual Size
Ordering Information
Order Number Package Number Package Marking Supplied as
LM2665M6 MF06A SO4A (Note 11) Tape and Reel (1000 units/rail)
LM2665M6X MF06A SO4A (Note 11) Tape and Reel (3000 units/rail)
Note 11: The first letter "S" identifies the part as a switched capacitor converter. The next two numbers are the device number. The fourth letter "A" indicates the
grade. Only one grade is available. Larger quantity reels are available upon request.
Pin Descriptions
Pin Name
Function
Voltage Doubler Voltage Split
1 V+ Power supply positive voltage input. Positive voltage output.
2 GND Power supply ground input Same as doubler
3 CAP− Connect this pin to the negative terminal of the
charge-pump capacitor Same as doubler.
4SD
Shutdown control pin, tie this pin to ground in normal
operation. Same as doubler.
5 OUT Positive voltage output. Power supply positive voltage input
6 CAP+ Connect this pin to the positive terminal of the
charge-pump capacitor. Same as doubler
Circuit Description
The LM2665 contains four large CMOS switches which are
switched in a sequence to double the input supply voltage.
Energy transfer and storage are provided by external capaci-
tors. Figure 2 illustrates the voltage conversion scheme.
When S
2
and S
4
are closed, C
1
charges to the supply
voltage V+. During this time interval, switches S
1
and S
3
are
open. In the next time interval, S
2
and S
4
are open; at the
same time, S
1
and S
3
are closed, the sum of the input
voltage V+ and the voltage across C
1
gives the 2V+ output
voltage when there is no load. The output voltage drop when
a load is added is determined by the parasitic resistance
(R
ds(on)
of the MOSFET switches and the ESR of the capaci-
tors) and the charge transfer loss between capacitors. De-
tails will be discussed in the following application information
section.
10004914
FIGURE 2. Voltage Doubling Principle
LM2665
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Application Information
POSITIVE VOLTAGE DOUBLER
The main application of the LM2665 is to double the input
voltage. The range of the input supply voltage is 2.5V to
5.5V.
The output characteristics of this circuit can be approximated
by an ideal voltage source in series with a resistance. The
voltage source equals 2V+. The output resistance R
out
is a
function of the ON resistance of the internal MOSFET
switches, the oscillator frequency, the capacitance and ESR
of C
1
and C
2
. Since the switching current charging and
discharging C
1
is approximately twice as the output current,
the effect of the ESR of the pumping capacitor C
1
will be
multiplied by four in the output resistance. The output ca-
pacitor C
2
is charging and discharging at a current approxi-
mately equal to the output current, therefore, its ESR only
counts once in the output resistance. A good approximation
of R
out
is:
where R
SW
is the sum of the ON resistance of the internal
MOSFET switches shown in Figure 2.
The peak-to-peak output voltage ripple is determined by the
oscillator frequency, the capacitance and ESR of the output
capacitor C
2
:
High capacitance, low ESR capacitors can reduce both the
output resistance and the voltage ripple.
The Schottky diode D
1
is only needed for start-up. The
internal oscillator circuit uses the OUT pin and the GND pin.
Voltage across OUT and GND must be larger than 1.8V to
insure the operation of the oscillator. During start-up, D
1
is
used to charge up the voltage at the OUT pin to start the
oscillator; also, it protects the device from turning-on its own
parasitic diode and potentially latching-up. Therefore, the
Schottky diode D
1
should have enough current carrying
capability to charge the output capacitor at start-up, as well
as a low forward voltage to prevent the internal parasitic
diode from turning-on. A Schottky diode like 1N5817 can be
used for most applications. If the input voltage ramp is less
than 10V/ms, a smaller Schottky diode like MBR0520LT1
can be used to reduce the circuit size.
SPLIT V+ IN HALF
Another interesting application shown in the Basic Applica-
tion Circuits is using the LM2665 as a precision voltage
divider. . This circuit can be derived from the voltage doubler
by switching the input and output connections. In the voltage
divider, the input voltage applies across the OUT pin and the
GND pin (which are the power rails for the internal oscillator),
therefore no start-up diode is needed. Also, since the off-
voltage across each switch equals V
in
/2, the input voltage
can be raised to +11V.
SHUTDOWN MODE
A shutdown (SD) pin is available to disable the device and
reduce the quiescent current to 1 µA. In normal operating
mode, the SD pin is connected to ground. The device can be
brought into the shutdown mode by applying to the SD pin a
voltage greater than 40% of the V+ pin voltage.
CAPACITOR SELECTION
As discussed in the Positive Voltage Doubler section, the
output resistance and ripple voltage are dependent on the
capacitance and ESR values of the external capacitors. The
output voltage drop is the load current times the output
resistance, and the power efficiency is
Where I
Q
(V+) is the quiescent power loss of the IC device,
and I
L2
R
out
is the conversion loss associated with the switch
on-resistance, the two external capacitors and their ESRs.
The selection of capacitors is based on the specifications of
the dropout voltage (which equals I
out
R
out
), the output volt-
age ripple, and the converter efficiency. Low ESR capacitors
(Table 1) are recommended to maximize efficiency, reduce
the output voltage drop and voltage ripple.
Low ESR Capacitor Manufacturers
Manufacturer Phone Capacitor Type
Nichicon Corp. (708)-843-7500 PL & PF series, through-hole aluminum electrolytic
AVX Corp. (803)-448-9411 TPS series, surface-mount tantalum
Sprague (207)-324-4140 593D, 594D, 595D series, surface-mount tantalum
Sanyo (619)-661-6835 OS-CON series, through-hole aluminum electrolytic
Murata (800)-831-9172 Ceramic chip capacitors
Taiyo Yuden (800)-348-2496 Ceramic chip capacitors
Tokin (408)-432-8020 Ceramic chip capacitors
Other Applications
PARALLELING DEVICES
Any number of LM2665s can be paralleled to reduce the
output resistance. Each device must have its own pumping
capacitor C
1
, while only one output capacitor C
out
is needed
as shown in Figure 3. The composite output resistance is:
LM2665
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Other Applications (Continued)
CASCADING DEVICES
Cascading the LM2665s is an easy way to produce a greater
voltage (A two-stage cascade circuit is shown in Figure 4).
The effective output resistance is equal to the weighted sum
of each individual device:
R
out
= 1.5R
out_1
+R
out_2
Note that, the increasing of the number of cascading stages
is pracitically limited since it significantly reduces the effi-
ciency, increases the output resistance and output voltage
ripple.
10004919
FIGURE 3. Lowering Output Resistance by Paralleling Devices
10004920
FIGURE 4. Increasing Output Voltage by Cascading Devices
LM2665
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Other Applications (Continued)
REGULATING V
OUT
It is possible to regulate the output of the LM2665 by use of
a low dropout regulator (such as LP2980-5.0). The whole
converter is depicted in Figure 5.
A different output voltage is possible by use of LP2980-3.3,
LP2980-3.0, or LP2980-adj.
Note that, the following conditions must be satisfied simulta-
neously for worst case design:
2V
in_min
>V
out_min
+V
drop_max
(LP2980) + I
out_max
xR
out-
_max
(LM2665)
2V
in_max
<V
out_max
+V
drop_min
(LP2980) + I
out_min
xR
out-
_min
(LM2665)
10004921
FIGURE 5. Generate a Regulated +5V from +3V Input Voltage
LM2665
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Physical Dimensions inches (millimeters) unless otherwise noted
6-Lead Small Outline Package (M6)
NS Package Number MF06A
For Order Numbers, refer to the table in the "Ordering Information" section of this document.
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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LM2665 Switched Capacitor Voltage Converter
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