DMN1250UFEL-7 - DIODES INC

DMN1250UFEL

Document number: DS37787 Rev. 7 - 2

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September 2019

DMN1250UFEL

N-CHANNEL ENHANCEMENT MODE MOSFET

Features

Low Gate Charge



RDS(ON): 280mΩ @ VGS = 4.5V (Single MOSFET)



8 N-Channel MOSFET in One Package



Common Source



Small Footprint 1.5mm × 1.5mm



Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)



Halogen, Antimony and Beryllium Free. “Green” Device

(Note 3)

Mechanical Data

Case: U-QFN1515-12



Case Material—Molded Plastic, “Green” Molding

Compound. UL Flammability Classification Rating 94V-0



Moisture Sensitivity: Level 1 per J-STD-020



Terminals: Finish—Matte Tin Annealed over Copper Leadframe.

Solderable per MIL-STD-202, Method 208

Terminal Connections: See Diagram

Weight: 0.004 grams (Approximate)

Ordering Information (Note 4)

Part Number

Case

Packaging

DMN1250UFEL-7

U-QFN1515-12

3000/Tape & Reel

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.

2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and

Lead-free.

3. Halogen, Antimony and Beryllium-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br +

Cl), <1000ppm antimony compounds and <1000ppm Beryllium.

4. For packaging details, go to our website at https://www.diodes.com/design/support/packaging/diodes-packaging/.

U-QFN1515-12

Bottom View

Equivalent Circuit

S

D3

D8

S

D4

D7

D6

D5

D2

D1

S

G

S

DMN1250UFEL

Document number: DS37787 Rev. 7 - 2

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September 2019

DMN1250UFEL

Marking Information

Site 1:

Date Code Key

Year

2019

2020

2021

2022

2023

2024

2025

Code

G

H

I

J

K

L

M

Month

Jan

Feb

Mar

Apr

May

Jun

Jul

Aug

Sep

Oct

Nov

Dec

Code

1

2

3

4

5

6

7

8

9

O

N

D

Site 2:

Date Code Key

Year

2019

2020

2021

2022

2023

2024

2025

2026

2027

Code

9

0

1

2

3

4

5

6

7

Week

1-26

27-52

53

Code

A-Z

a-z

z

Internal Code

Sun

Mon

Tue

Wed

Thu

Fri

Sat

Green

T

U

V

W

X

Y

Z

Lead Free

t

u

v

w

x

y

z

U-QFN1515-12

A1 = Product Type Marking Code

YM = Date Code Marking

Y = Year (ex: G = 2019)

M= Month (ex: 9 = September)

A1 = Product Type Marking Code

YWX = Date Code Marking

Y = Year (ex: 9 = 2019)

W = Week (ex: a = week 27; z represents week 52 and 53)

X = Internal Code (ex: U = Monday)

U-QFN1515-12

DMN1250UFEL

Document number: DS37787 Rev. 7 - 2

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September 2019

DMN1250UFEL

Maximum Ratings (@TA = +25°C, unless otherwise specified.)

Characteristic

Symbol

Value

Unit

Drain-Source Voltage

VDSS

12

V

Gate-Source Voltage

VGSS

8

V

Drain Current (Note 6) Continuous

TA = +25°C

ID

2.0

A

TA = +70°C

1.6

Pulsed Drain Current (Note 7)

IDM

10

A

ESD Capability (Note 10)

HBM

150

V

CDM

1000

V

Thermal Characteristics

Characteristic

Symbol

Value

Unit

Total Power Dissipation (Note 5)

PD

0.66

W

Total Power Dissipation (Note 6)

PD

1.25

W

Thermal Resistance, Junction to Ambient (Note 5)

RθJA

177

°C/W

Thermal Resistance, Junction to Ambient (Note 6)

RθJA

100

°C/W

Operating and Storage Temperature Range

TJ, TSTG

-55 to +150

°C

Electrical Characteristics (@TA = +25°C, unless otherwise specified.)

Characteristic

Symbol

Min

Typ

Max

Unit

Test Condition

STATIC CHARACTERISTICS

Drain-Source Breakdown Voltage

BVDSS

12

—

V

ID = 250µA, VGS = 0V

Zero Gate Voltage Drain Current

IDSS

—

1

µA

VDS = 12V, VGS = 0V

Gate-Body Leakage Current

IGSS

—

±100

nA

VDS = 0V, VGS = ±8V

Gate Threshold Voltage

VGS(TH)

0.4

—

1

V

VDS = VGS, ID = 250µA

Static Drain-Source On-Resistance (Note 8)

RDS(ON)

—

280

450

mΩ

VGS = 4.5V, ID = 0.2A

—

360

550

mΩ

VGS = 2.5V, ID = 0.1A

Forward Transfer Admittance

|YFS|

—

1

—

s

VDS = 6V, ID = 0.2A

Diode Forward Voltage (Note 8)

VSD

—

0.8

1.0

V

IS = 0.2A, VGS = 0V

DYNAMIC CHARACTERISTICS (Note 9)

Input Capacitance

Ciss

—

146

190

pF

VDS = 6V, VGS = 0V

f = 1.0MHz

Output Capacitance

Coss

—

10

15

pF

Reverse Transfer Capacitance

Crss

—

8

13

pF

Gate Resistance

Rg

—

2.4

—

Ω

VGS = 0V, VDS = 0V, f = 1MHz

SWITCHING CHARACTERISTICS (Note 9)

Total Gate Charge

Qg

—

1.3

1.9

nC

VGS = 4.5V, VDS = 6V, ID =0.2A

Gate-Source Charge

Qgs

—

0.3

—

nC

Gate-Drain Charge

Qgd

—

0.1

—

nC

Turn-On Delay Time

tD(ON)

—

1.9

2.7

ns

VDD = 6V, VGS = 4.5V,

RL = 22Ω, Rg = 6Ω

Turn-On Rise Time

tR

—

1.3

—

ns

Turn-Off Delay Time

tD(OFF)

—

7.5

11

ns

Turn-Off Fall Time

tF

—

1.0

—

ns

Notes: 5. Device mounted on 1" × 1", FR-4 PC board with minimum recommended pad layout, and test with single MOSFET.

6. Device mounted on 1" × 1", FR-4 PC board with 2 oz. copper, and test with single MOSFET.

7. Repetitive Rating, pulse width limited by junction temperature, and test with single MOSFET.

8. Test pulse width t = 300ms, test with single MOSFET.

9. Guaranteed by design with single MOSFET, not subject to production testing.

10. Based on characterization data only. Not subject to production testing.

DMN1250UFEL

Document number: DS37787 Rev. 7 - 2

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September 2019

DMN1250UFEL

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

ID, DRAIN CURRENT (A)

VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 1. Typical Output Characteristic

VGS=1.5V

VGS=1.2V

VGS=2.0V

VGS=2.5V

VGS=3.0V

VGS=4.0V

VGS=4.5V

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

0 0.5 1 1.5 2 2.5

ID, DRAIN CURRENT (A)

VGS, GATE-SOURCE VOLTAGE (V)

Figure 2. Typical Transfer Characteristic

VDS= 5V

-55℃

25℃

85℃

150℃

125℃

0

0.3

0.6

0.9

1.2

1.5

0 2 4 6 8 10 12

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

VGS, GATE-SOURCE VOLTAGE (V)

Figure 4. Typical Transfer Characteristic

ID=200mA

ID=100mA

0

0.1

0.2

0.3

0.4

0.5

0.6

0 0.2 0.4 0.6 0.8 1

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

ID, DRAIN-SOURCE CURRENT (A)

Figure 3. Typical On-Resistance vs. Drain Current

and Gate Voltage

VGS=2.5V

VGS=4.5V

0.4

0.6

0.8

1

1.2

1.4

1.6

-50 -25 0 25 50 75 100 125 150

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(NORMALIZED)

TJ, JUNCTION TEMPERATURE (℃)

Figure 6. On-Resistance Variation with Temperature

VGS=4.5V, ID=200mA

VGS=2.5V, ID=100mA

0

0.1

0.2

0.3

0.4

0.5

0.6

0 0.5 1 1.5 2 2.5 3

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

ID, DRAIN CURRENT (A)

Figure 5. Typical On-Resistance vs. Drain Current and

Junction Temperature

VGS= 4.5V

-55℃

25℃

85℃

125℃

150℃

DMN1250UFEL

Document number: DS37787 Rev. 7 - 2

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September 2019

DMN1250UFEL

0

0.2

0.4

0.6

-50 -25 0 25 50 75 100 125 150

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

TJ, JUNCTION TEMPERATURE (℃)

Figure 7. On-Resistance Variation with Temperature

VGS=2.5V, ID=100mA

VGS=4.5V, ID=200mA

0.4

0.6

0.8

1

1.2

-50 -25 0 25 50 75 100 125 150

VGS(TH), GATE THRESHOLD VOLTAGE (V)

TJ, JUNCTION TEMPERATURE (℃)

Figure 8. Gate Threshold Variation vs. Junction

Temperature

ID=250μA

ID=1mA

1

10

100

1000

0 2 4 6 8 10 12

CT, JUNCTION CAPACITANCE (pF)

VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 10. Typical Junction Capacitance

f=1MHz

Ciss

Coss

Crss

0

0.5

1

1.5

2

2.5

3

0 0.3 0.6 0.9 1.2 1.5

IS, SOURCE CURRENT (A)

VSD, SOURCE-DRAIN VOLTAGE (V)

Figure 9. Diode Forward Voltage vs. Current

VGS=0V,

TJ=-55℃

VGS=0V,

TJ=25℃

VGS=0V, TJ=85℃

VGS=0V, TJ=125℃

VGS=0V, TJ=150℃

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

0 0.3 0.6 0.9 1.2 1.5

VGS (V)

Qg (nC)

Figure 11. Gate Charge

VDS=6V, ID=200mA

0.01

0.1

1

10

0.1 1 10 100

ID, DRAIN CURRENT (A)

VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 12. SOA, Safe Operation Area

TJ(MAX)=150℃

TA=25℃

Single Pulse

DUT on 1*MRP Board

VGS=4.5V

RDS(ON) Limited

DC

PW=10s

PW=1s

PW=100ms

PW=10ms

PW=1ms

PW=100μs

DMN1250UFEL

Document number: DS37787 Rev. 7 - 2

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September 2019

DMN1250UFEL

0.001

0.01

0.1

1

1E-06 1E-05 0.0001 0.001 0.01 0.1 1 10 100 1000

r(t), TRANSIENT THERMAL RESISTANCE

t1, PULSE DURATION TIME (sec)

Figure 13. Transient Thermal Resistance

RθJA(t)=r(t) * RθJA

RθJA=177 ℃/W

Duty Cycle, D=t1 / t2

D=Single Pulse

D=0.005

D=0.01

D=0.02

D=0.05

D=0.1

D=0.3

D=0.5

D=0.7

D=0.9

DMN1250UFEL

Document number: DS37787 Rev. 7 - 2

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September 2019

DMN1250UFEL

Package Outline Dimensions

Please see http://www.diodes.com/package-outlines.html for the latest version.

U-QFN1515-12

Dim

Min

Max

Typ

A

0.57

0.63

0.60

A1

0.00

0.05

0.02

A3

0.152 BSC

b

0.15

0.25

0.20

D

1.45

1.55

1.50

D2

0.60

0.80

0.70

E

1.45

1.55

1.50

E2

0.60

0.80

0.70

e

0.40 BSC

L

0.15

0.25

0.20

k

—

0.25

z

—

0.050

All Dimensions in mm

Suggested Pad Layout

Please see http://www.diodes.com/package-outlines.html for the latest version.

U-QFN1515-12

Dimensions

Value

(in mm)

C

0.400

G

0.175

X

0.400

X1

0.700

X2

1.800

Y

0.250

Y1

0.700

Y2

1.450

Y3

1.800

A1 A3

Pin1 ID

Seating Plane

D

E

b

D2

E2

L

e

k

z

A

X

Y1

Y

X1

G

X2

Y3 Y2

C

DMN1250UFEL

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DMN1250UFEL

IMPORTANT NOTICE

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,

INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes

without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the

application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or

trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume

all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated

website, harmless against all damages.

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Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and

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This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the

final and determinative format released by Diodes Incorporated.

LIFE SUPPORT

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express

written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the

labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the

failure of the life support device or to affect its safety or effectiveness.

Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any

use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related

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