CEC016 (Rev. C, 2/16/01) 1
CX2001
0.6µµm CMOS Fast-Turn ASIC Product Family
Introduction
The CX2001 is a fast-turn, 0.6µm CMOS
triple-metal module array product. The
CX2001 features density ranges from 23k to
100k usable gates, up to 96k bits of
configurable embedded RAM / ROM, and up
to 556 I/Os.
Using Chip Express’ proprietary architecture,
fast-turn delivery of prototypes and
production is achieved. Seamless transitions
from prototypes through low- and high-
volume production permit scalable
management of production.
Prototypes – Production-Grade
Five-day lead-time is available for the
shipment of five (5) packaged and fully
tested prototypes.
Low-Volume Production
Three-week lead-time is available for
low-volume module array production.
Customization is done using single-mask,
single-wafer processing.
High-Volume Production
Sixteen-week lead-time is available for high-
volume production.
Features
u
u
0.6µm CMOS TLM process
u
u
3.3V or 5V operation with mixed mode I/O
u
u
5V tolerance with reference voltage
u
u
PCI compliant outputs (3.3V / 5V)
u
u
Power dissipation:
2.6µW / MHz / Gate @ 5V
1.1µW / MHz / Gate @ 3.3V
u
u
800 MHz maximum flip-flop toggle rate
u
u
Analog PLL operating frequency up to
250 MHz
u
u
Embedded memory
Configurable as single-port RAM,
dual-port RAM or ROM
Up to 96k bits / 24 individual
memory configurations
Worst-case performance:
200 MHz @ 5V; 150 MHz @ 3.3V
Fully static, synchronous RAM
Word depth: programmable to 4096
bits
Word width: programmable 1-64 bits
CX2001 Product
Master
Slice
Estimated
Usable Gates
Embedded
Memory Bits
Max Memory
Instantiations Max I/O1Max APLL
CX2041 23k 24k 6 260 2
CX2081 50k 32k 8 380 4
CX2121 75k 40k 10 452 4
CX2201 100k 96k 24 556 4
_____________
1 Max I/O including both signals and power / ground.
CEC016 (Rev. C, 2/16/01) 2
Cell Library
u
u
Synopsys DC and DesignWare support
u
u
Low power flip-flops
u
u
Built-in scan MUX in flip-flops
u
u
26 simple gates; 36 complex gates
u
u
31 flip-flops
u
u
24 latches
u
u
Multiplexers, decoders
u
u
Tristate / drive cells
u
u
1280 input / output cells
Power Pin Assignment
All I/O cells are programmable as VDD,
VSS, input, output, or bi-directional. This
flexibility allows the user to properly ratio
power pins with output drive requirements
or match specific pin-out when replacing
existing devices.
Input & Output Bi-Directional Cells
The CX2001 library contains a large
selection of input, output, and bi-directional
cells that accommodate a wide range of
designs. Input cells can be personalized
with internal pull-up or pull-down resistors
and with or without hysteresis. Output cells
include slew rate control, current drive
capability from 2mA to 12mA, as well as N
channel and P channel open drains. If
required, outputs can be used in parallel to
enable increased drive capability. Each I/O
can be programmed independently for 3.3V
or 5V.
Recommended Operating Conditions
Absolute Maximum Ratings
Symbol Description Min Max Unit
VDD Supply voltage 07.0 V
VDDIO (3.3V) I/O supply voltage -0.3 4.6 V
VDDIO (5V) I/O supply voltage 05.5 V
VIN DC input voltage range VSS -0.3 VDDWELL +0.3
2
V
TJJunction temperature -- 150 °C
TSTG Storage temperature -65 150 °C
TSOL Soldering lead temperature (10 seconds) -- 210 °C
Recommended Operating Conditions
Symbol Description Min Max Units
Commercial (0°C TJ 100°C) 3.0 3.6 V
Industrial (-40°C TJ 115°C) 3.0 3.6 V
VDD Supply voltage
(3.3V) Military (-55°C TJ 125°C) 3.0 3.6 V
Commercial (0°C TJ 100°C) 4.75 5.25 V
Industrial (-40°C TJ 115°C) 4.75 5.25 V
VDD Supply voltage
(5V) Military (-55°C TJ 125°C) 4.5 5.5 V
CEC016 (Rev. C, 2/16/01) 3
Symbol Description Min Max Units
TTL inputs 2.0 VDD V
VIH Input high voltage CMOS inputs 0.7 VDD VDD V
TTL inputs 00.8 V
VIL Input low voltage CMOS inputs 00.3 VDD V
Tin Input signal transition time -- 10 nS
DC Characteristics Over Operating Conditions
Symbol Description Min Max Units
TTL outputs 2.45 -- V
VOH Output high voltage CMOS outputs 0.7 VDD -- V
TTL outputs -- 0.45 V
VOL Output low voltage CMOS outputs -- 0.3 VDD V
IIN Input leakage current -10 10 µA
QFP packages -- -- Note 1
CIN Input capacitance BGA packages -- -- Note 1
Note 1:
Please refer to current packaging information on our website (www.chipexpress.com/design).
For More Info
Chip Express Corporation
2323 Owen Street
Santa Clara, CA 95054
Phone: (408) 988-2445
Fax: (408) 988-2449
Toll Free: 1-800-95-CHIPX
Email: moreinfo@chipx.com
www.chipexpress.com
_____________
2 VDDWELL is 3.3V or 5V depending on the highest voltage in the system.